Search results for "write-latency"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
53	Jonas Skeppstedt	Overcoming Limitations of Prefetching in Multiprocessors by Compiler-Initiated Coherence Actions.	IEEE PACT	1997	DBLP DOI BibTeX RDF	compiler-initiated coherence, CC-NUMA multiprocessor, compiler-controlled prefetching, read-stall time, write-latency, read-latency, memory access latency reduction, migratory sharing, parallel architectures, multiprocessors, prefetching, prefetch, compiler-analysis
53	Timothy Bisson, Scott A. Brandt	Reducing Hybrid Disk Write Latency with Flash-Backed I/O Requests.	MASCOTS	2007	DBLP DOI BibTeX RDF
47	Kevin Skadron, Douglas W. Clark	Design Issues and Tradeoffs for Write Buffers.	HPCA	1997	DBLP DOI BibTeX RDF
38	Rui Yan, Jiwu Shu, Dongchan Wen	An Implementation of Semi-synchronous Remote Mirroring System for SANs.	GCC Workshops	2004	DBLP DOI BibTeX RDF
36	Seung-Ho Lim, Sung Hoon Baek, Joo Young Hwang, Kyu Ho Park	Write Back Routine for JFFS2 Efficient I/O.	EUC	2006	DBLP DOI BibTeX RDF
31	Guangyu Sun 0003, Xiangyu Dong, Yuan Xie 0001, Jian Li 0059, Yiran Chen 0001	A novel architecture of the 3D stacked MRAM L2 cache for CMPs.	HPCA	2009	DBLP DOI BibTeX RDF
31	Moonseok Jang, Kexin Wang, Sangjin Lee 0001, Hyeonggyu Jeong, In-Yeong Song, Yong Ho Song, Jungwook Choi	Achieving low write latency through new stealth program operation supporting early write completion in NAND flash memory.	J. Syst. Archit.	2022	DBLP DOI BibTeX RDF
31	Sa'ed Abed	Reducing Write Latency by Integrating Advanced PreSET Technique and Two-Stage-Write with Inversion Schemes.	J. Comput.	2020	DBLP DOI BibTeX RDF
30	Huaxia Xia, Andrew A. Chien	RobuSTore: a distributed storage architecture with robust and high performance.	SC	2007	DBLP DOI BibTeX RDF
26	Jim Nilsson, Fredrik Dahlgren	Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors.	IPDPS	2000	DBLP DOI BibTeX RDF
23	Danai Patiyoot	Migration / Evolution of security towards wireless ATM.	ACM SIGOPS Oper. Syst. Rev.	2002	DBLP DOI BibTeX RDF
22	Tzi-cker Chiueh, Lan Huang	Track-Based Disk Logging.	DSN	2002	DBLP DOI BibTeX RDF
22	Jun Wang 0001, Yiming Hu	PROFS-Performance-Oriented Data Reorganization for Log-Structured File System on Multi-Zone Disks.	MASCOTS	2001	DBLP DOI BibTeX RDF
20	Maohua Lu, Shibiao Lin, Tzi-cker Chiueh	Efficient Logging and Replication Techniques for Comprehensive Data Protection.	MSST	2007	DBLP DOI BibTeX RDF
19	Mohd Sakib Ansari S, Kavitha S, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma	Design of Radiation Hardened 12T SRAM with Enhanced Reliability and Read/Write Latency for Space Application.	VLSID	2023	DBLP DOI BibTeX RDF
19	Yu-Pei Liang, Tseng-Yi Chen, Yuan-Hao Chang 0001, Yi-Da Huang, Wei-Kuan Shih	Planting Fast-Growing Forest by Leveraging the Asymmetric Read/Write Latency of NVRAM-Based Systems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
19	Yuze Chen, Seokin Hong	Proactive Dead Block Eviction for Reducing Write Latency in STT-MRAM Caches.	ICEIC	2021	DBLP DOI BibTeX RDF
19	Wen Wen, Youtao Zhang, Jun Yang 0002	Accelerating 3D Vertical Resistive Memories with Opportunistic Write Latency Reduction.	ICCAD	2020	DBLP DOI BibTeX RDF
19	Kazuteru Namba, Fabrizio Lombardi	Coding for Write Latency Reduction in a Multi-Level Cell (MLC) Phase Change Memory (PCM).	IEEE Trans. Computers	2019	DBLP DOI BibTeX RDF
19	Wei-Chu Tsai, Sung-Ming Wu, Li-Pin Chang	Learning-Assisted Write Latency Optimization for Mobile Storage.	RTCSA	2019	DBLP DOI BibTeX RDF
19	Kazuteru Namba, Fabrizio Lombardi	On Coding for Endurance Enhancement and Error Control of Phase Change Memories With Write Latency Reduction.	IEEE Trans. Very Large Scale Integr. Syst.	2018	DBLP DOI BibTeX RDF
19	Ishan G. Thakkar, Sudeep Pasricha	DyPhase: A Dynamic Phase Change Memory Architecture With Symmetric Write Latency and Restorable Endurance.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2018	DBLP DOI BibTeX RDF
19	Ishan G. Thakkar, Sudeep Pasricha	DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency.	VLSID	2017	DBLP DOI BibTeX RDF
19	Vishal Deep, Tarek A. Elarabi	Write Latency Reduction Techniques of State-of-the-Art Phase Change Memory.	EMS	2016	DBLP DOI BibTeX RDF
19	Ali Ahari, Mojtaba Ebrahimi, Fabian Oboril, Mehdi Baradaran Tahoori	Improving reliability, performance, and energy efficiency of STT-MRAM with dynamic write latency.	ICCD	2015	DBLP DOI BibTeX RDF
18	Junfei Wang, Jiwu Shu, Bigang Li	SAN-MDS: A High Performance Disk Based on Memory Device for SAN.	ICAS	2006	DBLP DOI BibTeX RDF
15	Håkan Grahn, Per Stenström	Relative Performance of Hardware and Software-Only Directory Protocols Under Latency Tolerating and Reducing Techniques.	IPPS	1997	DBLP DOI BibTeX RDF
8	Sang-Won Lee 0001, Bongki Moon	Design of flash-based DBMS: an in-page logging approach.	SIGMOD Conference	2007	DBLP DOI BibTeX RDF	flash-memory database server, in-page logging