The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Publications at "CHDL"( http://dblp.L3S.de/Venues/CHDL )

URL (DBLP): http://dblp.uni-trier.de/db/conf/chdl

Publication years (Num. hits)
1993 (43)
Publication types (Num. hits)
inproceedings(42) proceedings(1)
Venues (Conferences, Journals, ...)
CHDL(43)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
No Growbag Graphs found.

Results
Found 43 publication records. Showing 43 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Sungho Kang, Stephen A. Szygenda Automatic VHDL Model Generation System. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Walling R. Cyre Textual/Graphical Design Concept-Level Synthesis. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Bran Selic An Efficient Object-Oriented Variation of the Statecharts Formalism for Distributed Real-Time Systems. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Klaus Schneider 0001, Ramayya Kumar, Thomas Kropf Hardware-Verification using First Order BDDs. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Bhaskar Bose, Steven D. Johnson, Shyamsundar Pullela Integrating Boolean Verification with Formal Derivation. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Wolfgang Glunz, Torsten Rössel Checking DFT Rules with a VHDL Simulator. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Ram Mandayam, Ranga Vemuri Performance Specification and Measurement. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Edmund M. Clarke Automatic Verification of Sequential Circuit Designs. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Roger P. Ang, Nikil D. Dutt A Representation for the Binding of RT-Component Functionality to HDL Behavior. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Edmund M. Clarke, Orna Grumberg, Hiromi Hiraishi, Somesh Jha, David E. Long, Kenneth L. McMillan, Linda A. Ness Verification of the Futurebus+ Cache Coherence Protocol. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Tamio Hoshino UDL/I version Two: A New Horizon of HDL Standards. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Wolfgang Glunz, Thomas Kruse, Torsten Rössel, Dieter Monjau Integrating SDL and VHDL for System-Level Hardware Design. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Zheng Zhu, Steven D. Johnson Automatic Synthesis of Sequential Synchronizations. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Michael Ryba, Wolfram Seibold, Utz G. Baitinger, Ulrich Thelen Parameterized VHDL Entities for the Simulation of Hybrid Circuits. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1David Agnew, Luc J. M. Claesen, Raul Camposano (eds.) Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL '93, sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993 Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1J. W. Gambles, Phillip J. Windley Reasoning about the VHDL Standard Logic Package Signal Data Type. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Wolfgang Ecker, Sabine März System-Level Specification and Design Using VHDL: A Case Study. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Francisco Corella Automated High-level Verification Against Clocked Algorithmic Specifications. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Paolo Camurati, Fulvio Corno, Paolo Prinetto Exploiting Symbolic Traversal Techniques for Efficient Process Algebra Manipulation. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Felice Balarin, Gary York Verilog HDL Modeling Styles for Formal Verification. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Ahmed Amine Jerraya, Kevin O'Brien, Tarek Ben Ismail Linking System Design Tools and Hardware Design Tools. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1John W. O'Leary, Mark H. Linderman, Miriam Leeser, Mark D. Aagaard HML: A Hardware Description Language Based on Standard ML. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Robin Sharp, Ole Rasmussen Transformational Rewriting with Ruby. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Karen C. Davis A Denotational Definition of the VHDL Simulation Kernel. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Laurence Pierre VHDL Description and Formal Verification of Systolic Multipliers. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Balraj Singh, John R. Wicks, Philip Wright, James R. Armstrong The Modeler's Assistant: A CAD Tool for Behavioral Model Development. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1C. Norris Ip, David L. Dill Better Verification Through Symmetry. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Shailesh Sutarwala, Pierre G. Paulin, Yatish Kumar Insulin: An Instruction Set Simulation Environment. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Mario Barbacci Real Time Distributed Systems. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Klaus Buchenrieder, Alexander Sedlmeier, Christian Veith HW/SW Co-Design with PRAMs Using CoDES. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Eric J. Golin, Annette C. Feng A Visual Hardware Description Language. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Karim Khordoc, Mario Dufresne, Eduard Cerny, P. A. Babkine, Allan Silburt Integrating Behavior and Timing in Executable Specifications. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Zainalabedin Navabi, Amirhooshang Hashemi, Massoud Eghtesad, Mankuan Michael Vai Modeling Timing Behavior of Logic Circuits Using Piecewise Linear Models. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Dominique Rodriguez Analog-VHDL: As an Application, a Real Example. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Michel Allemand A Rewriting Based Method for the Formal Verification of Microprocessors. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Xing-Jian Xu, Mitsuru Ishizuka An Efficient Data-Path Synthesis Based on Algorithmic Description under the Constraints of Time and Area. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Flávio Rech Wagner Prevail-DM: A Framework-Based Environment for Formal Hardware Verification. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Mohammed Faci, Luigi Logrippo Specifying Hardware Systems in LOTOS. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Alan Dent, Keith Hanna Reasoning about Array Structure Using a Dependently Typed Logic. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Stefan Krischer The Backward Walk Approach in FSM Verification. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Tam Anh Chu, Huy T. Cao, Clement K. C. Leung ESP: An Executable Specification Language for Mixed Timing Control Circuits. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Gregor von Bochmann Specification Languages for Communication Protocols. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
1Kamlesh Rath, Steven D. Johnson Toward a Basis for Protocol Specification and Process Decomposition. Search on Bibsonomy CHDL The full citation details ... 1993 DBLP  BibTeX  RDF
Displaying result #1 - #43 of 43 (100 per page; Change: )
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by L3S.
Previously maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license