Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Alirad Malek, Stavros Tzilis, Danish Anis Khan, Ioannis Sourdis, Georgios Smaragdos, Christos Strydis |
Reducing the performance overhead of resilient CMPs with substitutable resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 191-196, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Senwen Kan, Marco Ottavi, Jennifer Dworak |
Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 119-122, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Gustavo K. Contreras, Nisar Ahmed, LeRoy Winemberg, Mark M. Tehranipoor |
Predictive LBIST model and partial ATPG for seed extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 139-146, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Puneet Ramesh Savanur, Phaninder Alladi, Spyros Tragoudas |
A BIST approach for counterfeit circuit detection based on NBTI degradation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 123-126, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Asad Amin Bawa, Nur A. Touba |
Improving X-tolerant combinational output compaction via input rotation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 167-170, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Zhixi Yang, Jie Han 0001, Fabrizio Lombardi |
Approximate compressors for error-resilient multiplier design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 183-186, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Hyunseung Han, Joon-Sung Yang |
Asymmetric ECC organization in 3D-memory via spare column utilization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 13-16, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Shuai Chen, Junlin Chen, Domenic Forte, Jia Di, Mark M. Tehranipoor, Lei Wang 0003 |
Chip-level anti-reverse engineering using transformable interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 109-114, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Salin Junsangsri, Fabrizio Lombardi, Jie Han 0001 |
Evaluating the impact of spike and flicker noise in phase change memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Daniele Felici, Sandro Bonacini, Marco Ottavi |
Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 187-190, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sami Teravainen, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen |
Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 35-40, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sk Subidh Ali, Ozgur Sinanoglu |
Scan attack on Elliptic Curve Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 115-118, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Hashem Haghbayan, Sami Teravainen, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen |
Adaptive fault simulation on many-core microprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 151-154, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Nicolas Borrel, Clement Champeix, Edith Kussener, Wenceslas Rahajandraibe, Mathieu Lisart, Alexandre Sarafianos, Jean-Max Dutertre |
Influence of triple-well technology on laser fault injection and laser sensor efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 85-90, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Jerry Backer, David Hély, Ramesh Karri |
On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 29-34, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Junlin Chen, Lei Wang 0003 |
Low-power LDPC decoder design exploiting memory error statistics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 171-176, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Jimson Mathew, Yuamfam Yang, M. Ottavia, T. Browna, A. Zampettia, A. Di Carloa, A. M. Jabirb, Dhiraj K. Pradhan |
Fault detection and repair of DSC arrays through memristor sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 7-12, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mani Soma |
On-line detection of intermittent faults in digital-to-analog converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 66-71, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Cagatay Ozmen, Aydin Dirican, Nurettin Tan, Hieu Nguyen, Martin Margala |
A CMOS ripple detector for integrated voltage regulator testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 147-150, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Clement Champeix, Nicolas Borrel, Jean-Max Dutertre, Bruno Robisson, Mathieu Lisart, Alexandre Sarafianos |
SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 177-182, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Pedro Reviriego, Salvatore Pontarelli, Juan Antonio Maestro, Marco Ottavi |
A method to protect Bloom filters from soft errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 80-84, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mehran Mozaffari Kermani, Reza Azarderakhsh |
Reliable hash trees for post-quantum stateless cryptographic hash-based signatures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 103-108, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Michael Opoku Agyeman, Kin-Fai Tong, Terrence S. T. Mak |
Towards reliability and performance-aware Wireless Network-on-Chip design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 205-210, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Cristiana Bolchini, Luca Cassano |
A configurable board-level adaptive incremental diagnosis technique based on decision trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 227-232, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Jyothish Soman, Negar Miralaei, Alan Mycroft, Timothy M. Jones 0001 |
REPAIR: Hard-error recovery via re-execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 76-79, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Tengteng Zhang, D. M. H. Walker |
Impact of test compression on power supply noise control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 161-166, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Glenn H. Chapman, Rahul Thomas, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Tommy Q. Yang, Israel Koren, Zahava Koren |
Single Event Upsets and Hot Pixels in digital imagers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 41-46, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Seyyed Hasan Mozafari, Brett H. Meyer |
Hot spare components for performance-cost improvement in multi-core SIMT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 53-59, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Manolis Kaliorakis, Sotiris Tselonis, Athanasios Chatzidimitriou, Dimitris Gizopoulos |
Accelerated microarchitectural Fault Injection-based reliability assessment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 47-52, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Diego G. Rodrigues, Ghazaleh Nazarian, Álvaro F. Moreira, Luigi Carro, Georgi Gaydadjiev |
A non-conservative software-based approach for detecting illegal CFEs caused by transient faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 221-226, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Bahar J. Farahani, Saeed Safari |
A cross-layer approach to online adaptive reliability prediction of transient faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 215-220, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | |
2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![IEEE Computer Society, 978-1-4799-8606-4 The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
1 | Felipe Rosa 0001, Fernanda Lima Kastensmidt, Ricardo Reis 0001, Luciano Ost |
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 211-214, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Adedotun A. Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan |
Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 17-20, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich |
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 60-65, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Kamran Saleem, Sreenivaas S. Muthyala, Nur A. Touba |
Compacting output responses containing unknowns using an embedded processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 155-160, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Badrun Nahar 0001, Brett H. Meyer |
RotR: Rotational redundant task mapping for fail-operational MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 21-28, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ignacio Herrera-Alzu, Marisa López-Vallejo, C. Gil Soriano |
A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 72-75, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Muralidharan Venkatasubramanian, Vishwani D. Agrawal, James J. Janaher |
Quest for a quantum search algorithm for testing stuck-at faults in digital circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 127-132, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Piecewise-functional broadside tests based on intersections of reachable states. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 133-138, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Tomohiro Yoneda, Masashi Imai, Hiroshi Saito, Kenji Kise |
Dependable real-time task execution scheme for a many-core platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 197-204, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Yasin, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu |
Security analysis of logic encryption against the most effective side-channel attack: DPA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 97-102, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Abdulaziz Eker, Oguz Ergin |
Using value similarity of registers for soft error mitigation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 91-96, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Raashid Ansari, Shucheng Yu, Qiaoyan Yu |
IntelliCAN: Attack-resilient Controller Area Network (CAN) for secure automobiles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 233-236, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Kundan Nepal, Xi Shen, Jennifer Dworak, Theodore W. Manikas, R. Iris Bahar |
Built-in Self-Repair in a 3D die stack using programmable logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 243-248, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Emanuel Dogaru, Filipe Vinci dos Santos, William Rebernak |
LMS-based RF BIST architecture for multistandard transmitters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 131-136, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Chen Liu 0013, Jeyavijayan Rajendran, Chengmo Yang, Ramesh Karri |
Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 101-106, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Caleb Serafy, Ankur Srivastava 0001 |
Online TSV health monitoring and built-in self-repair to overcome aging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 224-229, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Lanfang Tan, Ying Tan, Jianjun Xu |
CFEDR: Control-flow error detection and recovery using encoded signatures monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 25-32, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Jianli Li, Qingping Tan |
SmartInjector: Exploiting intelligent fault injection for SDC rate analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 236-242, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Alexandre Sarafianos, Mathieu Lisart, Olivier Gagliano, Valerie Serradeil, Cyril Roscian, Jean-Max Dutertre, Assia Tria |
Robustness improvement of an SRAM cell against laser-induced fault injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 149-154, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Rafal Baranowski, Alejandro Cook, Michael E. Imhof, Chang Liu 0010, Hans-Joachim Wunderlich |
Synthesis of workload monitors for on-line stress prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 137-142, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Qiaoyan Yu, Jonathan Frey |
Exploiting error control approaches for Hardware Trojans on Network-on-Chip links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 266-271, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Glenn H. Chapman, Rohit Thomas, Israel Koren, Zahava Koren |
Improved image accuracy in Hot Pixel degraded digital cameras. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 172-177, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Sushmita Kadiyala Rao, Ryan W. Robucci, Chintan Patel |
Framework for dynamic estimation of power-supply noise and path delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 272-277, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Meilin Zhang, Paul Ampadu |
Variation-tolerant cache by two-layer error control codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 161-166, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kouta Maebashi, Kazuteru Namba, Masato Kitakami |
Testing of switch blocks in TSV-reduced Three-Dimensional FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 302-307, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kazuteru Namba, Fabrizio Lombardi |
A novel scheme for concurrent error detection of OLS parallel decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 52-57, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Pedro Reviriego, Shih-Fu Liu, Juan Antonio Maestro, S. Lee, Nur A. Touba, Rudrajit Datta |
Implementing triple adjacent Error Correction in double error correction Orthogonal Latin Squares Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 167-171, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Majid Yazdani, Giovanni De Micheli |
A fast TCAD-based methodology for Variation analysis of emerging nano-devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 83-88, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Elena I. Vatajelu, Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard 0001, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frédéric Saigné |
On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 143-148, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ting An, Lirida Alves de Barros Naviner, Philippe Matherat |
A low cost reliable architecture for S-Boxes in AES processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 155-160, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Matheus T. Moreira, Bruno S. Oliveira, Fernando Gehm Moraes, Ney Laert Vilar Calazans |
Charge sharing aware NCL gates design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 212-217, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael |
DaemonGuard: O/S-assisted selective software-based Self-Testing for multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 45-51, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Aleksandar Simevski, Rolf Kraemer, Milos Krstic |
Automated integration of fault injection into the ASIC design flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 255-260, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat |
Evaluating CLB designs under multiple SETs in SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 112-117, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel |
BIST for logic and local interconnect resources in a novel mesh of cluster FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 296-301, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | |
2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![IEEE Computer Society The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
1 | Kun Bian, D. M. H. Walker, Sunil P. Khatri, Shayak Lahiri |
Mixed structural-functional path delay test generation and compaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 7-12, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Aamir Khan 0002, Hans G. Kerkhoff |
Analysing degradation effects in charge-redistribution SAR ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 65-70, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich |
SAT-based code synthesis for fault-secure circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 39-44, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Veit Kleeberger, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
Technology-aware system failure analysis in the presence of soft errors by Mixture Importance Sampling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 118-124, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Rance Rodrigues, Sandip Kundu |
A low power architecture for online detection of execution errors in SMT processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 33-38, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Manoj Kumar 0001, Pankaj Kumar Srivastava, Vijay Laxmi, Manoj Singh Gaur, Seok-Bum Ko |
Reconfigurable distributed fault tolerant routing algorithm for on-chip networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 290-295, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Naseef Mansoor, Amlan Ganguly, Manoj Prashanth Yuvaraj |
An energy-efficient and robust millimeter-wave Wireless Network-on-Chip architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 19-24, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Soroush Khaleghi, Wenjing Rao |
Spare sharing network enhancement for scalable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 249-254, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kaikai Liu, Hao Cai, Ting An, Lirida A. B. Naviner, Jean-François Naviner, Hervé Petit |
Reliability analysis of combinational circuits with the influences of noise and single-event transients. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 218-223, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Masayoshi Yoshimura, Amy Ogita, Toshinori Hosokawa |
A smart Trojan circuit and smart attack method in AES encryption circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 278-283, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi |
Impact of PVT variation on delay test of resistive open and resistive bridge defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 230-235, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Alexandru Paler, Josef Kinseher, Ilia Polian, John P. Hayes |
Approximate simulation of circuits with probabilistic behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 95-100, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Jianghao Guo, Qiang Han, Wen-Ben Jone, Yu-Liang Wu |
A cross-layer fault-tolerant design method for high manufacturing yield and system reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 71-76, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Patryk Skoncej |
Fault Injection Framework for embedded memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 77-82, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Natesh Ganesh, Neal G. Anderson |
On-chip error correction with unreliable decoders: Fundamental physical limits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 284-289, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Asad Amin Bawa, Muhammad Tauseef Rab, Nur A. Touba |
Efficient compression of x-masking control data via dynamic channel allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 125-130, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yu-Wei Lee, Nur A. Touba |
Unified 3D test architecture for variable test data bandwidth across pre-bond, partial stack, and post-bond test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 184-189, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | J.-Y. Hung, Noh-Jin Park, K. M. George, Nohpill Park |
Modeling and analysis of repair and maintenance processes in Fault Tolerant Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 261-265, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Classes of difficult-to-diagnose transition fault clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 1-6, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Amir-Pasha Mirbaha, Jean-Max Dutertre, Assia Tria |
Differential analysis of Round-Reduced AES faulty ciphertexts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 204-211, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Gustavo K. Contreras, Md. Tauhidur Rahman 0001, Mohammad Tehranipoor |
Secure Split-Test for preventing IC piracy by untrusted foundry and assembly. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 196-203, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Stefano Campitelli, Marco Ottavi, Salvatore Pontarelli, Alessandro Marchioro, Daniele Felici, Fabrizio Lombardi |
F-DICE: A multiple node upset tolerant flip-flop for highly radioactive environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 107-111, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Cristiana Bolchini, Elisa Quintarelli, Fabio Salice, Paolo Garza |
A data mining approach to incremental adaptive functional diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 13-18, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Cristiana Bolchini, Matteo Carminati, Antonio Miele, Anup Das 0001, Akash Kumar 0001, Bharadwaj Veeravalli |
Run-time mapping for reliable many-cores based on energy/performance trade-offs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 58-64, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Chandra Babu Dara, Themistoklis Haniotakis, Spyros Tragoudas |
Low power and high speed current-mode memristor-based TLGs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 89-94, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen, Sudipta Bhawmik |
Impact of mid-bond testing in 3D stacked ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 178-183, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Hassan Salmani, Mohammad Tehranipoor |
Analyzing circuit vulnerability to hardware Trojan insertion at the behavioral level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 190-195, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|