| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yoon Jongkwan, Yoshiki Yamaguchi, Yowichi Fujita, Yoshinori Fukao, Eitaro Hamada, Tetsuichi Kishishita, Youichi Igarashi, Masayoshi Shoji, Kazuki Ueno |
FPGA-based detector with SiC sensing for real-time monitoring of muon beams: A preliminary report of the SCIBER-1 system in COMET Phase-α.  |
HEART  |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sai Sanjeet, Sannidhi Boppana, Bibhu Datta Sahoo 0002, Masahiro Fujita |
Noise Resilience of Reduced Precision Neural Networks. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Omar Tahir, Wayne Luk, Nicolas Wu |
Extensible Embedded Hardware Description Languages with Compilation, Simulation and Verification. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Riadh Ben Abdelhamid, Gen Kuwazawa, Yoshiki Yamaguchi |
Quantitative study of floating-point precision on modern FPGAs. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Anderson, Boma A. Adhi, Carlos Cortes, Emanuele Del Sozzo, Omar Ragheb, Kentaro Sano |
Exploration of Compute vs. Interconnect Tradeoffs in CGRAs for HPC. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Pudi Dhilleswararao, Rajeev Ryansh, Srinivas Boppu, Yu Yang, Ahmed Hemani |
Efficient Implementation of 2-D Convolution on DRRA and DiMArch Architectures. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamed A. Elgammal, Vaughn Betz |
Breaking Boundaries: Optimizing FPGA CAD with Flexible and Multi-threaded Re-Clustering. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Karl F. A. Friebel, Jiahong Bi, Jerónimo Castrillón |
base2: An IR for Binary Numeral Types. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Gerbrand De Laender, Erik H. D'Hollander |
ZyPy: Intercepting NumPy operations for acceleration on FPGAs. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | |
Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2023, Kusatsu, Japan, June 14-16, 2023 |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Hideharu Amano |
Efficient FPGA Implementation of Amoeba-inspired SAT Solver with Feedback and Bounceback Control: Harnessing Variable-Level Parallelism for Large-Scale Problem Solving in Edge Computing. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Akmal Shafique, Kashif Inayat, Jeong-A Lee |
CSA Based Radix-4 Gemmini Systolic Array for Machine Learning Applications. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Md. Ashraful Islam, Kenji Kise |
Resource-efficient RISC-V Vector Extension Architecture for FPGA-based Accelerators. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Jan-Oliver Opdenhövel, Christian Plessl, Tobias Kenter |
Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Stewart Denholm, Wayne Luk |
Customisable Processing of Neural Networks for FPGAs. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohamed A. Elgammal, Omar Mohamed Awad, Isak Edo Vivancos, Andreas Moshovos, Vaughn Betz |
cuSCNN : an Efficient CUDA Implementation of Sparse CNNs. |
HEART |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Ryuichi Sakamoto, Yuriko Ezaki, Masaaki Kondo |
Hash Distributed A* on an FPGA. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Maximilian Karle, Marius Kreutzer, Johannes Pfau, Jürgen Becker 0001 |
A hardware/software co-design approach to prototype 6G mobile applications inside the GNU Radio SDR Ecosystem using FPGA hardware accelerators. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Luc Forget, Gauthier Harnisch, Ronan Keryell, Florent de Dinechin |
A single-source C++20 HLS flow for function evaluation on FPGA and beyond. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaijie Wei, Yuki Kuno, Masatoshi Arai, Hideharu Amano |
RT-libSGM: An Implementation of a Real-time Stereo Matching System on FPGA. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Satoshi Kaneko, Hiroyuki Takizawa, Kentaro Sano |
A SYCL-based high-level programming framework for HPC programmers to use remote FPGA clusters. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Qianzhou Wang, Yat Wong, Zhiqiang Que, Wayne Luk |
Verifying Hardware Optimizations for Efficient Acceleration. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Brown, Tim Todman, Wayne Luk, David B. Thomas, Mark Vousden, Graeme M. Bragg, Jonny Beaumont, Simon W. Moore, Alex Yakovlev, Ashur Rafiev |
Non-deterministic event brokered computing. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessio Carpegna, Stefano Di Carlo, Alessandro Savino |
Artificial Resilience in neuromorphic systems. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Radhit Dedania, Sang-Woo Jun |
Very Low Power High-Frequency Floating Point FPGA PID Controller. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Keisuke Kamahori, Shinya Takamaeda-Yamazaki |
Accelerating Decision Tree Ensemble with Guided Branch Approximation. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tatsuma Mori, Daiki Furukawa, Keigo Motoyoshi, Haruto Ikehara, Kaito Ohira, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano |
Stream Computation of 3D Approximate Convex Hulls with an FPGA. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuka Sano, Ryohei Kobayashi, Norihisa Fujita, Taisuke Boku |
Performance Evaluation on GPU-FPGA Accelerated Computing Considering Interconnections between Accelerators. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mouad Rifai, Lennart Johnsson |
Memory and Energy Efficient Memory Model and Instruction Set Architectures for Tree Data Structures. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tomohiro Ueno, Takaaki Miyajima, Kentaro Sano |
FPGA-Dedicated Network vs. Server Network for Pipelined Computing with Multiple FPGAs. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jessica Vandebon, José Gabriel F. Coutinho, Wayne Luk |
Meta-Programming Design-Flow Patterns for Automating Reusable Optimisations. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Klaisoongnoen, Nick Brown 0002, Oliver Thomson Brown |
Low-power option Greeks: Efficiency-driven market risk analysis using FPGAs. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | |
HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9 - 10, 2022 |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yoshiki Kunimoto, Tsutomu Maruyama |
Object Detection and Tracking using CouNT and Motion Vectors on FPGA. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mostafa Koraei, Petter Lefoka |
A Novel Scalable Decision Tree Implementation on SoC Based FPGAs. |
HEART |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Akinobu Tomori, Yasunori Osana |
Kyokko: a vendor-independent high-speed serial communication controller. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Klaisoongnoen, Nick Brown 0002, Oliver Thomson Brown |
I feel the need for speed: Exploiting latest generation FPGAs in providing new capabilities for high frequency trading. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Lennart Clausing |
ReconOS64: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ryohei Kobayashi, Kento Miura, Norihisa Fujita, Taisuke Boku, Toshiyuki Amagasa |
A Sorting Library for FPGA Implementation in OpenCL Programming. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroaki Suzuki, Wataru Takahashi 0002, Kazutoshi Wakabayashi, Hideharu Amano |
A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Artur Podobas, Martin Svedin, Steven Wei Der Chien, Ivy Bo Peng, Naresh Balaji Ravichandran, Pawel Andrzej Herman, Anders Lansner, Stefano Markidis |
StreamBrain: An HPC Framework for Brain-like Neural Networks on CPUs, GPUs and FPGAs. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Svedin, Steven Wei Der Chien, Gibson Chikafa, Niclas Jansson, Artur Podobas |
Benchmarking the Nvidia GPU Lineage: From Early K80 to Modern A100 with Asynchronous Memory Transfers. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Tim Hansmeier |
Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Schulz 0001, Dieter Kranzlmüller, Laura Brandon Schulz, Carsten Trinitis, Josef Weidendorfer |
On the Inevitability of Integrated HPC Systems and How they will Change HPC System Operations. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Plessl, Paul Chow, Marco Platzner (eds.) |
HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Virtual Event, Germany, 21-23 June, 2021. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuya Nakazato, Motoki Amagasaki, Qian Zhao 0001, Masahiro Iida, Morihiro Kuga |
Automation of Domain-specific FPGA-IP Generation and Test. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantina Koliogeorgi, Sotirios Xydis, Dimitrios Soudris |
FPGA Acceleration of Short Read Alignment. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Marius Meyer |
Towards Performance Characterization of FPGAs in Context of HPC using OpenCL Benchmarks. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Kosuke Tatsumura |
Large-scale combinatorial optimization in real-time systems by FPGA-based accelerators for simulated bifurcation. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jieming Xu, Miriam Leeser |
Accelerating Matrix Processing for MIMO Systems. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | James Thomas 0003, Chris Lavin, Alireza Kaviani |
Software-like Compilation for Data Center FPGA Accelerators. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Konrad Moren, Diana Göhringer |
CoopCL: A Framework for Cooperative Execution of Data-parallel Kernels on Multi-device Platforms. |
HEART |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Iman Firmansyah, Changdao Du, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku |
FPGA-based Implementation of Memory-Intensive Application using OpenCL. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Luc Forget, Yohann Uguen, Florent de Dinechin, David Thomas 0001 |
A type-safe arbitrary precision arithmetic portability layer for HLS tools. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | |
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2019, Nagasaki, Japan, June 6-7, 2019. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Noda, Manfred Orsztynowicz, Kensuke Iizuka, Takaaki Miyajima, Naoyuki Fujita, Hideharu Amano |
An ARM-based heterogeneous FPGA accelerator for Hall thruster simulation. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ryusuke Egawa, Ryoma Saito, Masayuki Sato 0001, Hiroaki Kobayashi |
A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Takaaki Miyajima, Tomoya Hirao, Naoya Miyamoto, Jeongdo Son, Kentaro Sano |
A software bridged data transfer on a FPGA cluster by using pipelining and InfiniBand verbs. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Changdao Du, Yoshiki Yamaguchi |
A High-Level Synthesis Design for a Scalable Hydrodynamic Simulation on OpenCL FPGA Platform. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Miho Yamakura, Kazuei Hironaka, Keita Azegami, Kazusa Musha, Hideharu Amano |
The Evaluation of Partial Reconfiguration for a Multi-board FPGA System FiCSW. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hideki Takase, Tomoya Mori, Kazuyoshi Takagi, Naofumi Takagi |
mROS: A Lightweight Runtime Environment for Robot Software Components onto Embedded Devices. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hossein Omidian, Guy G. F. Lemieux |
Software-based Dynamic Overlays Require Fast, Fine-grained Partial Reconfiguration. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kazuya Matsumoto, Naohito Nakasato, Toshiaki Hishinuma |
Effectiveness of performance tuning techniques for general matrix multiplication on the PEZY-SC2. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Anuj Vaishnav, Khoa Dang Pham, Dirk Koch |
Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jens Huthmann, Shin Abiko, Artur Podobas, Kentaro Sano, Hiroyuki Takizawa |
Scaling Performance for N-Body Stream Computation with a Ring of FPGAs. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kristiyan Manev, Anuj Vaishnav, Charalampos Kritikakis, Dirk Koch |
Scalable Filtering Modules for Database Acceleration on FPGAs. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Brett Grady, Jason Helge Anderson |
Physical Design Considerations for Synthesizable Standard-Cell-Based FPGAs. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander Klemd, Marcel Eckert, Bernd Klauer, Jonas Hanselka, Delf Sachau |
A Parameterizable Feedback FxLMS Architecture for FPGA Platforms. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiromu Miyazaki, Junya Miura, Kenji Kise |
An Efficient Instruction Fetch Architecture for a RISC-V Soft Processor on an FPGA. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuxi Sun 0001, Akram Ben Ahmed, Hideharu Amano |
Acceleration of Deep Recurrent Neural Networks with an FPGA cluster. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ryota Watanabe, Saika Ura, Qian Zhao 0001, Takaichi Yoshida |
Implementation of FPGA Building Platform as a Cloud Service. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Fumiya Kono, Naohito Nakasato |
Performance Evaluation of Tsunami Simulation Exploiting Temporal Parallelism on FPGAs using OpenCL. |
HEART |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Piero Rivera Benois, Patrick Nowak, Udo Zölzer, Marcel Eckert, Bernd Klauer |
Low-Latency FIR Filter Structures Targeting FPGA Platforms. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Bain Syrowik, Blair Fort, Stephen Dean Brown |
Use of CPU Performance Counters for Accelerator Selection in HLS-Generated CPU-Accelerator Systems. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Haoxuan Cheng, Shimpei Sato, Hiroki Nakahara |
A Performance Per Power Efficient Object Detector on an FPGA for Robot Operating System (ROS). |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew C. Ling, Mohamed S. Abdelfattah, Shane O'Connell, Andrew Bitar, David Han, Roberto DiCecco, Suchit Subhaschandra, Chris N. Johnson, Dmitry Denisenko, Joshua Fender, Gordon R. Chiu |
Harnessing Numerical Flexibility for Deep Learning on FPGAs. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreea-Ingrid Cross, Liucheng Guo, Wayne Luk, Mark Salmon |
CJS: Custom Jacobi Solver. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara |
Power Efficient Object Detector with an Event-Driven Camera on an FPGA. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | David Wilson 0004, Greg Stitt, James Coole |
A Recurrently Generated Overlay Architecture for Rapid FPGA Application Development. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Kenji Kise |
Swap Based Merge Network for High Performance Sorting Accelerators. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Masoud Oveis Gharan, Gul N. Khan |
Flexible Reconfigurable On-chip Networks for Multi-core SoCs. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Sanaullah, Martin C. Herbordt |
FPGA HPC using OpenCL: Case Study in 3D FFT. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mokhles A. Mohsin, Darshika G. Perera |
An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Yasmin Afsharnejad, Abdul-Amir Yassine, Omar Ragheb, Paul Chow, Vaughn Betz |
HLS-based FPGA Acceleration of Light Propagation Simulation in Turbid Media. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | |
Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2018, Toronto, ON, Canada, June 20-22, 2018 |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Jesse Schmitz, Lei Zhang 0092 |
FPGA Hardware Implementation and Optimization for Neural Network based Chaotic System Design. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Takuya Kojima, Naoki Ando, Yusuke Matshushita, Hayate Okuhara, Ng. Anh Vu Doan, Hideharu Amano |
Real Chip Evaluation of a Low Power CGRA with Optimized Application Mapping. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheming Jin, Hal Finkel |
A Case Study of Integer Sum Reduction using Atomics. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Jinpil Lee, Tomohiro Ueno, Mitsuhisa Sato, Kentaro Sano |
High-productivity Programming and Optimization Framework for Stream Processing on FPGA. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Jongsok Choi, Ruolong Lian, Zhi Li, Andrew Canis, Jason Helge Anderson |
Accelerating Memcached on AWS Cloud FPGAs. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Alan Ehret, Peter Jamieson, Michel A. Kinsy |
Scalable Open-Source Reconfigurable Architecture for Bacterial Quorum Sensing Simulations. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Deshya Wijesundera, Alok Prakash, Thilina Perera, Kalindu Herath, Thambipillai Srikanthan |
Wibheda+: Framework for Data Dependency-aware Multi-constrained Hardware-Software Partitioning in FPGA-based SoCs for IoT Applications. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Yuma Oobata, Taisuke Boku, Makito Abe, Kohji Yoshikawa, Masayuki Umemura |
Accelerating Space Radiative Transfer on FPGA using OpenCL. |
HEART |
2018 |
DBLP DOI BibTeX RDF |
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| 1 | Charles Shelor, Krishna M. Kavi |
Dataflow based Near Data Computing Achieves Excellent Energy Efficiency. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
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| 1 | Yuto Ishikawa, Keitaro Yanai, Keisuke Koike, Takefumi Miyoshi, Hironori Nakajo |
Hardware Acceleration with Multi-Threading of Java-Based High Level Synthesis Tool. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
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| 1 | Oliver Jakob Arndt, Christian Spindeldreier, Kevin Wohnrade, Daniel Pfefferkorn, Martin Neuenhahn, Holger Blume |
FPGA Accelerated NoC-Simulation: A Case Study on the Intel Xeon Phi Ringbus Topology. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiajun Li, Qiang Liu 0011 |
Neural Network Training Acceleration with PSO Algorithm on a GPU Using OpenCL. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
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| 1 | Jose Raul Garcia Ordaz, Dirk Koch |
HLS Compilation for CPU Interlays. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
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| 1 | Shin Morishima, Masahiro Okazaki, Hiroki Matsutani |
A Case for Remote GPUs over 10GbE Network for VR Applications. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
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| 1 | Yuhei Sugata, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota |
Acceleration of Publish/Subscribe Messaging in ROS-compliant FPGA Component. |
HEART |
2017 |
DBLP DOI BibTeX RDF |
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