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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2784 occurrences of 1319 keywords
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Results
Found 4097 publication records. Showing 4097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Marc Herbstritt, Bernd Becker 0001, Christoph Scholl 0001 |
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 37-44, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Jianmin Zhang, Ming Yan 0003, Sikun Li |
Debug Support for Scalable System-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 83-87, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Vijay Gangaram, Deepa Bhan, James K. Caldwell |
Functional Test Selection for High Volume Manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 15-19, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Functional Test Sequences, Fault Simulation Acceleration, Untestable Fault Identification, Design Validation, Test Sequence Compaction |
12 | Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu |
Diagnosing Silicon Failures Based on Functional Test Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 94-98, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
fault diagnosis, Silicon debug, design for debug |
12 | Heon-Mo Koo, Prabhat Mishra 0001, Jayanta Bhadra, Magdy S. Abadir |
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 33-36, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Paolo Bernardi, Letícia Maria Veiras Bolzani, Alberto Manzone, Massimo Osella, Massimo Violante, Matteo Sonza Reorda |
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 3-8, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Sean Safarpour, Andreas G. Veneris |
Abstraction and Refinement Techniques in Automated Design Debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 88-93, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | |
Program Committee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena |
A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 40(1), pp. 52-59, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Norman J. Rohrer, Cédric Lichtenau, Peter A. Sandon, Paul Kartschoke, Erwin B. Cohen, Miles G. Canada, Thomas Pflüger, Mathew I. Ringler, Rolf B. Hilgendorf, Stephen F. Geissler, Jeffrey S. Zimmerman |
A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 40(1), pp. 19-27, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Howard Levy, Ha Pham, Jinseung Son, Nathan Moon, Dina Bistry, Umesh Nair, Mandeep Singh, Vikas Mathur, Ana Sonia Leon |
A dual-core 64-bit ultraSPARC microprocessor for dense server applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 40(1), pp. 7-18, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Masakatsu Nakai, Satoshi Akui, Katsunori Seno, Tetsumasa Meguro, Takahiro Seki, Tetsuo Kondo, Akihiko Hashiguchi, Hirokazu Kawahara, Kazuo Kumano, Masayuki Shimura |
Dynamic voltage and frequency management for a low-power embedded microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 40(1), pp. 28-35, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jerzy Kotlinski |
Microprocessor controller for EL-1 ID ellipsometer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. UMCS Informatica ![In: Ann. UMCS Informatica 3(1), pp. 253-261, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
12 | Fulvio Corno, Ernesto Sánchez 0001, Giovanni Squillero |
Evolving assembly programs: how games help microprocessor validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Evol. Comput. ![In: IEEE Trans. Evol. Comput. 9(6), pp. 695-706, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Takahiro Seki, Satoshi Akui, Katsunori Seno, Masakatsu Nakai, Tetsumasa Meguro, Tetsuo Kondo, Akihiko Hashiguchi, Hirokazu Kawahara, Kazuo Kumano, Masayuki Shimura |
Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 88-C(4), pp. 520-527, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Dave W. Victor, John M. Ludden, Richard D. Peterson, Bradley S. Nelson, W. Keith Sharp, James K. Hsu, Bing-Lun Chu, Michael L. Behm, Rebecca M. Gott, Audre D. Romonosky, Steven R. Farago |
Functional verification of the POWER5 microprocessor and POWER5 multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 49(4-5), pp. 541-554, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Gautam Sarkar, Anindita Dasgupta, Anish Deb |
Microprocessor-based simulation of sampled data systems with/without a hold device using a set of sample-and-hold functions and Dirac delta functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Frankl. Inst. ![In: J. Frankl. Inst. 342(1), pp. 85-95, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jayanta Bhadra, Andrew K. Martin, Jacob A. Abraham |
A Formal Framework for Verification of Embedded Custom Memories of the Motorola MPC7450 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 27(1-2), pp. 67-112, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
efficient memory models, embedded memory verification, custom circuit verification, equivalence checking, symbolic trajectory evaluation |
12 | Hannu Olkkonen, Juuso T. Olkkonen, Peitsa Pesola |
Efficient lifting wavelet transform for microprocessor and VLSI applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Signal Process. Lett. ![In: IEEE Signal Process. Lett. 12(2), pp. 120-122, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Pasquale Corsonello, Stefania Perri, Paolo Zicari, Giuseppe Cocorullo |
Microprocessor-based FPGA implementation of SPIHT image compression subsystems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 29(6), pp. 299-305, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | M. A. Aguirre, Jonathan Noel Tombs, Vicente Baena Lecuyer, Jose Luis Mora, Juan Manuel Carrasco Solís, Antonio Jesús Torralba Silgado, Leopoldo García Franquelo |
Microprocessor and FPGA interfaces for in-system co-debugging in field programmable hybrid systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 29(2-3), pp. 75-85, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Paul M. Belemjian, Okan Erdogan, Russell P. Kraft, John F. McDonald 0001 |
SiGe HBT Microprocessor Core Test Vehicle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 93(9), pp. 1669-1678, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Matthias Menge |
Mikroprozessor im Hardware-/Software-Codesign (Microprocessor by Hardware-/Software-Codesign). ![Search on Bibsonomy](Pics/bibsonomy.png) |
it Inf. Technol. ![In: it Inf. Technol. 47(1), pp. 36-44, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Giacinto Paolo Saggese, Anoop Vetteth, Zbigniew Kalbarczyk, Ravishankar K. Iyer |
Microprocessor Sensitivity to Failures: Control vs Execution and Combinational vs Sequential Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June - 1 July 2005, Yokohama, Japan, Proceedings, pp. 760-769, 2005, IEEE Computer Society, 0-7695-2282-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Robert P. Colwell |
Where Intel's Microprocessor Architecture is Going. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ERSA ![In: Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 2005, Las Vegas, Nevada, USA, June 27-30, 2005, pp. 3-6, 2005, CSREA Press, 1-932415-74-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
12 | Magdy S. Abadir, Li-C. Wang (eds.) |
Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![IEEE Computer Society, 0-7695-2627-6 The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
12 | Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001 |
Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 59-68, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Snaider L. Carrillo, Agenor Z. Polo, Mario P. Esmeral |
Design and implementation of an embedded microprocessor compatible with IL language in accordance to the norm IEC 61131-3. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2005 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2005, Puebla City, Mexico, September 28-30, 2005, 2005, IEEE Computer Society, 0-7695-2456-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Xiaoping Zhu, Teng-Tiow Tay |
A Compiler-Controlled Instruction Cache Architecture for an Embedded Low Power Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: Fifth International Conference on Computer and Information Technology (CIT 2005), 21-23 September 2005, Shanghai, China, pp. 815-821, 2005, IEEE Computer Society, 0-7695-2432-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Pejman Lotfi-Kamran, Mohammad Hosseinabady, Hamid Shojaei, Mehran Massoumi, Zainalabedin Navabi |
TED+: a data structure for microprocessor verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 567-572, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Bor-Chin Chang 0001, Chunlong Hu, Mark Ilg |
Design and DSP microprocessor implementation of digital sinusoidal tracking controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACC ![In: American Control Conference, ACC 2005, Portland, OR, USA, 8-10 June, 2005, pp. 4947-4952, 2005, IEEE, 0-7803-9098-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Yue Luo, Lizy Kurian John |
On sampling unit size in sampled microprocessor simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPCCC ![In: Proceedings of the 24th IEEE International Performance Computing and Communications Conference, IPCCC 2005, April 7-9, 2005, Phoenix, Arizona, USA, pp. 81-90, 2005, IEEE, 0-7803-8991-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Leonidas G. Bleris, Mayuresh V. Kothare |
Implementation of Model Predictive Control for Glucose Regulation on a General Purpose Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC/ECC ![In: 44th IEEE IEEE Conference on Decision and Control and 8th European Control Conference Control, CDC/ECC 2005, Seville, Spain, 12-15 December, 2005, pp. 5162-5167, 2005, IEEE, 0-7803-9567-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat |
Division by Constant for the ST100 DSP Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 27-29 June 2005, Cape Cod, MA, USA, pp. 124-130, 2005, IEEE Computer Society, 0-7695-2366-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Reza Azimi, Michael Stumm, Robert W. Wisniewski |
Online performance analysis by statistical sampling of microprocessor performance counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005, Cambridge, Massachusetts, USA, June 20-22, 2005, pp. 101-110, 2005, ACM, 1-59593-167-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Aurangzeb Khan, Philip Watson, George Kuo, Due Le, Trung-Kien Nguyen, Steven Yang, P. Bennet, Pokai Huang, Jaspal Gill, Demin Wang, Irfan Ahmed, Peter Tran, Helder Mak, Oanh Kim, Frank Martin, Yimu Fan, D. Ge, Joseph Kung, Vincent Shek |
A 90nm power optimization methodology and its' application to the ARM 1136SF-S microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005, pp. 771-774, 2005, IEEE, 0-7803-9023-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Padraig J. O'Dowd, Philip D. Healy, John P. Morrison |
A Condensed Graph Microprocessor to Drive Parallel Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDPTA ![In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2005, Las Vegas, Nevada, USA, June 27-30, 2005, Volume 3, pp. 979-983, 2005, CSREA Press, 1-932415-60-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
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12 | Olivier Caty, Peter Dahlgren, Ismet Bayraktaroglu |
Microprocessor silicon debug based on failure propagation tracing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005, pp. 10, 2005, IEEE Computer Society, 0-7803-9038-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Peilin Song, Franco Stellari, Bill Huott, Otto Wagner, Uma Srinivasan 0002, Yuen H. Chan, Rick Rizzolo, H. J. Nam, James P. Eckhardt, Timothy G. McNamara, Ching-Lung Tong, Alan J. Weger, Moyra K. McManus |
An advanced optical diagnostic technique of IBM z990 eServer microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005, pp. 9, 2005, IEEE Computer Society, 0-7803-9038-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Yann-Hang Lee, Aung Oo |
Teaching microprocessor systems design using a SoC and Embedded Linux platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE@ISCA ![In: Proceedings of the 2005 workshop on Computer architecture education - held in conjunction with the 32nd International Symposium on Computer Architecture, WCAE@ISCA 2005, Madison, Wisconsin, USA, June 5, 2005, pp. 10, 2005, ACM, 978-1-4503-4734-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Pradip Bose |
Power-Aware, Reliable Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 3-6, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Kadir Erkan, Seda Postalcioglu, Emine Dogru Bolat |
Implementation of Microprocessor Based pH Process Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSC ![In: Proceedings of The 2005 International Conference on Scientific Computing, CSC 2005, Las Vegas, Nevada, USA, June 20-23, 2005, pp. 217-222, 2005, CSREA Press, 1-932415-62-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
12 | Dominic Pajak |
Specification of microprocessor instruction set architectures : ARM case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2005 |
RDF |
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12 | Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli |
A Pseudo-Deterministic Functional ATPG based on EFSM Traversing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 70-75, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Tobias Schubert 0001, Matthew D. T. Lewis, Bernd Becker 0001 |
PaMira - A Parallel SAT Solver with Knowledge Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 29-36, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | |
Acknowledgement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Nicola Bombieri, Andrea Fedeli, Franco Fummi |
On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 127-132, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | John Mark Nolen, Rabi N. Mahapatra |
A TDM Test Scheduling Method for Network-on-Chip Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 90-98, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Daniel Große, Ulrich Kühne, Rolf Drechsler |
HW/SW Co-Verification of a RISC CPU using Bounded Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 133-137, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Brian Kahne, Aseem Gupta, Peter Wilson, Nikil D. Dutt |
An Introduction to the Plasma Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 12-22, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Bin Xue, D. M. H. Walker |
Is IDDQ Test of Microprocessors Feasible? ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 63-69, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | |
Workshop Organizing Committee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | |
Preface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla |
Automated Extraction of Structural Information from SystemC-based IP for Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 99-104, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | |
Program Committee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Wei Qin, Sharad Malik |
A Study of Architecture Description Languages from a Model-based Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 3-11, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Marc Herbstritt, Bernd Becker 0001 |
On SAT-based Bounded Invariant Checking of Blackbox Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 23-28, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Soohong P. Kim |
Pre-Silicon Validation of IPF Memory Ordering for Multi-Core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 105-110, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jennifer Dworak |
An Investigation of Excitation Balance and Additional Mandatory Conditions for the Diagnosis of Fortuitously Detected Defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 48-54, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Moayad Fahim Ali, Sean Safarpour, Andreas G. Veneris, Magdy S. Abadir, Rolf Drechsler |
Post-Verification Debugging of Hierarchical Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 42-47, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Prabhat Mishra 0001, Heon-Mo Koo, Zhuo Huang |
Language-driven Validation of Pipelined Processors using Satisfiability Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 119-126, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Brian Kahne, Magdy S. Abadir |
Retiming Verification Using Sequential Equivalence Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 138-142, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jean-Olivier Plouchart, Jonghae Kim, Noah Zamdmer, Liang-Hung Lu, Melanie Sherony, Yue Tan, Robert A. Groves, Robert Trzcinski, Mohamed Talbi, Asit Ray, Lawrence F. Wagner |
A 4-91-GHz traveling-wave amplifier in a standard 0.12-μm SOI CMOS microprocessor technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 39(9), pp. 1455-1461, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Hai Li 0001, Swarup Bhunia, Yiran Chen 0001, Kaushik Roy 0001, T. N. Vijaykumar |
DCG: deterministic clock-gating for low-power microprocessor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(3), pp. 245-254, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Timothy J. Slegel, Erwin Pfeffer, Jeffrey A. Magee |
The IBM eServer z990 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 48(3-4), pp. 295-310, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Dean G. Bair, Steven M. German, William D. Wollyung, Edward J. Kaminski Jr., James Schafer, Michael P. Mullen, William J. Lewis, Rebecca Wisniewski, Joerg Walter, Steven Mittermaier, Visda Vokhshoori, Robert J. Adkins, Michael Halas, Thomas Ruane, Ursel Hahn |
Functional verification of the z990 superscalar, multibook microprocessor complex. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 48(3-4), pp. 347-366, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Kei Okada, Akira Fuyuno, Takeshi Morishita, Takashi Ogura, Yasumoto Ohkubo, Yasuyuki Kino, Masayuki Inaba, Hirochika Inoue |
Device Distributed Approach to Expandable Robot System Using Intelligent Device with Super-Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Robotics Mechatronics ![In: J. Robotics Mechatronics 16(2), pp. 208-216, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Arthur Shoihet, Michael A. Slonim |
New Topology For Soft Starting And Speed Regulation Of Wound Rotor Asynchronous Machine Controlled By Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 13(4), pp. 929-939, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Ali Chehab, Samer Hanna, Karim Y. Kabalan, Ali El-Hajj |
8085 microprocessor simulation tool "8085 SimuKit". ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Appl. Eng. Educ. ![In: Comput. Appl. Eng. Educ. 12(4), pp. 249-256, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Evelio J. González, Alberto F. Hamilton, Lorenzo Moreno Ruiz, Roberto L. Marichal, Santiago Torres Álvarez |
A set of microprocessor-based procedures for an industrial engineering course. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Appl. Eng. Educ. ![In: Comput. Appl. Eng. Educ. 12(3), pp. 145-151, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Nikita Pashenkov, Ryuichi Iwamasa |
One-Chip Solution to Intelligent Robot Control: Implementing Hexapod Subsumption Architecture Using a Contemporary Microprocessor ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/cs/0412056, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
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12 | Prabhat Mishra 0001, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir |
A Top-Down Methodology for Microprocessor Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 21(2), pp. 122-131, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | |
Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![IEEE Computer Society, 0-7695-2320-X The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
12 | Carlo Brandolese, William Fornaciari, Fabio Salice |
Discrete-Event Modeling and Simulation of Superscalar Microprocessor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 238-247, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Takashi Nakada, Hiroshi Nakashima |
Design and Implementation of a High Speed Microprocessor Simulator BurstScalar. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 12th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2004), 4-8 October 2004, Vollendam, The Netherlands, pp. 364-372, 2004, IEEE Computer Society, 0-7695-2251-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Pedro Trancoso |
What to Adapt in a High-Performance Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 556-563, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Russ Joseph, Zhigang Hu, Margaret Martonosi |
Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 36-47, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Yiran Chen 0001, Kaushik Roy 0001, Cheng-Kok Koh |
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 893-898, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Jorge Campos, Hussain Al-Asaad |
Mutation-based validation of high-level microprocessor implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Ninth IEEE International High-Level Design Validation and Test Workshop 2004, Sonoma Valley, CA, USA, November 10-12, 2004, pp. 81-86, 2004, IEEE Computer Society, 0-7803-8714-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Javier Sanchez-Pastor, Iván González 0004, Jorge López, Francisco J. Gomez-Arribas, Javier Martínez |
A Remote Laboratory for Debugging FPGA-Based Microprocessor Prototypes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALT ![In: Proceedings of the IEEE International Conference on Advanced Learning Technologies, ICALT 2004, Joensuu, Finland, August 30 - September 1, 2004, 2004, IEEE Computer Society, 0-7695-2181-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Cynthia Trigas, Stefan Doll, Joachim Kruecken |
MRAM and microprocessor system-in-package: technology stepping stone to advanced embedded devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC 2004, Orlando, FL, USA, October 2004, pp. 71-79, 2004, IEEE, 0-7803-8495-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Hector Arteaga, Hussain Al-Asaad |
Approaches for Monitoring Vectors on Microprocessor Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESA/VLSI ![In: Proceedings of the International Conference on Embedded Systems and Applications, ESA '04 & Proceedings of the International Conference on VLSI, VLSI '04, June 21-24, 2004, Las Vegas, Nevada, USA, pp. 393-398, 2004, CSREA Press, 1-932415-41-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
12 | Helmut Bähring, Jörg Keller 0001, Wolfram Schiffmann |
A combined virtual and remotely accessible microprocessor laboratory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE ![In: Proceedings of the 2004 workshop on Computer architecture education - Held in conjunction with the 31st International Symposium on Computer Architecture, WCAE@ISCA 2004, Munich, Germany, June 19, 2004, pp. 25, 2004, ACM, 978-1-4503-4733-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Ushaa Eswaran, Madhusudhana Rao Ganji, M. S. Thakur |
Microprocessor Based Biosensors for Determination of Toxins and Pathogens in Restricted Areas of Human Intervention. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IC-AI ![In: Proceedings of the International Conference on Artificial Intelligence, IC-AI '04, June 21-24, 2004, Las Vegas, Nevada, USA, Volume 1, pp. 525-, 2004, CSREA Press, 1-932415-31-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
12 | Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Ana Sonia Leon |
A dual-core 64b ultraSPARC microprocessor for dense server applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 673-677, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
L2, UltraSPARC, coupling noise, deep submicron technology, dense server, dual-core, throughput computing, cache, multiprocessor, leakage, NBTI, negative bias temperature instability |
12 | Michele Borgatti, Andrea Fedeli, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Cristina Marconcini, Graziano Pravadelli |
A Verification Methodology for Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 85-90, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Xiang Lu, Zhuo Li 0001, Wangqi Qiu, D. M. H. Walker, Weiping Shi |
A Circuit Level Fault Model for Resistive Shorts of MOS Gate Oxide. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 97-102, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Xiuli Sun, Jinzhao Wu, Xiaoyu Song, Mila E. Majster-Cederbaum |
Formal Specification of an Asynchronous Processor via Action Refinement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 36-41, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
pipelines, microprocessors, asynchronous circuits, Action refinement |
12 | Tobias Schubert 0001, Bernd Becker 0001 |
PICHAFF2 - A Hierarchical Parallel SAT Solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 56-61, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Moayad Fahim Ali, Andreas G. Veneris, Sean Safarpour, Magdy S. Abadir, Rolf Drechsler, Alexander Smith 0001 |
Debugging Sequential Circuits Using Boolean Satisfiability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 44-49, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | M. Moiz Khan, Spyros Tragoudas, Magdy S. Abadir, Jiang Brandon Liu |
Identification of Gates for Covering all Critical Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 92-96, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Arkan Abdulrahman, Spyros Tragoudas |
Compact ATPG for Concurrent SOC Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 16-21, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | |
Program Committee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner |
Extreme Formal Modeling (XFM) for Hardware Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 30-35, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Prabhat Mishra 0001, Nikil D. Dutt, Yaron Kashai |
Functional Verification of Pipelined Processors: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 79-84, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | |
Workshop Organizing Committee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | |
Acknowledgement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | |
Preface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Mark Litterick, Joachim Geishauser |
Robust Vera Coding Techniques for Gate-Level and Tester-Compliant SoC Verification Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 64-78, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Eyal Bin, Laurent Fournier |
Micro-Architecture Verification for Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 112-113, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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