Search results for "Codesign"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
37	Wayne H. Wolf	A Decade of Hardware/Software Codesign.	Computer	2003	DBLP DOI BibTeX RDF
37	Mouloud Koudil, Karima Benatchba, Daniel Dours	Using Genetic Algorithms for Solving Partitioning Problem in Codesign.	IWANN (2)	2003	DBLP DOI BibTeX RDF
37	Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk	A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable Computer.	FPL	2003	DBLP DOI BibTeX RDF
37	Pierre Wodey, Fabrice Baray	Linking Codesign and Verification by Means of E-LOTOS FDT.	EUROMICRO	1999	DBLP DOI BibTeX RDF
37	Jonathan Saul	Hardware/Software Codesign for FPGA-based Systems.	HICSS	1999	DBLP DOI BibTeX RDF
37	José Ignacio Hidalgo, Juan Lanchares	Functional Partitioning for Hardware-Software Codesign using Genetic Algorithms.	EUROMICRO	1997	DBLP DOI BibTeX RDF
37	Chie Dou	Integration of SDL and VHDL for HW/SW Codesign of Communication Systems.	EUROMICRO	1997	DBLP DOI BibTeX RDF
37	Jean Paul Calvez, Olivier Pasquier, James K. Peckol	Software Implementation Techniques for Hw/Sw Embedded Systems.	CODES	1997	DBLP DOI BibTeX RDF	Real-time software implementation, Multi-rate reactive systems, Multi-task software optimization, Embedded software, Dynamic scheduling, Software synthesis
37	Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers	Design-For-Debug in Hardware/Software Co-Design.	CODES	1997	DBLP DOI BibTeX RDF	system integration and test, hardware/software co-design, design validation, design-for-debug
37	Laurent Freund, Michel Israël, Frédéric Rousseau 0001, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat	A Codesign Experiment in Acoustic Echo Cancellation: GMDFa.	ISSS	1996	DBLP DOI BibTeX RDF
37	Jean Paul Calvez, Dominique Heller, Olivier Pasquier	Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems.	CODES	1996	DBLP DOI BibTeX RDF	Hw/Sw systems, uninterpreted model, Performance evaluation, Co-Simulation
37	Connie U. Smith, Geoffrey A. Frank, John L. Cuadrado	An architecture design and assessment system for software/hardware codesign.	DAC	1985	DBLP DOI BibTeX RDF
36	Randall S. Janka, Linda M. Wills, Lewis Benton Baumstark Jr.	Virtual Benchmarking and Model Continuity in Prototyping Embedded Multiprocessor Signal Processing Systems.	IEEE Trans. Software Eng.	2002	DBLP DOI BibTeX RDF	model continuity, open-standards middleware, specification and design methodology, Hardware/software codesign
36	Alain Girault, Clément Ménier	Automatic Production of Globally Asynchronous Locally Synchronous Systems.	EMSOFT	2002	DBLP DOI BibTeX RDF	Globally synchronous-locally asynchronous (GALS), asynchronous communications, hardware/software codesign, distributed architectures, synchronous circuits, automatic distribution
36	Ali Dasdan, Dinesh Ramanathan, Rajesh K. Gupta 0001	A timing-driven design and validation methodology for embedded real-time systems.	ACM Trans. Design Autom. Electr. Syst.	1998	DBLP DOI BibTeX RDF	period assignment, period derivation, rate assignment, rate derivation, timing-driven codesign, requirements analysis, timing analysis, system-level design, performance verification
36	Asawaree Kalavade, P. A. Subrahmanyam	Hardware/software partitioning for multi-function systems.	ICCAD	1997	DBLP DOI BibTeX RDF	multi-function systems, video encode/decode, system-level design, hardware/software partitioning, hardware-software codesign, core-based design
36	Raj S. Mitra, Mahmood G. Qadir, Anupam Basu	A consistent labeling approach to hardware software partitioning.	VLSI Design	1995	DBLP DOI BibTeX RDF	consistent labeling problem, implementation sets, real-time systems, heuristics, CAD, CAD, computer aided software engineering, hardware/software codesign, hardware/software partitioning, embedded systems design, combinatorial problem, combinatorial mathematics
32	Jiang Xu 0001, Wayne H. Wolf, Jörg Henkel, Srimat T. Chakradhar	A design methodology for application-specific networks-on-chip.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	regular topology, architecture, methodology, networks-on-chip, Application-specific
32	Abel Guilhermino Silva-Filho, Alejandro César Frery, Cristiano C. de Araújo, Haglay Alice, Jorge Cerqueira, Juliana A. Loureiro, Manoel Eusébio de Lima, Maria das Gracas S. Oliveira, Michelle Matos Horta	Hyperspectral Images Clustering on Reconfigurable Hardware Using the K-Means Algorithm.	SBCCI	2003	DBLP DOI BibTeX RDF
32	Heather Quinn, Laurie A. Smith King, Miriam Leeser, Waleed Meleis	Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines.	FCCM	2003	DBLP DOI BibTeX RDF
32	David L. Rhodes, Wayne H. Wolf	RAGS-real-analysis ALAP-guided synthesis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
31	Jenna Frens, Lindsey Rasie, Victoria Hollis	Photography Community Codesign (a.k.a. Codesign in a Global Pandemic).	CHI Extended Abstracts	2022	DBLP DOI BibTeX RDF
31	Yunji Qin, Lei Gong, Zhendong Zheng, Chao Wang 0003	Work-in-Progress: BloCirNN: An Efficient Software/hardware Codesign Approach for Neural Network Accelerators with Block-Circulant Matrix.	CODES+ISSS	2022	DBLP DOI BibTeX RDF
31	Mohamed S. Abdelfattah, Lukasz Dudziak, Thomas Chau 0001, Royson Lee, Hyeji Kim, Nicholas D. Lane	Codesign-NAS: Automatic FPGA/CNN Codesign Using Neural Architecture Search.	FPGA	2020	DBLP DOI BibTeX RDF
31	Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Zhiwu Li 0001, Khalid Abdulaziz Alnowibet, Marco Platzner	R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints.	IEEE Access	2018	DBLP DOI BibTeX RDF
31	Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Marco Platzner	I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems.	ICSOFT (Selected Papers)	2016	DBLP DOI BibTeX RDF
31	Stephen A. Edwards	MEMOCODE 2012 hardware/software codesign contest: DNA sequence aligner.	MEMOCODE	2012	DBLP DOI BibTeX RDF
31	Derek Chiou	MEMOCODE 2011 Hardware/Software CoDesign Contest: NoC simulator.	MEMOCODE	2011	DBLP DOI BibTeX RDF
31	Oleg S. Medvedev, Ilya Posov	Using hardware-software codesign language to implement CANSCID.	MEMOCODE	2010	DBLP DOI BibTeX RDF
31	Marco Bozzano, Alessandro Cimatti, Marco Roveri, Joost-Pieter Katoen, Viet Yen Nguyen, Thomas Noll 0001	Codesign of dependable systems: A component-based modeling language.	MEMOCODE	2009	DBLP DOI BibTeX RDF
31	Matthias Menge	Mikroprozessor im Hardware-/Software-Codesign (Microprocessor by Hardware-/Software-Codesign).	it Inf. Technol.	2005	DBLP DOI BibTeX RDF
31	Randall S. Janka, Linda M. Wills	A novel codesign methodology for real-time embedded COTS multiprocessor-based signal processing systems.	CODES	2000	DBLP DOI BibTeX RDF	MPI/RT, VSIPL, specification and design methodology, middleware, MPI, embedded, COTS, multiprocessing, MAGIC
31	Dinesh Ramanathan, Ali Dasdan, Rajesh K. Gupta 0001	Timing-driven HW/SW codesign based on task structuring and process timing simulation.	CODES	1999	DBLP DOI BibTeX RDF
31	Peter Voigt Knudsen, Jan Madsen	Graph based communication analysis for hardware/software codesign.	CODES	1999	DBLP DOI BibTeX RDF
31	I. D. Bates, E. Graeme Chester, David J. Kinniment	A statechart based HW/SW codesign system.	CODES	1999	DBLP DOI BibTeX RDF	CFSMs, POLIS, statecharts
31	Peter Voigt Knudsen, Jan Madsen	Communication estimation for hardware/software codesign.	CODES	1998	DBLP DOI BibTeX RDF
31	Sanjaya Kumar, Fred Rose	A Codesign Environment Supporting Hardware/Software Modeling at Different Levels of Detail.	CODES	1997	DBLP DOI BibTeX RDF	performance evaluation, hybrid modeling, multi-level modeling
31	Wayne Luk, Teddy Wu	Towards a declarative framework for hardware-software codesign.	CODES	1994	DBLP DOI BibTeX RDF
31	Stefano Antoniazzi, Alessandro Balboni, William Fornaciari, Donatella Sciuto	A methodology for control-dominated systems codesign.	CODES	1994	DBLP DOI BibTeX RDF
30	Omer Khan, Sandip Kundu	Hardware/Software Codesign Architecture for Online Testing in Chip Multiprocessors.	IEEE Trans. Dependable Secur. Comput.	2011	DBLP DOI BibTeX RDF	hard error detection, isolation and tolerance, Chip Multiprocessor (CMP), hardware/software codesign
30	Derek F. Reilly, Stephen Voida, Matt McKeon, Christopher A. Le Dantec, Jonathan Bunde-Pedersen, W. Keith Edwards, Elizabeth D. Mynatt, Ali Mazalek, Roy Want	Space Matters: Physical-Digital and Physical-Virtual Codesign in inSpace.	IEEE Pervasive Comput.	2010	DBLP DOI BibTeX RDF	cross-reality, collaborative work, codesign, Smart rooms
30	Jon Pérez 0001, Mikel Azkarate-askasua, Antonio Perez	Codesign and Simulated Fault Injection of Safety-Critical Embedded Systems Using SystemC.	EDCC	2010	DBLP DOI BibTeX RDF	safety, fault injection, SystemC, codesign, odometry, IEC-61508
30	Taehoon Kim, Sungwoo Tak	A real-time hardware-software codesign technique of network protocols to provide QoS.	ICHIT	2009	DBLP DOI BibTeX RDF	QoS communications architecture, real-time scheduling, network protocols, hardware-software codesign
30	Andrea Acquaviva, Nicola Bombieri, Franco Fummi, Sara Vinco	Automatic customization of device drivers for IP-cores used with assorted CPU organizations.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	device driver design, embedded systems, hardware-software codesign
30	Marius Gligor, Nicolas Fournel, Frédéric Pétrot	Using binary translation in event driven simulation for fast and flexible MPSoC simulation.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	systemc simulation, codesign, binary translation
30	Giovanni Beltrame, Luca Fossati, Donatella Sciuto	Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	ReSP, Operating System, Emulation, OpenMP, MPSoC, codesign
30	Yvan Eustache, Jean-Philippe Diguet	Specification and OS-based implementation of self-adaptive, hardware/software embedded systems.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	self-adaptive embedded systems, HW/SW codesign
30	Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada	RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip.	ASP-DAC	2007	DBLP DOI BibTeX RDF	codesign toolkit, embedded multiprocessor systems, system-level design toolkit, real-time operating systems, RTOS, multiprocessor systems-on-chip
30	Patrick Schaumont, Doris Ching, Ingrid Verbauwhede	An interactive codesign environment for domain-specific coprocessors.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	hardware description language, hardware-software codesign, Cosimulation
30	Carlo Galuzzi, Elena Moscu Panainte, Yana Yankova, Koen Bertels, Stamatis Vassiliadis	Automatic selection of application-specific instruction-set extensions.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	reconfigurable computing, instruction-set extension, HW/SW codesign
30	Hyunuk Jung, Soonhoi Ha	Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	automatic hardware synthesis, VHDL, system level design, dataflow graph(DFG), HW/SW codesign
30	Jecel Mattos de Assumpccao Jr.	Hardware/software codesign in neo smalltalk.	OOPSLA Companion	2003	DBLP DOI BibTeX RDF	object-oriented hardware, codesign
30	Paul Kohout, Brinda Ganesh, Bruce L. Jacob	Hardware support for real-time operating systems.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	RTOS, hardware-software codesign
30	Roman L. Lysecky, Frank Vahid	A codesigned on-chip logic minimizer.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	embedded CAD, on-chip logic minimization, on-chip synthesis, embedded systems, dynamic optimization, system-on-a-chip, hardware/software codesign, logic minimization
30	Haihua Su, Jiang Hu, Sachin S. Sapatnekar, Sani R. Nassif	Congestion-driven codesign of power and signal networks.	DAC	2002	DBLP DOI BibTeX RDF	signal routing, wire congestion, codesign, power grid noise
30	JoAnn M. Paul, Christopher M. Eatedali, Donald E. Thomas	The design context of concurrent computation systems.	CODES	2002	DBLP DOI BibTeX RDF	simulation, modeling, hardware/software codesign, concurrent computation, digital system design
30	Neal K. Tibrewala, JoAnn M. Paul, Donald E. Thomas	Modeling and evaluation of hardware/software designs.	CODES	2001	DBLP DOI BibTeX RDF	computer system modeling and simulation, hardware/software codesign, digital system design
30	Seppo Virtanen, Johan Lilius	The TACO protocol processor simulation environment.	CODES	2001	DBLP DOI BibTeX RDF	simulation, protocol, microprocessor, codesign
30	Pun H. Shiu, Yudong Tan, Vincent John Mooney III	A novel parallel deadlock detection algorithm and architecture.	CODES	2001	DBLP DOI BibTeX RDF	parallel algorithm, hardware/software codesign, real-time operating system, deadlock detection
30	Andreas Koch	A Comprehensive Prototyping-Platform for Hardware-Software Codesign.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	hybrid processor, RTEMS, Virtex, FPGA, prototyping, codesign, SPARC, Xilinx
30	Philippe Coste, Fabiano Hessel, P. LeMarrec, Zoltan Sugar, Mohamed Romdhani, Rodolph Suescun, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya	Multilanguage design of heterogeneous systems.	CODES	1999	DBLP DOI BibTeX RDF	hetergeneous systems, multilanguage, codesign, cosimulation
30	Jean Paul Calvez, Dominique Heller, F. Muller, Olivier Pasquier	A Programmable Multi-Language Generator for CoDesign.	DATE	1998	DBLP DOI BibTeX RDF	meta-generator, code generator, CoDesign
30	Juan Antonio Maestro, Daniel Mozos, Hortensia Mecha	A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process.	DATE	1998	DBLP DOI BibTeX RDF	Parallelism, Estimation, Sharing, Codesign
30	Stephan Schulz 0002, Jerzy W. Rozenblit, Klaus Buchenrieder	Towards an application of model-based codesign: an autonomous, intelligent cruise controller.	ECBS	1997	DBLP DOI BibTeX RDF	model-based codesign, intelligent cruise controller, automotive safety, implementation independent specification, underlying object, behavioral models, model-based reasoning, systems requirements
30	Sien-An Ong, Kari Tiensyrjä, Lech Józwiak	Interactive codesign for real-time embedded control systems: task graph generation from SA/VHDL models.	EUROMICRO	1997	DBLP DOI BibTeX RDF	interactive codesign, real-time embedded control systems, task graph generation, InCo, textual functional specification method, linear control structures, static behavioral analysis, graphical functional specification method, high level synthesis, finite-state machines, VHDL, modular design, hierarchical decomposition, hardware software partitioning, cost-efficient
30	Reinhard Gerndt, Rolf Ernst	An Event-Driven Multi-Threading Architecture for Embedded Systems.	CODES	1997	DBLP DOI BibTeX RDF	multi-threading architecture, embedded system, hardware/software-codesign, event-flow
30	Fumio Suzuki, Hisao Koizumi, M. Hiramine, K. Yamamoto, Hiroto Yasuura, K. Okino	A HW/SW co-design environment for multi-media equipments development using inverse problem.	CODES	1997	DBLP DOI BibTeX RDF	audio circuitry, conceptual stage, development cycle reduction, hardware/software codesign environment, human recognition characteristics, human sensibilities, multimedia equipment development, netlist generation, repeated results comparison, semiconductor circuits, semiconductor production, signal reproduction, system response, television receiver, evaluation, perception, multimedia communication, inverse problem, cost estimates, performance estimates, optimization method, filter design, numerical models, susceptibility, playback
30	Ilya V. Klotchkov, S. Pedersen	A Codesign Case Study: Implementing Arithmetic Functions in FPGA's.	ECBS	1996	DBLP DOI BibTeX RDF	Arithmetic Functions, FPGA, Design Methods, Case Study, Codesign
30	Fred Rose, Todd Carpenter, Sanjaya Kumar, John Shackleton, Todd Steeves Honeywell	A Model for the Coanalysis of Hardware and Software Architectures.	CODES	1996	DBLP DOI BibTeX RDF	RASSP, performance modeling, VHDL, hardware/software codesign
30	Peter Voigt Knudsen, Jan Madsen	PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning.	CODES	1996	DBLP DOI BibTeX RDF	communication, Codesign, hardware/software partitioning, performance estimation, area estimation, co-synthesis
30	Reinhard Gerndt	A Case Study in Co-Design of Communication Controllers.	CODES	1996	DBLP DOI BibTeX RDF	codesign case study, embedded system, communication controller
29	Romain Kamdem, Alain Fonkoua	Coprocessor Synthesis of Multirate System Using Static Scheduling Theory.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	scheduling, real time, Codesign, codesign, hardware/software partitioning, target architecture
26	Gul N. Khan, Anika Awwal	Codesign of Embedded Systems with Process/Module Level Real-Time Deadlines.	CSE (2)	2009	DBLP DOI BibTeX RDF
26	Alexander Klimm, Oliver Sander, Jürgen Becker 0001, Sylvain Subileau	A Hardware/Software Codesign of a Co-processor for Real-Time Hyperelliptic Curve Cryptography on a Spartan3 FPGA.	ARCS	2008	DBLP DOI BibTeX RDF	Hyperelliptic Curve Cryptography (HECC), FPGA, embedded systems, Public Key Cryptography (PKC), reconfigurable hardware
26	J. P. Grossman, Cliff Young, Joseph A. Bank, Kenneth M. Mackenzie, Doug Ierardi, John K. Salmon, Ron O. Dror, David E. Shaw	Simulation and embedded software development for Anton, a parallel machine with heterogeneous multicore ASICs.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	Anton, simulation, embedded software, special-purpose hardware
26	Laurent Moss, Maxime de Nanclas, Luc Filion, Sebastien Fontaine, Guy Bois, El Mostapha Aboulhamid	Seamless hardware/software performance co-monitoring in a codesign simulation environment with RTOS support.	DATE	2007	DBLP DOI BibTeX RDF
26	César Torres-Huitzil, Bernard Girau, Adrien Gauffriau	Hardware/Software Codesign for Embedded Implementation of Neural Networks.	ARC	2007	DBLP DOI BibTeX RDF
26	Alexandre Abellard, Patrick Abellard	A factorization / defactorization methodology based on data flow petri nets for an efficient hardware/software codesign.	SMC	2007	DBLP DOI BibTeX RDF
26	Sébastien Roy 0002, Jean-François Boudreault, Louis Dupont	A Codesign Prototyping Framework for Wireless LAN Transceivers with Smart Antennas.	ICCCN	2007	DBLP DOI BibTeX RDF
26	Thomas Brandtner	Chip-Package Codesign Flow for Mixed-Signal SiP Designs.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	Mixed-Signal System-in-Package design, SiP
26	Antonio Martínez-Álvarez, Leonardo Maria Reyneri, Francisco J. Pelayo, Christian A. Morillas, Samuel F. Romero	A Codesign Tool for High Level Systhesis of Vision Models on FPL.	FPL	2006	DBLP DOI BibTeX RDF
26	Kun Tong, Jinian Bian, Haili Wang	Universal data model platform: the data-centric evolution for system level codesign.	CSCWD	2006	DBLP DOI BibTeX RDF
26	Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Brodersen	A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	hardware process, reconfigurable computers
26	Ahmed Amine Jerraya, Wayne H. Wolf	Hardware/Software Interface Codesign for Embedded Systems.	Computer	2005	DBLP DOI BibTeX RDF
26	Mouloud Koudil, Karima Benatchba, Said Gharout, Nacer Hamani	Solving Partitioning Problem in Codesign with Ant Colonies.	IWINAC (2)	2005	DBLP DOI BibTeX RDF
26	Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet	Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor Nodes.	DSD	2005	DBLP DOI BibTeX RDF
26	Roger D. Chamberlain, John W. Lockwood, Saurabh Gayen, Richard Hough, Phillip H. Jones	Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory.	MSE	2005	DBLP DOI BibTeX RDF
26	Todd S. Sproull, Gordon J. Brebner, Christopher E. Neely	Mutable Codesign for Embedded Protocol Processing.	FCCM	2005	DBLP DOI BibTeX RDF
26	Daniela De Venuto, Grazia Marchione, Leonardo Reyneri	A codesign tool to validate and improve an FPGA based test strategy for high resolution audio ADC.	ISQED	2005	DBLP DOI BibTeX RDF
26	Joseph Zambreno, Alok N. Choudhary, Rahul Simha, Bhagirath Narahari	Flexible Software Protection Using Hardware/Software Codesign Techniques.	DATE	2004	DBLP DOI BibTeX RDF
26	Sudarshan Banerjee, Nikil D. Dutt	Efficient search space exploration for HW-SW partitioning.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	HW-SW partitioning, dynamic cost function
26	Patrick Schaumont, Ingrid Verbauwhede	Domain-Specific Codesign for Embedded Security.	Computer	2003	DBLP DOI BibTeX RDF
26	Hassen Saïdi, Victoria Stavridou, Bruno Dutertre	Protocol Codesign.	Security Protocols Workshop	2003	DBLP DOI BibTeX RDF
26	Martin Simka, Viktor Fischer, Milos Drutarovský	Hardware-Software Codesign in Embedded Asymmetric Cryptographiy Application - A Case Study.	FPL	2003	DBLP DOI BibTeX RDF
26	Robert H. Klenke, Jerry H. Tucker, Jason M. Blevins	A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering.	MSE	2003	DBLP DOI BibTeX RDF
26	Jan Madsen, Jørgen Steensgaard-Madsen, Lars Christensen	A Sophomore Course in Codesign.	Computer	2002	DBLP DOI BibTeX RDF
26	Tianhao Zhang, Krishnendu Chakrabarty, Richard B. Fair	Design of reconfigurable composite microsystems based on hardware/software codesign principles.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
26	Nagisa Ishiura, Tatsuo Watanabe	Datapath oriented codesign method of application specific DSPs using retargetable compiler.	APCCAS (1)	2002	DBLP DOI BibTeX RDF
26	Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli	HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform.	CODES	2002	DBLP DOI BibTeX RDF	CSoC, code generation, hw/sw co-design
26	Juanjo Noguera, Rosa M. Badia	Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures.	CODES	2002	DBLP DOI BibTeX RDF	dynamic run-time scheduling, reconfigurable architectures