Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
22 | Heming Sun, Dajiang Zhou, Peilin Liu, Satoshi Goto |
A Low-Cost VLSI Architecture of Multiple-Size IDCT for H.265/HEVC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(12), pp. 2467-2476, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Hai Huang, Liyi Xiao, Jiaming Liu |
CORDIC-Based Unified Architectures for Computation of DCT/IDCT/DST/IDST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 33(3), pp. 799-814, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Ruhan A. Conceição, J. Claudio de Souza, Ricardo Jeske, Marcelo Schiavon Porto, Bruno Zatt, Luciano Volcan Agostini |
Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 1925-1928, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Ziyou Yao, Weifeng He, Liang Hong, Guanghui He, Zhigang Mao |
Area and throughput efficient IDCT/IDST architecture for HEVC standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 2511-2514, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Shan-Chun Kuo, Hong-Yuan Jheng, Fan-Chieh Cheng, Shanq-Jang Ruan |
Energy-Efficient IDCT Design for DS-CDMA Watermarking Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(5), pp. 995-996, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Ku He, Andreas Gerstlauer, Michael Orshansky |
Circuit-Level Timing-Error Acceptance for Design of Energy-Efficient DCT/IDCT-Based Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 23(6), pp. 961-974, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Liang Hong, Weifeng He, Hui Zhu, Zhigang Mao |
A full-pipelined 2-D IDCT/IDST VLSI architecture with adaptive block-size for HEVC standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 10(9), pp. 20130210, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Liang Hong, Weifeng He, Hui Zhu, Zhigang Mao |
A cost effective 2-D adaptive block size IDCT architecture for HEVC standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013, Columbus, OH, USA, August 4-7, 2013, pp. 1290-1293, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Guoyong Li, Leibo Liu, Shouyi Yin, Changkui Mao, Shaojun Wei |
Mapping IDCT of MPEG2 on Coarse-Grained Reconfigurable Array for Matching 1080p Video Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMC/HumanCom ![In: Advanced Technologies, Embedded and Multimedia for Human-centric Computing - HumanCom and EMC 2013 [International Conference on Human-centric Computing, HumanCom 2013 / 8th International Conference on Embedded and Multimedia Computing, EMC 2013, Taipei, Taiwan, August 23-25, 2013], pp. 545-555, 2013, Springer, 978-94-007-7261-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Ruhan A. Conceição, J. Claudio de Souza, Ricardo Jeske, Marcelo Schiavon Porto, Júlio C. B. de Mattos, Luciano Volcan Agostini |
Hardware design for the 32×32 IDCT of the HEVC video coding standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: 26th Symposium on Integrated Circuits and Systems Design, SBCCI 2013, Curitiba, Brazil, September 2-6, 2013, pp. 1-6, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Jia Zhu, Zhenyu Liu 0001, Dongsheng Wang 0002 |
Fully pipelined DCT/IDCT/Hadamard unified transform architecture for HEVC Codec. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013, pp. 677-680, 2013, IEEE, 978-1-4673-5760-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Tianlong Ma, Cong Liu 0014, Yibo Fan, Xiaoyang Zeng |
A fast 8×8 IDCT algorithm for HEVC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013, pp. 1-4, 2013, IEEE, 978-1-4673-6415-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Thomas Tziortzios |
Σχεδίαση προσαρμοστικών και δυναμικά αναδιατάξιμων αρχιτεκτονικών αντιστρόφου μετασχηματισμού συνημιτόνου 8X8 2-D IDCT, για χαμηλή κατανάλωση ισχύος ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2013 |
RDF |
|
22 | Jaehee You |
Unified Constant Geometry Fault Tolerant DCT/IDCT for Image Codec System on a Display Panel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(12), pp. 2396-2406, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Qingkui Chen, Haifeng Wang, Songlin Zhuang, Bocheng Liu |
Parallel Algorithm of IDCT with GPUs and CUDA for Large-scale Video Quality of 3G. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. ![In: J. Comput. 7(8), pp. 1880-1886, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
22 | Zahaib Akhtar, Mehar Ali, Nadeem A. Khan, Jahangir Ikram |
Complexity scalable IDCT based approaches for power-efficient video decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 2012 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2012, Kyoto, Japan, March 25-30, 2012, pp. 1221-1224, 2012, IEEE, 978-1-4673-0046-9. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Biao Wang 0001, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink |
An Optimized Parallel IDCT on Graphics Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par Workshops ![In: Euro-Par 2012: Parallel Processing Workshops - BDMC, CGWS, HeteroPar, HiBB, OMHI, Paraphrase, PROPER, Resilience, UCHPC, VHPC, Rhodes Islands, Greece, August 27-31, 2012. Revised Selected Papers, pp. 155-164, 2012, Springer, 978-3-642-36948-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Sha Shen, Weiwei Shen, Yibo Fan, Xiaoyang Zeng |
A Unified 4/8/16/32-Point Integer IDCT Architecture for Multiple Video Coding Standards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, ICME 2012, Melbourne, Australia, July 9-13, 2012, pp. 788-793, 2012, IEEE Computer Society, 978-1-4673-1659-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Ardimas Andi Purwita, Trio Adiono |
A Four Quadrants Parallel-Recursive 2-D DCT/IDCT VLSI Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICETET ![In: 2012 Fifth International Conference on Emerging Trends in Engineering and Technology, Himeji, Japan, November 5-7, 2012, pp. 233-238, 2012, IEEE, 978-1-4799-0276-7. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
22 | Thomas Tziortzios, Stavros Dokouzyannis |
A novel architecture for fast 2D IDCT decoders, with reduced number of multiplications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 57(3), pp. 1384-1389, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Ku He, Andreas Gerstlauer, Michael Orshansky |
Controlled timing-error acceptance for low energy IDCT design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011, pp. 758-763, 2011, IEEE, 978-1-61284-208-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Rachmad Vidya Wicaksana Putra, Rella Mareta, Nurfitri Anbarsanti, Trio Adiono |
The efficient mCBE algorithm and quantization numbers for multiplierless and low complexity DCT/IDCT Image Compression Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEEI ![In: International Conference on Electrical Engineering and Informatics, ICEEI 2011, Bandung, Indonesia, 17-19 July, 2011, pp. 1-6, 2011, IEEE, 978-1-4577-0753-7. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Vinicius S. Livramento, Bruno George de Moraes, Brunno Abner Machado, José Luís Almada Güntzel |
An energy-efficient FDCT/IDCT configurable IP core for mobile multimedia platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: 24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011, pp. 149-154, 2011, ACM, 978-1-4503-0828-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Chang-Hsin Cheng, Chun-Lung Hsu, Chung-Kai Liu, Shih-Yin Lin |
High reliability built-in self-detection and self-correction design for DCT/IDCT application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, September 26-28, 2011, pp. 213-218, 2011, IEEE, 978-1-4577-1616-4. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Wenqi Bao, Jiang Jiang, Qing Sun 0002, Yuzhuo Fu |
A reconfigurable macro-pipelined DCT/IDCT accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011, pp. 25-28, 2011, IEEE, 978-1-61284-192-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Kiho Choi, Sunyoung Lee, Euee S. Jang |
Zero coefficient-aware IDCT algorithm for fast video decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 56(3), pp. 1822-1829, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Yeong-Kang Lai, Yu-Fan Lai |
A reconfigurable IDCT architecture for universal video decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 56(3), pp. 1872-1879, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Taizo Suzuki, Masaaki Ikehara |
Integer DCT Based on Direct-Lifting of DCT-IDCT for Lossless-to-Lossy Image Coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 19(11), pp. 2958-2965, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Taizo Suzuki, Masaaki Ikehara |
Realization of lossless-to-lossy image coding compatible with JPEG standard by direct-lifting of DCT-IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings of the International Conference on Image Processing, ICIP 2010, September 26-29, Hong Kong, China, pp. 389-392, 2010, IEEE, 978-1-4244-7994-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Pingping Zhu, Jianguo Liu 0004, Shengkui Dai |
Fixed-point IDCT without multiplications based on B.G. Lee's algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Digit. Signal Process. ![In: Digit. Signal Process. 19(4), pp. 770-777, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Pingping Zhu, Jianguo Liu 0004, Shengkui K. Dai, Guoyou Wang |
Scaled AAN for Fixed-Point Multiplier-Free IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURASIP J. Adv. Signal Process. ![In: EURASIP J. Adv. Signal Process. 2009, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Meng-Lin Hsia, Chih-Feng Tseng, Meng-Hsuan Chan, Oscal T.-C. Chen |
Low-complexity frame-size down-scaling integrated with IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SiPS ![In: Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2009, October 7-9, 2009, Tampere, Finland, pp. 046-050, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Huang-Chun Lin, Yu-Hsuan Lee, Tsung-Han Tsai 0001 |
The cycle-efficient idct algorithm for H.264/SVC with DSP platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, ICME 2009, June 28 - July 2, 2009, New York City, NY, USA, pp. 1114-1117, 2009, IEEE, 978-1-4244-4291-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Jin Li 0006, Moncef Gabbouj, Jarmo Takala, Hexin Chen |
Merged inverse quantization and IDCT for optimized decoder implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUSIPCO ![In: 17th European Signal Processing Conference, EUSIPCO 2009, Glasgow, Scotland, UK, August 24-28, 2009, pp. 948-952, 2009, IEEE, 978-161-7388-76-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
22 | Ihab Amer, Wael M. Badawy, Vassil S. Dimitrov, Graham A. Jullien |
On the refinement of the DCT/IDCT scaling factor sensitivity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, ICME 2008, June 23-26 2008, Hannover, Germany, pp. 337-340, 2008, IEEE Computer Society, 978-1-4244-2571-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Doru-Florin Chiper, M. N. S. Swamy, M. Omair Ahmad |
An Efficient Unified Framework for Implementation of a Prime-Length DCT/IDCT With High Throughput. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 55(6-2), pp. 2925-2936, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Michaela Amoo, Clay Gloster |
FPGA Implementation of an Analytical Design Method for A Cycle-Optimal 2D-DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ERSA ![In: Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2007, Las Vegas, Nevada, USA, June 25-28, 2007, pp. 131-137, 2007, CSREA Press, 1-60132-026-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
22 | Lijie Liu, Trac D. Tran |
An 8×8 IEEE-Compliant Lifting-Based Multiplierless IDCT Structure and Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (1) ![In: Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2007, Honolulu, Hawaii, USA, April 15-20, 2007, pp. 1113-1116, 2007, IEEE, 1-4244-0727-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Peter Lee |
An estimation of mismatch error in IDCT decoders implemented with hybrid-LNS arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUSIPCO ![In: 15th European Signal Processing Conference, EUSIPCO 2007, Poznan, Poland, September 3-7, 2007, pp. 683-687, 2007, IEEE, 978-839-2134-04-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
22 | Archana Chidanandan, Magdy A. Bayoumi |
Area-Efficient NEDA Architecture for The 1-D DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (3) ![In: 2006 IEEE International Conference on Acoustics Speech and Signal Processing, ICASSP 2006, Toulouse, France, May 14-19, 2006, pp. 944-947, 2006, IEEE, 1-4244-0469-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Ahmed Ben Atitallah, Patrice Kadionik, Fahmi Ghozzi, Patrice Nouel, Nouri Masmoudi, Philippe Marchegay |
Optimization and Implementation on Fpga of the DCT/IDCT Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (3) ![In: 2006 IEEE International Conference on Acoustics Speech and Signal Processing, ICASSP 2006, Toulouse, France, May 14-19, 2006, pp. 928-931, 2006, IEEE, 1-4244-0469-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Seung-Kyun Oh, HyunWook Park |
Analysis of IDCT and motion-compensation mismatches between spatial-domain and transform-domain motion-compensated coders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 15(7), pp. 835-843, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Doru-Florin Chiper, M. N. Shanmukha Swamy, M. Omair Ahmad, Thanos Stouraitis |
Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(6), pp. 1125-1137, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Che-Hong Chen, Bin-Da Liu, Jar-Ferr Yang |
Condensed recursive structures for computing multidimensional DCT/IDCT with arbitrary length. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(9), pp. 1819-1831, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Che-Hong Chen, Bin-Da Liu, Jar-Ferr Yang |
Direct recursive structures for computing radix-r two-dimensional DCT/IDCT/DST/IDST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(10), pp. 2017-2030, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh |
A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, ICME 2004, 27-30 June 2004, Taipei, Taiwan, pp. 1683-1686, 2004, IEEE Computer Society, 0-7803-8603-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
22 | Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen |
A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 141-144, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
22 | Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen |
A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 769-772, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
22 | Dae Won Kim, Jun Rim Choi |
Variable radix-2 multibit coding for 400 Mpixel/s DCT/IDCT of HDTV video decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 35(2), pp. 47-67, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Yew-San Lee, Keng-Khai Ong, Chen-Yi Lee |
Error-resilient image coding (ERIC) with smart-IDCT error concealment technique for wireless multimedia transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 13(2), pp. 176-181, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Lorenzo Cappellari, Truong Q. Nguyen |
Deblocking of video sequences with lapped embedded IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (3) ![In: 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '03, Hong Kong, April 6-10, 2003, pp. 737-740, 2003, IEEE, 0-7803-7663-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Kar-Lik Wong, Nigel P. Topham |
High performance IDCT realization using complex arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (2) ![In: 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '03, Hong Kong, April 6-10, 2003, pp. 313-316, 2003, IEEE, 0-7803-7663-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Daewon Kim, Daekyu Shin |
Energy-based adaptive DCT/IDCT for video coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, ICME 2003, 6-9 July 2003, Baltimore, MD, USA, pp. 557-560, 2003, IEEE Computer Society, 0-7803-7965-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Luca Fanucci, Sergio Saponara |
Data Driven Power Saving for DCT/IDCT VLSI Macrocell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(7), pp. 1760-1765, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
22 | Daniele Bagni, Antonio Borneo, Luca Celetto |
Efficient IDCT implementations on VLIW processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUSIPCO ![In: 11th European Signal Processing Conference, EUSIPCO 2002, Toulouse, France, September 3-6, 2002, pp. 1-4, 2002, IEEE. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
22 | Wendi Pan, Antonio Ortega, Ibrahim N. Hajj-Ahmad, Roberto Sannino |
Proxy-based approaches for IDCT acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VCIP ![In: Visual Communications and Image Processing 2001, San Jose, CA, USA, January 20, 2001, pp. 625-636, 2001, SPIE, 0-8194-3988-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
22 | Russell E. Henning, Chaitali Chakrabarti |
An approach for enabling DCT/IDCT energy reduction scalability in MPEG-2 video codecs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt Lake City, Utah, USA, Proceedings, pp. 1209-1212, 2001, IEEE, 0-7803-7041-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Ricardo Pezzuol Jacobi, José Porfírio A. de Carvalho |
IDCT Design for JPEG Decompression in an Electronic Ballot Box. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2001, Pirenopolis, Brazil, September 10-15, 2001, pp. 232-236, 2001, IEEE Computer Society, 0-7695-1333-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
22 | Jen-Shiun Chiang, Yi-Fang Chiu, Teng-Hung Chang |
A high throughput 2-dimensional DCT/IDCT architecture for real-time image and video system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001, pp. 867-870, 2001, IEEE, 0-7803-7057-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers |
An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2001, Rohnert Park, California, USA, April 29 - May 2, 2001, pp. 160-169, 2001, IEEE Computer Society, 0-7695-2667-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Jari Nikara, Jarmo Takala, David Akopian, Jukka Saarinen |
Pipeline architecture for DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 902-905, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Yi Yang, Chunyan Wang 0004, M. Omair Ahmad, M. N. Shanmukha Swamy |
An on-line CORDIC based 2-D IDCT implementation using distributed arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSPA ![In: Proceedings of the Sixth International Symposium on Signal Processing and its Applications, ISSPA 2001, August 13-16 2001, Shmgri-La Hotel, Kuala Lumpur, Malaysia, pp. 296-299, 2001, IEEE, 0-7803-6703-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Tian-Sheuan Chang, Chin-Sheng Kung, Chein-Wei Jen |
A simple processor core design for DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 10(3), pp. 439-447, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Lowell L. Winger |
Source adaptive software 2D iDCT with SIMD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: IEEE International Conference on Acoustics, Speech, and Signal Processing. ICASSP 2000, 5-9 June, 2000, Hilton Hotel and Convention Center, Istanbul, Turkey, pp. 3642-3645, 2000, IEEE, 0-7803-6293-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Kuo-Hsing Cheng, Chih-Sheng Huang, Chun-Pin Lin |
The design and implementation of DCT/IDCT chip with novel architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 741-744, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Thucydides Xanthopoulos, Anantha P. Chandrakasan |
A low-power IDCT macrocell for MPEG-2 MP@ML exploiting data distribution properties for minimal activity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(5), pp. 693-703, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Byung Cheol Song, Myung Jun Kim, Sung Kyu Jang, Jong Beom Ra |
Modified IDCT kernel for down-conversion of MPEG-2 compressed video. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 45(2), pp. 340-344, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Thou-Ho Chen |
A cost-effective 8×8 2-D IDCT core processor with folded architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 45(2), pp. 333-339, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Shen-Fu Hsiao, Wei-Ren Shiue, Jian-Ming Tseng |
A cost-efficient and fully-pipelinable architecture for DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 45(3), pp. 515-525, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Myung Jun Kim, Byung Cheol Song, Sung Kyu Jang, Jong Beom Ra |
An Efficient Video Down Conversion Algorithm Using Modified IDCT Basis Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (2) ![In: Proceedings of the 1999 International Conference on Image Processing, ICIP '99, Kobe, Japan, October 24-28, 1999, pp. 914-918, 1999, IEEE, 0-7803-5467-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Seehyun Kim, Wonyong Sung |
Fixed-point error analysis and word length optimization of 8×8 IDCT architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 8(8), pp. 935-940, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
22 | Eri Murata, Masao Ikekawa, Ichiro Kuroda |
Fast 2D IDCT implementation with multimedia instructions for a software MPEG2 decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98, Seattle, Washington, USA, May 12-15, 1998, pp. 3105-3108, 1998, IEEE, 0-7803-4428-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
22 | Roberto Rambaldi, Alessandro Uguzzoni, Roberto Guerrieri |
A 35 μW 1.1 V gate array 8×8 IDCT processor for video-telephony. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98, Seattle, Washington, USA, May 12-15, 1998, pp. 2993-2996, 1998, IEEE, 0-7803-4428-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
22 | Rizos Sakellariou, Christine Eisenbeis, Peter M. W. Knijnenburg |
Efficient implementation of the row-column 8×8 IDCT on VLIW architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUSIPCO ![In: 9th European Signal Processing Conference, EUSIPCO 1998, Island of Rhodes, Greece, 8-11 September, 1998, pp. 1-4, 1998, IEEE, 978-960-7620-06-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP BibTeX RDF |
|
22 | Yung-Pin Lee, Thou-Ho Chen, Liang-Gee Chen, Mei-Juan Chen, Chung-Wei Ku |
A cost-effective architecture for 8×8 two-dimensional DCT/IDCT using direct method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 7(3), pp. 459-467, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
22 | Minhua Zhou, Jan L. P. de Lameillieure |
IDCT output range before clipping in MPEG video coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Signal Process. Image Commun. ![In: Signal Process. Image Commun. 11(2), pp. 137-145, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
22 | Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan |
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 415-420, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
22 | Vishnu Srinivasan, K. J. Ray Liu |
VLSI design of high-speed time-recursive 2-D DCT/IDCT processor for video applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 6(1), pp. 87-96, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
22 | David Akopian, Jaakko Astola |
Pipeline processor for fast architecture oriented regular DCT-IDCT algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 1996 IEEE International Conference on Acoustics, Speech, and Signal Processing Conference Proceedings, ICASSP '96, Atlanta, Georgia, USA, May 7-10, 1996, pp. 1319-1322, 1996, IEEE Computer Society, 0-7803-3192-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
22 | Shih-Chang Hsia, Bin-Da Liu, Jar-Ferr Yang, Bor-Long Bai |
VLSI implementation of parallel coefficient-by-coefficient two-dimensional IDCT processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 5(5), pp. 396-406, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
22 | Avanindra Madisetti, Alan N. Willson Jr. |
A 100 MHz 2-D 8×8 DCT/IDCT processor for HDTV applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 5(2), pp. 158-165, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
22 | Yuk-Hee Chan, Wan-Chi Siu |
General approach for the realization of DCT/IDCT using convolutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Signal Process. ![In: Signal Process. 37(3), pp. 357-363, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
22 | Vishnu Srinivasan, K. J. Ray Liu |
Full Custom VLSI Implementation of High-Speed 2-D DCT/IDCT Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (3) ![In: Proceedings 1994 International Conference on Image Processing, Austin, Texas, USA, November 13-16, 1994, pp. 606-610, 1994, IEEE Computer Society, 0-8186-6950-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
22 | An-Yeu Wu, K. J. Ray Liu |
A Low-Power and Low-Complexity DCT/IDCT VLSI Architecture Based On Backward Chebyshev Recursion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30 - June 2, 1994, pp. 155-158, 1994, IEEE, 0-7803-1916-8. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
22 | Chan S. Kim, Sang W. Song, Man Y. Kim, Young T. Han, Sang A. Kang, Bang W. Lee |
200 Mega Pixel Rate IDCT Processor for HDTVC Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993, pp. 2003-2006, 1993, IEEE, 0-7803-1281-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
22 | Peter A. Ruetz, Po Tong |
A 160 Mpixel/s IDCT processor for HDTV. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 12(5), pp. 28-32, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
22 | Darren Slawecki, Weiping Li |
DCT/IDCT processor design for high data rate image coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 2(2), pp. 135-146, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
22 | Ja-Ling Wu, Shyh-Huei Hsu, Wei-Jou Duh |
A novel two-stage algorithm for DCT and IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 40(6), pp. 1610-1612, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
22 | Silvio Cucchi, Marco Fratti |
A novel architecture for VLSI implementation of the 2-D DCT/IDCT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '92, San Francisco, California, USA, March 23-26, 1992, pp. 693-696, 1992, IEEE Computer Society, 0-7803-0532-9. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
22 | J. R. Parkhurst, K. Wayne Current, Anil K. Jain 0002, J. E. Grishaw |
A unified DCT/IDCT architecture for VLSI implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '88, New York, New York, USA, April 11-14, 1988, pp. 1993-1996, 1988, IEEE. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
14 | Vasant Patil, Rajeev Kumar |
A Fast Inverse Motion Compensation Algorithm for DCT-Domain Video Transcoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 18(3), pp. 394-399, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Sherman Braganza, Miriam Leeser |
An Efficient Implementation of a Phase Unwrapping Kernel on Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2008, 14-15 April 2008, Stanford, Palo Alto, California, USA, pp. 316-317, 2008, IEEE Computer Society, 978-0-7695-3307-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Sherman Braganza, Miriam Leeser |
An efficient implementation of a phase unwrapping kernel on reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008, Leuven, Belgium, pp. 138-143, 2008, IEEE Computer Society, 978-1-4244-1897-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Frank Bouwens, Mladen Berekovic, Bjorn De Sutter, Georgi Gaydadjiev |
Architecture Enhancements for the ADRES Coarse-Grained Reconfigurable Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 66-81, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Frank Bouwens, Mladen Berekovic, Andreas Kanstein, Georgi Gaydadjiev |
Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007., pp. 1-13, 2007, Springer, 978-3-540-71430-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Yung-Chi Chang, Wei-Min Chao, Chih-Wei Hsu, Liang-Gee Chen |
Platform-Based MPEG-4 SOC Design for Video Communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 42(1), pp. 7-19, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
platform-based architecture, video encoder, MPEG-4 video |
14 | Vasant Patil, Rajeev Kumar, Jayanta Mukherjee 0001, S. S. Prasad |
A Fast Arbitrary Down-Sizing Algorithm for Video Transcoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings of the International Conference on Image Processing, ICIP 2006, October 8-11, Atlanta, Georgia, USA, pp. 857-860, 2006, IEEE, 1-4244-0480-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis |
Compiler-driven FPGA-area allocation for reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 369-374, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Jinwei Wang, Guangjie Liu, Yuewei Dai, Zhiquan Wang, Shiguo Lian |
Robustness Analysis of Watermarking Schemes Based on Two Novel Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICIC (3) ![In: First International Conference on Innovative Computing, Information and Control (ICICIC 2006), 30 August - 1 September 2006, Beijing, China, pp. 471-474, 2006, IEEE Computer Society, 0-7695-2616-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Heiner Giefers, Achim Rettberg |
Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 113-118, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
high-level synthesis, low power design, voltage scaling, bit-serial architecture |