Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Luiza Gheorghe, Gabriela Nicolescu |
MP SoCs Including Optical Interconnect. Technological Progresses and Challenges for CAD Tools Design. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Paul R. Schumacher, Marco Mattavelli, Adrian Chirila-Rus, Robert D. Turney |
A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Roger Su, Raman Mittal, Vivek Garg |
Synchronous Pipelined Relay Stations with Back-Pressure Tolerance. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Xiaolong Yuan, Andreas Gothenberg, Xiaobo Wu |
Improved Wideband Low Distortion Cascaded Delta-Sigma Modulator. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Kyle Kelley, David Money Harris |
Very High Radix Scalable Montgomery Multipliers. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Sangik Choi, Shinwook Kang |
Implementation of an On-Chip Bus Bridge between Heterogeneous Buses with Different Clock Frequencies. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Richard F. Hobson, Scott Wakelin |
An Area-Efficient High-Speed AES S-Box Method. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Yanjie Wang, Kris Iniewski |
A 2.3GHz CMOS Transimpedance Preamplifier for Optical Communication. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Krzysztof Iniewski, Shahriar Mirabbasi |
High-Speed I/Os and PLLs for Data Communication Applications. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Alexandre Chureau, Yvon Savaria, El Mostapha Aboulhamid |
Interface-based Design of Systems-on-Chip using UML-RT. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Milan Pastrnak, Peter Poplavko, Peter H. N. de With, Dirk Farin |
Data-flow Timing Models of Dynamic Multimedia Applications for Multiprocessor Systems. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | L.-P. Lafrance, Yvon Savaria |
A Framework for Implementing Reusable Digital Signal Processing Modules. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | |
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 19-21 July 2004, Banff, Alberta, Canada |
IWSOC |
2004 |
DBLP BibTeX RDF |
|
1 | Holly Pekau, Joshua K. Nakaska, Jim Kulyk, Grant McGibney, James W. Haslett |
SOC Design of an IF Subsampling Terminal for a Gigabit Wireless LAN with Asymmetric Equalization. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Kuo-Hsing Cheng, Shun-Wen Cheng, Chan-Wei Huang |
64-bit Hybrid Dual-Threshold Voltage Power-Aware Conditional Carry Adder Design. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
conditional carry, hybrid dual-threshold voltage, CMOS, VLSI design, Adder |
1 | Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen |
MPEG-4 FGS Encoder Design for an Interactive Content-aware MPEG-4 Video Streaming SOC. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Russell Klein |
SoC Integration Challenges. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | K. Ola Andersson, Mark Vesterbacka |
A Parameterized Cell-Based Design Approach for Digital-to-Analog Converters. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | S. Regimbal, Yvon Savaria, Guy Bois |
Verification Strategy Determination Using Dependence Analysis of Transaction-Level Models. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Xizhi Li, Tiecai Li |
ECOMIPS: An Economic MIPS CPU Design on FPGA. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | S. A. Rahim, Laurence E. Turner |
A Field Programmable Bit-Serial Digital Signal Processor. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Deng Lei, Wen Gao 0001, Ming-Zeng Hu, Zhenzhou Ji |
An Efficient VLSI Implementation of MC Interpolation for MPEG-4. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jean-Pierre David, Etienne Bergeron |
A Step towards Intelligent Translation from High-Level Design to RTL. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Hongkyu Kim, D. Scott Wills, Linda M. Wills |
Empirical Analysis of Operand Usage and Transport in Multimedia Applications. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Mikael Olausson, Anders Edman, Dake Liu |
Bit Memory Instructions for a General CPU. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jacob Löfvenberg |
Non-Redundant Coding for Deep Sub-Micron Address Buses. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Sherif G. Aly 0001, Ashraf M. Salem |
Observability-Based RTL Simulation using JAVA. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Luc Charest, El Mostapha Aboulhamid, Guy Bois |
Using Design Patterns for Type Unification and Introspection in SystemC. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Minghua Shi, Amine Bermak, Sofiane Brahim-Belhouari |
A Real-time Architecture of SOC Selective Gas Sensor Array Using KNN Based on the Dynamic Slope and the Steady State Response. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Iman Y. Taha, Majid Ahmadi, William C. Miller |
A Sigma-Delta Modulator for Digital Hearing Instruments Using 0.18µm CMOS Technology. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Wenjing Zhang, Graham A. Jullien, Vassil S. Dimitrov |
A Programmable Base MDLNS MAC with Self-Generated Look-Up Table. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Daniel Wiklund, Sumant Sathe, Dake Liu |
Network on Chip Simulations for Benchmarking. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Yat-Fong Yung, Amine Bermak |
A Digital CMOS Imager with Pixel Level Analog-to-digital Converter and Reconfigurable SRAM/Counter. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Masud H. Chowdhury, Yehea I. Ismail |
Possible Noise Failure Modes in Static and Dynamic Circuits. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Robert Chebli, Mohamad Sawan |
A CMOS High-Voltage DC-DC Up Converter Dedicated for Ultrasonic Applications. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | D. Morin, Frédéric Normandin, Marie-Eve Grandmaison, H. Dang, Yvon Savaria, Mohamad Sawan |
An Intellectual Property Module for Auto-Calibration of Time-Interleaved Pipelined Analog-to-Digital Converters. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Ashwin K. Kumaraswamy, Ahmet T. Erdogan, Indrajit Atluri |
Development of Timing Driven IP Design Flow based on Physical Knowledge Synthesis. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Brian Marshall |
Beyond P-Cell and Gate-Level: Accuracy Requirements for Simulation of Nanometer SoC Designs. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Marek Syrzycki |
Design Strategies for ESD Protection in SOC. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Wei Wang 0003, M. N. S. Swamy, M. Omair Ahmad |
RNS Application for Digital Image Processing. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Richard F. Hobson, Allan R. Dyck, Keith L. Cheung |
SoC Features for a Multi-Processor WCDMA Base-station Modem. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | James Paris |
Integrating a Single Physical Verification Tool for Systems-on-Chip Designs. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | |
Program Committee. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Y. Ibrahim, Graham A. Jullien, William C. Miller |
Ultra Low Noise Signed Digit Arithmetic using Cellular Neural Networks. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Hung Tien Bui, Yvon Savaria |
10 GHz PLL Using Active Shunt-Peaked MCML Gates and Improved Frequency Acquisition XOR Phase Detector in 0.18 µm CMOS. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Erik Säll, Mark Vesterbacka |
Design of a Comparator in CMOS SOI. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Attif A. Ibrahem, Hamed Elsimary, Aly E. Salama |
FPGA Implementation of Fast Radix 4 Division Algorithm. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
fast division, radix 4 division, quotient selection, Field programmable gate arrays (FPGAs) |
1 | |
Message from the Chairs. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Keh-Jeng Chang |
Accurate On-Chip Variation Modeling to Achieve Design for Manufacturability. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Bijan Alizadeh, Zainalabedin Navabi |
Using Integer Equations to Check PSL Properties in RT Level Design. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Ashraf Salem |
Formal Verification of Digital Circuits. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Sherif Hammouda, Mohamed Dessouky, Mohamed Tawfik, Wael M. Badawy |
A Fully Automated Approach for Analog Circuit Reuse. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | M. Watheq El-Kharashi, M. H. El-Malaki, Sherif Hammad, Ashraf Salem, Abdel-Moniem Wahdan |
Towards Automating Hardware/Software Co-Design. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Mountassar Maamoun, Boualem Laichi, Abdelhalim Benbelkacem, Daoud Berkani |
Interfacing in Microprocessor-based Systems with an Advanced Physical Addressing. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
Software/Hardware system, Advanced Physical Addressing, memory integration, Interfacing, DMA |
1 | Samy Meftali, Jean-Luc Dekeyser |
An Optimal Charge Balancing Model for Fast Distributed SystemC Simulation in IP/SoC Design. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Azeddien M. Sllame |
A Model for a Reusable System-on-a-Chip Hardware Component Integrated with Design Exploration Methodology. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Donghoon Han, Abhijit Chatterjee |
Simulation-in-the-Loop Analog Circuit Sizing Method using Adaptive Model-based Simulated Annealing. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Pascal Nsame, Yvon Savaria |
A Customizable Embedded SoC Platform Architecture. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Tina Lindkvist, Jacob Löfvenberg, Henrik Ohlsson, Kenny Johansson, Lars Wanhammar |
A Power-Efficient, Low-Complexity, Memoryless Coding Scheme for Buses with Dominating Inter-Wire Capacitances. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Krzysztof Iniewski, R. Badalone, M. Lapointe, Marek Syrzycki |
SERDES Technology for Gigabit I/O Communications in Storage Area Networking. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Vishy Lakshmanan |
Automated Fixing of Complex/Process Critical DRC Violations in Place and Route Systems Using Calibre in the Synopsys/Milkyway Environment. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Victor H. S. Ha, Sung Kyu Choi, Jong-Gu Jeon, Geon Hyoung Lee, Won-Kap Jang, Woo-Sung Shim |
Real-time Audio/Video Decoders for Digital Multimedia Broadcasting. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Ling-zhi Liu, Lin Qiu, Meng-tian Rong, Jiang Li |
A 2-D Forward/Inverse Integer Transform Processor of H.264 Based on Highly-parallel Architecture. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
1 | S. M. Rezaul Hasan |
A High Performance Wide-band CMOS Transimpedance Amplifier for Optical Transceivers. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Christian Panis, Raimund Leitner, Jari Nurmi |
Scaleable Shadow Stack for a Configurable DSP Concept. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Kuo-Hsing Cheng, Wei-Chun Chang, Chia Ming Tu |
A Robust Handshake for Asynchronous System. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | José Vicente Calvano, Marcelo Lubaszewski |
Designing for Test Analog Signal Processors for MEMS-Based Inertial Sensors. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Sérgio G. Araújo, Antonio Carneiro de Mesquita Filho, Aloysio Pedroza |
Optimized Datapath Design by Evolutionary Computation. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Magesh Sadasivam, Sangjin Hong |
Application Specific Coarse-Grained FPGA for Processing Element in Real-Time Parallel Particle Filters. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Dae-Ik Kim, Myung-Whan An, Ho-Yong Chung, Suk-Young Kim |
Area Efficient Implementation of Noise Generation System. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Stephen Machan |
A Low-Power Fully Differential 2.4-GHz Prescaler in 0.18µm CMOS Technology. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Patricia Guitton-Ouhamou, Cécile Belleudy, Michel Auguin |
Energy Optimization in a HW/SW Tool: Design of Low. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Neal K. Bambha, Shuvra S. Bhattacharyya, Gary Euliss |
Design Considerations for Optically Connected Systems on Chip. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Mohamed Karray, Patricia Desgreys, Jean-Jacques Charlot |
A CMOS inverter TIA modeling with VHDL-AMS. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Suchitav Khadanga |
Synchronous programmable divider design for PLL Using 0.18 um cmos technology. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
programmable divider, CMOS integrated circuits, phase locked loop, PLL, Prescaler, frequency synthesizers |
1 | Li-Chuan Weng, Xiaojun Wang 0001, Bin Liu 0001 |
A Survey of Dynamic Power Optimization Techniques. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Minyi Fu, Graham A. Jullien, Vassil S. Dimitrov, Majid Ahmadi, William C. Miller |
The Application of 2D Algebraic Integer Encoding to a DCT IP Core. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Shih-Chang Hsia |
A High Speed Multi -Input Comparator with Clocking-Charge Based for Low-Power Systems. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Peter Waldeck, Neil W. Bergmann |
Dynamic Hardware-Software Partitioning on Reconfigurable System-on-Chip. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Bogdan Georgescu, Joshua K. Nakaska, Robert G. Randall, James W. Haslett |
A 0.28µm CMOS Bluetooth Frequency Synthesizer for Integration with a Bluetooth SOC Reference Platform. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Franz Schlögl, Horst Zimmermann |
120nm CMOS Operational Amplifier with Pseudo-Cascodes and Positive Feedback. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Partha Pratim Pande, Cristian Grecu, André Ivanov |
High-Throughput Switch-Based Interconnect for Future SoCs. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
SoC, Wormhole Routing, Virtual Channels, Interconnect Architecture |
1 | H. Emam, M. A. Ashour, H. Fekry, A. M. Wahdan |
Introducing an FPGA based - genetic algorithms in the applications of blind signals separation. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | |
Message from the General Chairs. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Boris D. Andreev, Edward L. Titlebaum, Eby G. Friedman |
Transformations of Signed-Binary Number Representations for Efficient VLSI Arithmetic. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Kuo-Hsing Cheng, Yu-Lung Lo, Wen Fang Yu, Shu-Yin Hung |
A Mixed-Mode Delay-Locked Loop for Wide-Range Operation and Multiphase Clock Generation. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Dorothy Kucar, Anthony Vannelli |
InterconnectionModelling Using Distributed RLC Models. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Aman A. Al-Imari, Kasim A. Rashid, Mohammed Al-Dagstany |
Telemetry Based System for Measurement and Monitoring of Biomedical Signals. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Jiann-Chyi Rau, Yi-Yuan Chang, Chia-Hung Lin |
An Efficient Mechanism for Debugging RTL Description. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | |
Program Committee. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | James Northern III, Michael A. Shanblatt |
An Evolutionary Approach to Configuring an Embedded System Based on Power Consumption. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Armando Armaroli, Marcello Coppola, Mario Diaz-Nava, Luca Fanucci |
High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Sau-Mou Wu, Ron-Yi Liu, Wei-Liang Chen |
A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Lin Jia, Alper Cabuk, Jianguo Ma, Kiat Seng Yeo |
A 52 GHz VCO with Low Phase Noise Implemented in SiGe BiCMOS Technology. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Ali Habibi, Sofiène Tahar |
A Survey oA Survey on System-On-a-Chip Designn System-On-a-Chip Design. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | G. Costantino Giaconia, Antonio Di Stefano, Giuseppe Capponi |
Reconfigurable Digital Instrumentation Based on FPGA. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | Abdallah Kassem, J. Wang, Abdelhakim Khouas, Mohamad Sawan, Mounir Boukadoum |
Pipelined Sampled-Delay Focusing CMOS Implementation for Ultrasonic Digital Beamforming. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|
1 | John Ferguson |
The Glue in a Confident SoC Flow. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
manufacturing requirements, gold standard, single tool flow, design-to-silicon, designstyle independence, confident data transfer, Integration |
1 | Mountassar Maamoun, Abdelhalim Benbelkacem, Daoud Berkani, Abderrezak Guessoum |
Interfacing in Microprocessor-based Systems with a Fast Physical Addressing. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
Software/hardware System, Fast Physical Addressing, Interfacing, DMA |
1 | Hiroto Saito, Shogo Nakamura, Masahide Yoneyama |
A Speech Speed Control Using Fourier Composite Approach. |
IWSOC |
2003 |
DBLP DOI BibTeX RDF |
|