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Found 466 publication records. Showing 466 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yongjie Lu, Yanan Sun 0003, Weifeng He, Zhigang Mao |
A Novel Memristor-Reusable Mapping Methodology of In-memory Logic Implementation for High Area-Efficiency.  |
NANOARCH  |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Panagiotis Karakolis, Pascal Normand, Panagiotis Dimitrakis, L. Sygelou, Vasileios G. Ntinas, Iosif-Angelos Fyrigos, Ioannis Karafyllidis, George Ch. Sirakoulis |
Plasma Modified Silicon Nitride Resistive Switching Memories. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Vasileios G. Ntinas, Antonio Rubio 0001, Georgios Ch. Sirakoulis, Rosana Rodríguez, Montserrat Nafría |
Experimental Investigation of Memristance Enhancement. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianxun Yang, Leibo Liu, Jin Zhang, Shaojun Wei, Shouyi Yin |
An Energy-Efficient Architecture for Accelerating Inference of Memory-Augmented Neural Networks. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengjun Wu, Weiwei Shan, Jiaming Xu |
ynamic Adaptation of Approximate Bit-width for CNNs based on Quantitative Error Resilience. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jintao Yu, Hoang Anh Du Nguyen, Muath Abu Lebdeh, Mottaqiallah Taouil, Said Hamdioui |
Enhanced Scouting Logic: A Robust Memristive Logic Design Scheme. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tao Wang, Weiwei Shan |
An Energy-Efficient In-Memory BNN Architecture With Time-Domain Analog and Digital Mixed-Signal Processing. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantinos Rallis, Panagiotis Dimitrakis, Georgios Ch. Sirakoulis, Ioannis Karafyllidis, Antonio Rubio 0001 |
Effect of Lattice Defects on the Transport Properties of Graphene Nanoribbon. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicholas Jao, Srivatsa Srivinasa, Akshay Krishna Ramanathan, Minhwan Kim, John Sampson, Vijaykrishnan Narayanan |
Technology-Assisted Computing-In-Memory Design for Matrix Multiplication Workloads. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongning Ma, Xun Jiao |
Detecting and Bypassing Trivial Computations in Convolutional Neural Networks. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shaahin Angizi, Deliang Fan |
Deep Neural Network Acceleration in Non-Volatile Memory: A Digital Approach. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tingting Zhang, Weiqiang Liu 0001, Jie Han 0001, Fabrizio Lombardi |
Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Encoders. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz |
Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jinkai Wang, Yue Zhang 0010, Chenyu Lian, Guanda Wang, Kun Zhang 0030, Xiulong Wu, Youguang Zhang, Weisheng Zhao |
High speed and reliable Sensing Scheme with Three Voltages for STT-MRAM. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Steffen Frerix, Saeideh Shirinzadeh, Saman Fröhlich, Rolf Drechsler |
ComPRIMe: A Compiler for Parallel and Scalable ReRAM-based In-Memory Computing. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Guanda Wang, Yue Zhang 0010, Zhe Huang, Jinkai Wang, Kun Zhang 0030, Zhizhong Zhang, Youguang Zhang, Weisheng Zhao |
Thermal Stable and Fast Perpendicular Shape Anisotropy Magnetic Tunnel Junction. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang 0006, Lirida A. B. Naviner |
Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM. |
NANOARCH |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ioannis Karafyllidis, Georgios Ch. Sirakoulis, Panagiotis Dimitrakis |
Representation of Qubit States using 3D Memristance Spaces: A first step towards a Memristive Quantum Simulator. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelika Balliou, Jiri Pfleger, George Skoulatakis, Samrana Kazim, Jan Rakusan, Stella Kennou, Nikos Glezos |
Programmable Molecular-Nanoparticle Multi-junction Networks for Logic Operations. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Deming Zhang, Yanchun Hou, Chengzhi Wang, Jie Chen 0009, Lang Zeng, Weisheng Zhao |
Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Amad Ul Hassen, Salman Anwar Khokhar, Haseeb Aslam Butt, Sumit Kumar Jha 0001 |
Free BDD based CAD of Compact Memristor Crossbars for in-Memory Computing. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Pratima Chatterjee, Prasun Ghosal |
Power Analysis of an mRNA-Ribosome System. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Loai Danial, Shahar Kvatinsky |
Real-Time Trainable Data Converters for General Purpose Applications. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Eleni Maragkoudaki, Przemyslaw Mroszczyk, Vasilis F. Pavlidis |
Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Chaoxin Ding, Wang Kang 0001, He Zhang 0011, Youguang Zhang, Weisheng Zhao |
A Novel Cross-point MRAM with Diode Selector Capable of High-Density, High-Speed, and Low-Power In-Memory Computation. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Manuel Escudero, Ioannis Vourkas, Antonio Rubio 0001, Francesc Moll |
Variability-Tolerant Memristor-based Ratioed Logic in Crossbar Array. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Orestis Liolis, Vassilios A. Mardiris, Georgios Ch. Sirakoulis, Ioannis G. Karafyllidis |
Quantum-dot Cellular Automata RAM design using Crossbar Architecture. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Yande Jiang, Nicoleta Cucu Laurenciu, Sorin Cotofana |
Complementary Arranged Graphene Nanoribbon-based Boolean Gates. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Catherine E. Graves, Wen Ma, Xia Sheng, Brent Buchanan, Le Zheng, Sity Lam, Xuema Li, Sai Rahul Chalamalasetti, Lennie Kiyama, Martin Foltin, John Paul Strachan, Matthew P. Hardy |
Regular Expression Matching with Memristor TCAMs for Network Security. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Noltsis, Panayiotis Englezakis, Eleni Maragkoudaki, Chrysostomos Nicopoulos, Dimitrios Rodopoulos, Francky Catthoor, Yiannakis Sazeides, Davide Zoni, Dimitrios Soudris |
Fast Estimations of Failure Probability Over Long Time Spans. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajanikanth Desh, Naveen Kumar Macha, Sehtab Hossain, Repalle Bhavana Tejaswini, Mostafizur Rahman |
A Novel Analog to Digital Conversion Concept with Crosstalk Computing. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Reda Boumchedda, Jean-Philippe Noel, Bastien Giraud, Adam Makosiej, Marco Antonio Rios, Eduardo Esmanhotto, Emilien Bourde-Cicé, Mathis Bellet, David Turgis, Edith Beigné |
Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage Operations in 28 nm 3D Monolithic CoolCubeTM Technology. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Linbin Chen, Pilin Junsangsri, Pedro Reviriego, Fabrizio Lombardi |
CCE: A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded Systems. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vaibhav Vyas, Joseph S. Friedman |
Sequential Circuit Design with Bilayer Avalanche Spin Diode Logic. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | |
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2018, Athens, Greece, July 17-19, 2018 |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Heinz Riener, Eleonora Testa, Luca G. Amarù, Mathias Soeken, Giovanni De Micheli |
Size Optimization of MIGs with an Application to QCA and STMG Technologies. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuying Zhu 0003, Weiqiang Liu 0001, Jie Han 0001, Fabrizio Lombardi |
A Probabilistic Error Model and Framework for Approximate Booth Multipliers. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Seyed Nima Mozaffari, Krishna Prasad Gnawali, Spyros Tragoudas |
An Aging Resilient Neural Network Architecture. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandru Paler |
Controlling distilleries in fault-tolerant quantum circuits: problem statement and analysis towards a solution. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mehrdad Biglari, Tobias Lieske, Dietmar Fey |
High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Naveen Kumar Macha, Sandeep Geedipally, Bhavana Tejaswini Repalle, Md Arif Iqbal, Wafi Danesh, Mostafizur Rahman |
Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic Circuits. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammed Ceylan Morgül, Onur Tunali, Mustafa Altun, Luca Frontini, Valentina Ciriani, Elena Ioana Vatajelu, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu |
Integrated Synthesis Methodology for Crossbar Arrays. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vassilios A. Mardiris, Orestis Liolis, Georgios Ch. Sirakoulis, Ioannis G. Karafyllidis |
Signal Synchronization in Large Scale Quantum-dot Cellular Automata Circuits. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi |
Overcoming Crossbar Nonidealities in Binary Neural Networks Through Learning. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Qin Li 0016, Huifeng Zhu, Fei Qiao, Qi Wei 0001, Xinjun Liu, Huazhong Yang |
Energy-efficient MFCC extraction architecture in mixed-signal domain for automatic speech recognition. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammed E. Fouda, Ahmed M. Eltawil, Fadi J. Kurdahi |
Minimal Disturbed Bits in Writing Resistive Crossbar Memories. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mihaela Malita, Gheorghe M. Stefan |
A Recursive Growing & Featuring Mechanism for Nanocomputing Structures. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantinos Rallis, Georgios Ch. Sirakoulis, Ioannis Karafyllidis, Antonio Rubio 0001 |
Multi-Valued Logic Circuits on Graphene Quantum Point Contact Devices. |
NANOARCH |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Wafi Danesh, Mostafizur Rahman |
Linear regression based multi-state logic decomposition approach for efficient hardware implementation. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiajun Shi, Mingyu Li, Csaba Andras Moritz |
Power-delivery network in 3D ICs: Monolithic 3D vs. Skybridge 3D CMOS. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sachin Bhat, Sourabh Kulkami, Jiajun Shi, Mingyu Li, Csaba Andras Moritz |
SkyNet: Memristor-based 3D IC for artificial neural networks. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhezhi He, Shaahin Angizi, Farhana Parveen, Deliang Fan |
High performance and energy-efficient in-memory computing architecture based on SOT-MRAM. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammed Affan Zidan, YeonJoo Jeong, Wei D. Lu |
Hybrid neural network using binary RRAM devices. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Shaloo Rakheja, N. Kani |
Polymorphic spintronic logic gates for hardware security primitives - Device design and performance benchmarking. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Arne Heittmann, Tobias G. Noll |
Mixing circuit based on neural associative memories and nanoelectronic 1S1R cells. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Elena Ioana Vatajelu, Lorena Anghel |
Fully-connected single-layer STT-MTJ-based spiking neural network under process variability. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Chang 0002, Zhaohao Wang, Youguang Zhang, Weisheng Zhao |
Reconfigurable processing in memory architecture based on spin orbit torque. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Kelsey Scharnhorst, Walt Woods, Christof Teuscher, Adam Z. Stieg, James K. Gimzewski |
Non-temporal logic performance of an atomic switch network. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Odilia Coi, Guillaume Patrigeon, Sophiane Senni, Lionel Torres, Pascal Benoit |
A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Dilip P. Vasudevan, George Michelogiannakis, David Donofrio, John Shalf |
CASPER - Configurable design space exploration of programmable architectures for machine learning using beyond moore devices. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | |
IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017 |
NANOARCH |
2017 |
DBLP BibTeX RDF |
|
| 1 | Mohammad Mahmoud A. Taha, Christof Teuscher |
Naive Bayesian inference of handwritten digits using a memristive associative memory. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingyu Li, Jiajun Shi, Sachin Bhat, Csaba Andras Moritz |
Fine-grained 3D reconfigurable computing fabric with RRAM. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Zuodong Zhang, Lang Zeng, Tianqi Gao, Deming Zhang, Xiaowan Qin, Mingzhi Long, Youguang Zhang, Haiming Yu, Weisheng Zhao |
Frequency modulation of spin torque nano oscillator with voltage controlled magnetic anisotropy effect. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mihai Lefter, Thomas Marconi, George Razvan Voicu, Sorin Dan Cotofana |
Low cost multi-error correction for 3D polyhedral memories. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaowan Qin, Lang Zeng, Tianqi Gao, Deming Zhang, Mingzhi Long, Youguang Zhang, Weisheng Zhao |
Proposal for novel magnetic memory device with spin momentum locking materials. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudipta Bhuin, Joseph Sweeney, Samuel Pagliarini, Ayan Kumar Biswas, Lawrence T. Pileggi |
A self-calibrating sense amplifier for a true random number generator using hybrid FinFET-straintronic MTJ. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | S. J. Dat Tran, Christof Teuscher |
Memcapacitive reservoir computing. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Naveen Kumar Macha, Sandeep Geedipally, Mostafizur Rahman |
Ultra high density 3D SRAM cell design in Stacked Horizontal Nanowire (SN3D) fabric. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Nishtha Sharma, Andrew Marshall, Jonathan Bird |
Verilog - A compact model of a ME-MTJ based XNOR/NOR gate. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Karthik Yogendra, Minsuk Koo, Kaushik Roy 0001 |
Energy efficient computation using injection locked bias-field free spin-hall nano-oscillator array with shared heavy metal. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan Hu, Joseph S. Friedman |
Transient model with interchangeability for dual-gate ambipolar CNTFET logic design. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Levisse, Pablo Royer, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal |
Architecture, design and technology guidelines for crosspoint memories. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Guanda Wang, Yue Zhang 0010, Zhizhong Zhang, Jiang Nan, Zhenyi Zheng, Yu Wang, Lang Zeng, Youguang Zhang, Weisheng Zhao |
Compact modeling of high spin transfer torque efficiency double-barrier magnetic tunnel junction. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Dwaipayan Chakraborty, Sunny Raj, Sumit Kumar Jha 0001 |
A compact 8-bit adder design using in-memory memristive computing: Towards solving the Feynman Grand Prize challenge. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Fuxi Cai, Wei D. Lu |
Epsilon-greedy strategy for online dictionary learning with realistic memristor array constraints. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Linbin Chen, Jie Han 0001, Weiqiang Liu 0001, Fabrizio Lombardi |
Design and operational assessment of an intra-cell hybrid L2 cache. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein |
Spatio-temporal learning with arrays of analog nanosynapses. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Amad Ul Hassen |
Automated synthesis of compact multiplier circuits for in-memory computing using ROBDDs. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Edouard Giacomin, Jorge Romero Gonzalez, Pierre-Emmanuel Gaillardon |
Low-power multiplexer designs using three-independent-gate field effect transistors. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Walt Woods, Christof Teuscher |
Approximate vector matrix multiplication implementations for neuromorphic applications using memristive crossbars. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Alsuwaiyan, Kartik Mohanram |
L3EP: Low latency, low energy program-and-verify for triple-level cell phase change memory. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Salin Junsangsri, Fabrizio Lombardi |
AOI-based data-centric circuits for near-memory processing. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Dutta, Saima A. Siddiqui, Felix Buttner, Luqiao Liu, Caroline A. Ross, Marc A. Baldo |
A logic-in-memory design with 3-terminal magnetic tunnel junction function evaluators for convolutional neural networks. |
NANOARCH |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Deliang Fan |
Low power in-memory computing platform with four Terminal magnetic Domain Wall Motion devices. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Naveen Kumar Macha, Md Arif Iqbal, Mostafizur Rahman |
Fine-grained 3-D CMOS concept using stacked horizontal nanowire. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingyu Li, Santosh Khasanvis, Jiajun Shi, Sachin Bhat, Mostafizur Rahman, Csaba Andras Moritz |
Towards automatic thermal network extraction in 3D ICs. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhibo Wang 0004, Rui Hua, Yongpan Liu, Huazhong Yang |
A compare-and-select error tolerant scheme for nonvolatile processors. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Mahmoud A. Taha, Walt Woods, Christof Teuscher |
Approximate in-memory Hamming distance calculation with a memristive associative memory. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Sorin Cotofana, Costin Anghel |
TFET NDR skewed inverter based sensing method. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rotem Ben Hur, Shahar Kvatinsky |
Memory Processing Unit for in-memory processing. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Chang 0002, Zhaohao Wang, Yuqian Gao, Wang Kang 0001, Youguang Zhang, Weisheng Zhao |
Evaluation of spin-Hall-assisted STT-MRAM for cache replacement. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhizhong Zhang, Yue Zhang 0010, Lei Yue, Li Su, Yichuan Shi, Youguang Zhang, Weisheng Zhao |
Ultra-low power all spin logic device acceleration based on voltage controlled magnetic anisotropy. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Erya Deng, Lorena Anghel, Guillaume Prenat, Weisheng Zhao |
Multi-context non-volatile content addressable memory using magnetic tunnel junctions. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tian Cao 0005, Weiqiang Liu 0001, Chenghua Wang, Xiao-Ping Cui, Fabrizio Lombardi |
Design of approximate Redundant Binary multipliers. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jintao Yu, Razvan Nane, Adib Haron, Said Hamdioui, Henk Corporaal, Koen Bertels |
Skeleton-based design and simulation flow for Computation-in-Memory architectures. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Hao Cai, You Wang 0002, Lirida A. B. Naviner, Zhaohao Wang, Weisheng Zhao |
Approximate computing in MOS/spintronic non-volatile full-adder. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Dutta, Michael Price 0001, Marc A. Baldo |
Nonvolatile online CMOS trimming with magnetic tunnel junctions. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoxiao Wang, Robin Tan, Marek A. Perkowski |
Synthesis of memristive circuits based on stateful IMPLY gates using an evolutionary algorithm with a correction function. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicoleta Cucu Laurenciu, Tushar Gupta, Valentin Savin, Sorin Dan Cotofana |
Error Correction Code protected Data Processing Units. |
NANOARCH |
2016 |
DBLP DOI BibTeX RDF |
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