Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Christian Kauhaus, Dietmar Fey |
Building Mini-Grid Environments with Virtual Private Networks: A Pragmatic Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 111-115, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Sarma Nedunuri, John Y. Cheung, Prakasa Nedunuri |
Design of Low Memory Usage Discrete Wavelet Transform on FPGA Using Novel Diagonal Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 192-197, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Dajin Wang |
An Algorithm to Embed Hamiltonian Cycles in Crossed Cubes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 49-54, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Valérie Fiolet, Eryk Laskowski, Richard Olejnik, Lukasz Masko, Bernard Toursel, Marek Tudruj |
Optimizing Distributed Data Mining Applications Based on Object Clustering Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 257-262, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Qi Huang 0001, Jianbo Yi, Shi Jing, Ke Huang |
Development of an MPI for Power System Distributed Parallel Computing in Wide Area Network with P2P Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 411-416, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Grid computing, Message Passing Interface (MPI), Peer-to-peer (P2P), Electric power system, Distributed parallel computing |
1 | Pawel Gepner, Michal Filip Kowalik |
Multi-Core Processors: New Way to Achieve High System Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 9-13, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Luis García 0003, Coromoto León, Gara Miranda, Casiano Rodríguez |
Two-Dimensional Cutting Stock Problem: Shared Memory Parallelizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 438-443, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Boguslaw Butrylo |
Distributed Optimization of Temperature Field for Reliable Construction of Electronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 470-476, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Qi Huang, Kaiyu Qin, Wenyong Wang |
A Software Architecture Based on Multi-Agent and Grid Computing for Electric Power System Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 405-410, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Software architecture, Grid computing, Electric power system, Multi-agent technology |
1 | Björn Griese, Boris Kettelhoit, Mario Porrmann |
Evaluation of On-Chip Interfaces for Dynamically Reconfigurable Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 214-219, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Leszek Kasprzyk, Ryszard Nawrowski, Andrzej Tomczewski |
Using a Parallel Virtual Machine to Optimize Lighting Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 427-432, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Marcin Gorawski, Michal Gorawski |
Balanced Spatio-Temporal Data Warehouse with R-MVB, STCAT and BITMAP Indexes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 43-48, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | T. Srinivasan 0001, N. Dhanasekar, M. Nivedita, R. Dhivyakrishnan, A. A. Azeezunnisa |
Scalable and Parallel Aggregated Bit Vector Packet Classification Using Prefix Computation Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 139-144, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Ahmed Yassin Al-Dubai, Imed Romdhani |
A Performance Study of Path Based Multicast Communication Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 245-250, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Dirk Fimmel, Stefan Quitzk, Wolfgang Schwarz |
Large-Scale Tolerance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 33-38, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Hartmut Schmeck |
Organic Computing-Vision and Challenge for System Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 3, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Axel Siebenborn, Oliver Bringmann 0001, Wolfgang Rosenstiel |
Communication Analysis for Network-on-Chip Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 315-320, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | |
2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![IEEE Computer Society, 0-7695-2080-4 The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
1 | Georgios Dimitriou, Constantine D. Polychronopoulos |
Loop Scheduling for Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 361-366, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Bernhard Fechner, Jörg Keller 0001 |
A Fault-Tolerant Voting Scheme for Multithreaded Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 237-239, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Robert Piotr Bycul |
A Graphical Interface to a Parallel Solver: PSGE Description Through an Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 334-337, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Matthias Grünewald, Dinh Khoi Le, Uwe Kastens, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert 0001, Adrian Slowik, Michael Thies |
Network Application Driven Instruction Set Extensions for Embedded Processing Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 209-214, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Andreas Blaszczyk |
The Role of Parallel Computing at ABB Corporate Research Switzerland. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 4-, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Damian Kopanski, Janusz Borkowski, Marek Tudruj |
Co-Ordination of Parallel GRID Applications using Synchronizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 323-327, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Tomasz Madajczak |
An Optimal Abstraction Model for Hardware Multithreading in Modern Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 71-76, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Mathias Kortke, Jan Müller 0001, Rainer Schaffer, Sebastian Siegel, Renate Merker, Jürgen Kelber |
A Parallel Hardware-Software System for Signal Processing Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 215-220, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | A. S. Nepomniaschaya, Zbigniew Kokosinski |
Associative Graph Processor and Its Properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 297-302, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
associative parallel processor, bit-parallel processing, associative graph processing, multiple-search |
1 | Wlodzimierz Bielecki, Rafal Kocisz |
A Modified Vertex Method for Parallelization of Arbitrary Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 91-96, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jamil Saif, Henryk Krawczyk |
Tuning of Parallel ROI Matching Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 246-248, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Grzegorz Pastuszak |
A Novel Architecture of Arithmetic Coder in JPEG2000 Based on Parallel Symbol Encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 303-308, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Octav Brudaru, Octavian Buzatu |
Distributed Genetic Algorithm for Finding Fuzzy Rational Approximators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 394-397, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jork Löser, Hermann Härtig |
Using Switched Ethernet for Hard Real-Time Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 349-353, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Real Time Parallel Computing |
1 | Wojciech Bozejko, Mieczyslaw Wodecki |
Parallel Tabu Search Method Approach for Very Difficult Permutation Scheduling Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 156-161, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Anna Derezinska |
Estimating Dependability of Parallel FFT Application using Fault Injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 240-245, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Marek Tudruj, Lukasz Masko |
Fine-Grain Numerical Computations in Dynamic SMP Clusters with Communication on the Fly. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 386-389, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Christian Sauer 0001, Matthias Gries, José Ignacio Gómez, Scott J. Weber, Kurt Keutzer |
Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 129-134, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Sylvain Alliot, Laurentiu Nicolae, Martijn van Veelen |
A Tool for Exploring the Large Scale Signal Processing Systems Specification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 341-348, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Stanislaw Chrobot |
Introducing Variable Sharing to Process Calculi. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 99-104, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Janusz Borkowski |
Parallel Program Control Based on Hierarchically Detected Consistent Global States. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 328-333, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Torsten Mehlan, Wolfgang Rehm, Ralph Engler, Tobias Wenzel |
Providing a High-Performance VIA-Module for LAM/MPI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 277-282, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jörg Schneider, Vincent Kotzsch, Steffen Rülke |
Demonstrator: Reuse Automation for Reconfigurable System-on-Chip Design within a DVB Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 177-180, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jaroslaw Forenc, Andrzej Jordan |
The Modified Speculative Method for the Transient States Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 189-193, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | A. Rodríguez, A. González, Manuel P. Malumbres |
Performance Evaluation of Parallel MPEG-4 Video Coding Algorithms on Clusters of Workstations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 354-357, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Lukasz Masko |
Program Graph Scheduling for SMP Clusters with Communication on-the-Fly Based on Extended DS Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 65-70, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Przemyslaw Stpiczynski |
Numerical Evaluation of Linear Recurrences on High Performance Computers and Clusters of Workstations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 200-205, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Marc Franzmeier, Christopher Pohl, Mario Porrmann, Ulrich Rückert 0001 |
Hardware Accelerated Data Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 309-314, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Adam Smyk, Marek Tudruj |
Parallel Implementation of FDTD Computations Based on Macro Data Flow Paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 19-24, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Christian Dufour, Jean Bélanger |
A PC-Based Real-Time Parallel Simulator of Electric Systems and Drives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 105-113, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Tobias Oppold, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel |
A Design Environment for Processor-Like Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 171-176, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Jie Guo 0007, Michael Hosemann, Gerhard P. Fettweis |
Employing Compilers for Determining Architectural Features of Application-Specific DSPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 39-44, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard P. Fettweis |
Compiler Scheduling for STA-Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 45-50, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Dietmar Fey, Lutz Hoppe, Andreas Loos |
Reconfigurable On-Chip SIMD Processor Architectures for Intelligent CMOS Camera Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 251-255, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Pawel Kaczmarek, Henryk Krawczyk |
Influence of Exception Handling on Distributed Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 367-371, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Victor E. Malyshkin, I. Naumkin, N. Malyshkin, Vladimir D. Korneev, Michael Ostapkevich |
Digital Electromagnetic Model of the Power System: Parallel Implementation for Multicomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 380-385, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Eryk Laskowski, Richard Olejnik, Bernard Toursel, Marek Tudruj |
Scheduling Byte Code-Defined Data Dependence Graphs of Object Oriented Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 398-401, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Erik Vonnahme, Björn Griese, Mario Porrmann, Ulrich Rückert 0001 |
Dynamic Reconfiguration of Real-Time Network Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 376-379, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Andreas Kühn, Sorin A. Huss |
Dynamically Reconfigurable Hardware for Object-Oriented Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 181-186, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Sebastian Siegel, Renate Merker |
Algorithm Partitioning including Optimized Data-Reuse for Processor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 85-90, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Peter Benner, Enrique S. Quintana-Ortí, Gregorio Quintana-Ortí |
Computing Passive Reduced-Order Models for Circuit Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 146-151, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Andrzej Jordan, Pawel B. Myszkowski, Konrad Radzik |
The Parallel Computations for the Linear State Equations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 143-145, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Pawel Czarnul, Arkadiusz Urbaniak, Marcin Fraczak, Maciej Dyczkowski, Bartlomiej Balcerek |
Towards Easy-to-Use Checkpointing of MPI Applications within CLUSTERIX. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 390-393, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Process Checkpointing, Checkpointing Parallel Applications, Parallel Software Environments |
1 | Claudia Roberta Calidonna, Mario Mango Furnari |
The Cellular Automata Network Compiler System: Modules and Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 271-276, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | V. G. Khoroshevsky |
Architecture and Functioning of Large-Scale Distributed Reconfigurable Computer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 262-267, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Silvio Misera, Heinrich Theodor Vierhaus |
FIT - A Parallel Hierarchical Fault Simulation Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 289-294, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Lev Kirischian, Irina Terterian, Pil Woo Chun, Vadim Geurkov |
Re-Configurable Parallel Stream Processor with Self-Assembling and Self-Restorable Micro-Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 165-170, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Henryk Krawczyk, Tomasz Madajczak |
Optimal Programming of Critical Sections in Modern Network Processors under Performance Requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 25-30, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Carsten Clauss, Martin Pöppe, Thomas Bemmerl |
Optimising MPI Applications for Heterogeneous Coupled Clusters with MetaMPICH. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 7-12, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Noboru Tanabe, Hironori Nakajo, Hirotaka Hakozaki, Masasige Nakatake, Yasunori Dohi, Hideharu Amano |
A New Memory Module for Memory Intensive Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 123-128, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Boguslaw Butrylo, Christian Vollaire, Laurent Nicolas |
Limits of the Distributed Finite Element Time Domain Algorithm in Multi-Computer Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 194-199, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard P. Fettweis |
Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 372-375, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Uwe Hatnik, Sven Altmann |
Using ModelSim, Matlab/Simulink and NS for Simulation of Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 114-119, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Hendrik Seidel, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis |
Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 221-225, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Georgios Tsilikas, Martin Fleury |
Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 13-18, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Rolf Hoffmann, Wolfgang Heenes, Mathias Halbach |
Implementation of the Massively Parallel Model GCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 135-139, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Lukasz Masko, Grégory Mounié, Denis Trystram, Marek Tudruj |
Moldable Task Scheduling in Dynamic SMP Clusters with Communication on the Fly. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 59-64, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Carsten Maple, Liang Guo, Jie Zhang 0003 |
Parallel Genetic Algorithms for Third Generation Mobile Network Planning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 229-236, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
optimisation, coverage, CDMA, capacity, 3G, parallel genetic algorithm |
1 | Wojciech Walendziuk, Andrzej Jordan, Adam Skorek |
Visualization of the Parallel Finite-Difference Time-Domain Method Computations Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 152-155, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Eryk Laskowski |
Program Scheduling in Look-Ahead Reconfigurable Parallel Systems with Multiple Communication Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 256-261, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Daniel Matolin, Jörg Schreiter, Stefan Getzlaff, René Schüffny |
An Analog VLSI Pulsed Neural Network Implementation for Image Segmentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 51-55, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Peter Buchholz 0001, Andriy Panchenko 0002 |
An EM Algorithm for Fitting of Real Traffic Traces to PH-Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 283-288, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Frank Hannig, Jürgen Teich |
Dynamic Piecewise Linear/Regular Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 79-84, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
1 | Janusz Borkowski, Marek Rulak |
Parallel Simulation of Liquid Flow Using LGA Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 273-276, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Vitaly E. Kozura, Valery A. Nepomniaschy, Ruslan M. Novikov |
Verification of Distributed Systems Modelled by High-Level Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 61-66, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Katalin Pásztor-Varga |
A Number Theoretical Approach to the Allocation Problem of a Pipelined Dataflow Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 199-, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
control data flow graph, High level synthesis, pipeline, allocation, time diagram |
1 | Anatoly Prihozhy, Daniel Mlynek, Michail Solomennik, Marco Mattavelli |
Techniques for Optimization of Net Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 211-216, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
net algorithm, existence problem, optimization, parallelization, critical path |
1 | Joanna Kolodziej |
Modeling Hierarchical Genetic Strategy as a Lindenmayer System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 409-414, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hierarchical genetic algorithms, hierarchical grammars, global optimization, robot motion planning |
1 | Ewa Niewiadomska-Szynkiewicz, Andrzej Sikora |
Algorithms for Distributed Simulation - Comparative Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 261-266, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Giang T. Nguyen 0001, Viet D. Tran, Margaréta Kotocová |
Integrating Fault-Tolerant Feature into TOPAS Parallel Programming Environment for Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 157-, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Adam Smyk, Marek Tudruj |
Irregular Fine-Grain Parallel Computing Based on the Slide Register Window Architecture of Hitachi SR2201. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 39-43, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Carlos Ortiz, Adam Skorek, Michel Lavoie, Marek B. Zaremba |
Parallel Analysis of Electrothermal Phenomena in a Dry Type Distribution Transformer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 381-385, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Stanislaw Chrobot |
Modelling Communication in Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 55-60, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Péter Kacsuk |
Parallel Program Development and Execution in the Grid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 131-138, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
parallel program development, parallel job execution, grid monitoring |
1 | Anna Swiecicka, Franciszek Seredynski |
Applying Cellular Automata in Multiprocessor Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 177-182, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Boguslaw Butrylo, Christian Vollaire, Laurent Nicolas |
Parallel Implementation of the Vector Finite Element and Finite Difference Time Domain Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 347-352, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Anna Niedzicka |
Computation-Intensive Image Processing Algorithm Parallelization on Multiple Hardware Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 446-, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Volodymyr Beletskyy, R. Drazkowski, Marcin Liersz |
An Approach to Parallelizing Non-Uniform Loops with the Omega Calculator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 119-122, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
non-uniform dependences, Presburger formulas, loop parallelization |
1 | Laurence Tianruo Yang |
Parallel Lanczos Bidiagonalization for Total Least Squares Filter in Robot Navigation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 415-418, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Tomasz Olas, Lukasz Lacinski, Konrad Karczewski, Adam Tomas, Roman Wyrzykowski |
Performance of Different Comunication Mechanisms for FEM Computations on PC-Based Cluster with SMP Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 305-311, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Slawomir Klimczak, Marcin Kwapisz, Ewa Lipowska-Nadolska |
Application of Systolic Computer Systola 1024 in Image Compression Process in Standard JPEG2000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 435-439, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
1 | Florent Devin, Pierre Boulet, Jean-Luc Dekeyser, Philippe Marquet |
GASPARD - A Visual Parallel Programming Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 145-150, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|