Search results for "VHDL-AMS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
32	Salima Feki, Ahmed Fakhfakh, Yannick Hervé, Abdelmajid Oualha, Nouri Masmoudi	VHDL-AMS virtual prototyping in power electronics.	FDL	2005	DBLP BibTeX RDF
32	Corrado Marino, Luca Fanucci, Francesco Iozzi, Massimiliano Forliti, Alessandro Rocchi, A. Giambastiani, Marco De Marinis	VHDL-AMS Modelling and System Verification Flow.	FDL	2005	DBLP BibTeX RDF
32	Caitriona Carr	Automatic generation of VHDL-AMS from UML representations of mixed signal systems.		2005	RDF
32	Richard Perdriau, Mohammed Ramdani, Jean-Luc Levant, Eric Tinlot, Anne-Marie Trullemans-Anckaert	An EMC-oriented VHDL-AMS simulation methodology for dynamic current activity assessment.	Microelectron. J.	2004	DBLP DOI BibTeX RDF
32	Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski	Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS.	DATE	2004	DBLP DOI BibTeX RDF
32	Patricia Desgreys, Yannick Hervé, Jean Oudinot, S. Snaidero, Mohamed Karray	SoC modelling for virtual prototyping with VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	Elena Martín, Laura Barrachina, Carles Ferrer 0001	Practical Case Example of Inertial MEMS Modeling with VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	C. T. Carr, T. Martin McGinnity, L. J. McDaid	VHDL-AMS code gneration from UML structural representations.	FDL	2004	DBLP BibTeX RDF
32	E.-P. Wagner, Joachim Haase	Monte Carlo Simulation Using VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	M. Garon, Jean-Francois Diouris, Serge Toutain, Emmanuel Cottais, Yide Wang	Behavioural modelling of a power amplifier in VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	Yannick Hervé, Ahmed Fakhfakh	Requirements and Verifications through an extension of VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	Foudil Dadouche, Annick Alexandre, Bertrand Granado, Andréa Pinna 0001, Patrick Garda	A VHDL-AMS Configuration for Active Pixel Sensors.	FDL	2004	DBLP BibTeX RDF
32	Peter R. Wilson, Tom J. Kazmierski	A novel approach to mixed-domain behavioral modeling of ferromagnetic hysteresis in VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	J. Shields, Ernst Christen	Mixed Nets, Conversion Models, and VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	Rachid Guelaz, Djilali Kourtiche, Yannick Hervé, Mustapha Nadi	Modeling of the ultrasonic nonlinear propagation with VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
32	S. Loued, Ahmed Fakhfakh, Mourad Loulou, Nouri Masmoudi, Yannick Hervé	High Level Self-adjusted Models and VHDL-AMS; Application for a freguency synthesizer modelling.	FDL	2004	DBLP BibTeX RDF
32	Marco Zorzi, Francesco Franzè, Nicolò Speciale, Guido Masetti	A tool for the integration of new VHDL-AMS models in SPICE.	ISCAS (4)	2004	DBLP BibTeX RDF
32	Mark Zwolinski, Andrew D. Brown	Behavioural modelling of analogue faults in VHDL-AMS - a case study.	ISCAS (5)	2004	DBLP BibTeX RDF
32	Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Andrew J. Rushton	Multiple domain behavioral modeling using VHDL-AMS.	ISCAS (5)	2004	DBLP BibTeX RDF
32	Tom J. Kazmierski, Fazrena A. Hamid	Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization.	ISCAS (1)	2004	DBLP BibTeX RDF
32	B. Mongellaz, François Marc, Yves Danto	Ageing simulation of MOSFET circuit using a VHDL-AMS behavioural modelling: an experimental case study.	Microelectron. Reliab.	2003	DBLP DOI BibTeX RDF
32	Joachim Haase	Regeln für die Erstellung von VHDL-AMS-Modellen.	MBMV	2003	DBLP BibTeX RDF
32	François Marc, B. Mongellaz, Yves Danto	Reliability simulation of electronic circuits with VHDL-AMS.	FDL	2003	DBLP BibTeX RDF
32	Jean Oudinot, G. Overton, Aitor Endemaño Isasi, Marc P. Y. Desmulliez, Jean-Yves Fourniols, Sylvaine Muratet	Micromotor Simulation with VHDL-AMS.	FDL	2003	DBLP BibTeX RDF
32	Alex Doboli, Hua Tang, Hui Zhang 0057	Towards High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS Specifications.	FDL	2003	DBLP BibTeX RDF
32	Fabien Mieyeville, Matthieu Briere, Ian O'Connor, Frédéric Gaffiot, Gilles Jacquemod	A VHDL-AMS library of hierarchical optoelectronic device models.	FDL	2003	DBLP BibTeX RDF
32	Joachim Haase	Rules for Analog and Mixed-Signal VHDL-AMS Modeling.	FDL	2003	DBLP BibTeX RDF
32	Guillaume Monnerie, Noëlle Lewis, Dominique Dallet, Hervé Levi, M. Robbe	Modelling of transient noise sources with VHDL-AMS and normative spectral interpretation.	FDL	2003	DBLP BibTeX RDF
32	Ahmed Fakhfakh, Mourad Loulou, Nesrine Ksentini, Nouri Masmoudi, Jean-Jacques Charlot	VHDL-AMS Behavioural Modelling of a Switched Current Sigma-Delta Modulator.	FDL	2003	DBLP BibTeX RDF
32	Fazrena A. Hamid, Tom J. Kazmierski	FIST - a VHDL-AMS based architectural synthesis strategy for integrated high-frequency analogue filters.	FDL	2003	DBLP BibTeX RDF
32	Rachid Guelaz, Djilali Kourtiche, Mustapha Nadi	A behavioural description with VHDL-AMS of a piezo-ceramic ultrasound transducer based on the Redwood's model.	FDL	2003	DBLP BibTeX RDF
32	Mohamed Karray, Patricia Desgreys, Jean-Jacques Charlot	A CMOS inverter TIA modeling with VHDL-AMS.	IWSOC	2003	DBLP DOI BibTeX RDF
32	Jochen Mades	Strukturelle Konsistenz und Regularisierung von VHDL-AMS-Modellen.		2003	RDF
32	Liyi Xiao, Yizheng Ye, Bin Li	A New Synchronization Algorithm for VHDL-AMS Simulation.	J. Comput. Sci. Technol.	2002	DBLP DOI BibTeX RDF
32	B. Mongellaz, François Marc, N. Milet-Lewis, Yves Danto	Contribution to ageing simulation of complex analogue circuit using VHDL-AMS behavioural modelling language.	Microelectron. Reliab.	2002	DBLP DOI BibTeX RDF
32	Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kiliç	Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS.	DATE	2002	DBLP DOI BibTeX RDF
32	Gert Voland	Is VHDL-AMS suited to meet the Challenges of Deep Submicron Integration?.	ESM	2002	DBLP BibTeX RDF
32	Jean Oudinot, Serge Scotti, Jean Ravatin, Audrey Le-clercq, Jacky Lebrun	Full Transceiver Circuit Simulation using VHDL-AMS.	ESM	2002	DBLP BibTeX RDF
32	Ahmed Fakhfakh, Hervé Levi, N. Milet-Lewis, Yves Danto	Behavioral Modeling of Analogue and Mixed Integrated Systems with VHDL-AMS for RF Applications.	SBCCI	2002	DBLP BibTeX RDF
32	Raja Maghrebi, Mohamed Masmoudi	Multi-slope analog-to-digital converters modeling based on VHDL-AMS.	SMC	2002	DBLP DOI BibTeX RDF
32	Christophe Lallement, François Pêcheux, Yannick Hervé	A VHDL-AMS Case Study: The Incremental Design of an Efficient 3rd Generation MOS Model of a Deep Sub Micron Transistor.	VLSI-SOC	2001	DBLP BibTeX RDF
32	Jürgen Haase, Peter Schwarz, Peter Trappe, Wolfgang Vermeiren	Erfahrungen mit VHDL-AMS bei der Simulation heterogener Systeme.	MBMV	2000	DBLP BibTeX RDF
32	José-Alejandro López Alcantud, Tom Kazmierski	VHDL-AMS modeling of self-organizing neural systems.	ISCAS	2000	DBLP DOI BibTeX RDF
32	Thomas Schneider 0006, Jochen Mades, Manfred Glesner, André Windisch, Wolfgang Ecker	An Open VHDL-AMS Simulation Framework.	BMAS	2000	DBLP DOI BibTeX RDF
32	Martin Vogels, Bart De Smedt, Georges G. E. Gielen	Modeling and Simulation of a Sigma-Delta Digital to Analog Converter Using VHDL-AMS.	BMAS	2000	DBLP DOI BibTeX RDF
32	Pascal Bontoux, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot, Gilles Jacquemod	Design and Optimization of Optical Links Based on VHDL-AMS Modeling.	BMAS	2000	DBLP DOI BibTeX RDF
32	Vishwashanth R. Kasulasrinivas, Harold W. Carter	Modeling and Simulating Semiconductor Devices Using VHDL-AMS.	BMAS	2000	DBLP DOI BibTeX RDF
32		Java, VHDL-AMS, ADA or C for System Level Specifications?	DATE	1999	DBLP DOI BibTeX RDF
32	Nihal J. Godambe, C.-J. Richard Shi	Behavioral Level Noise Modeling and Jitter Simulation of Phase-Locked Loops with Faults Using VHDL-AMS.	J. Electron. Test.	1998	DBLP DOI BibTeX RDF	behavioral fault modeling, noise, fault modeling, fault simulation, jitter, analog test
32	Peter Frey, Kathiresan Nellayappan, Vasudevan Sahnmugasundaram, Ramesh Sankaran Mayiladuthurai, Chetput L. Chandrashekar, Harold W. Carter	SEAMS: Simulation Environment for VHDL-AMS.	WSC	1998	DBLP DOI BibTeX RDF
32	Natividad Martínez Madrid, Peter T. Breuer, Carlos Delgado Kloos	A semantic model for VHDL-AMS.	CHARME	1997	DBLP BibTeX RDF
26	Pierluigi Daglio, Carlo Roma	A Fully Qualified Top-Down and Bottom-Up Mixed-Signal Design Flow for Non Volatile Memories Technologies.	DATE	2003	DBLP DOI BibTeX RDF
26	Robert L. Ewing	Technology Road Map to Methodologies for Mixed-Signal System Design and Simulation.	J. VLSI Signal Process.	1999	DBLP DOI BibTeX RDF
26	Peter T. Breuer, Natividad Martínez Madrid, Carlos Delgado Kloos	The Computational Description of Analogue System Behaviour.	Prospects for Hardware Foundations	1998	DBLP DOI BibTeX RDF
23	Paul Beckett, Heiko Rudolph	Run.	DELTA	2010	DBLP DOI BibTeX RDF	low power computer architecture, modeling, SOI, VHDL-AMS, double gate
23	Yves Joannon, Vincent Beroulle, Chantal Robach, Smail Tedjini, Jean-Louis Carbonéro	Decreasing Test Qualification Time in AMS and RF Systems.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF	AMS and RF SoCs, parametric fault injection, behavioral modeling, fault-based test, design validation, VHDL-AMS, qualification
19	Felix Breitenecker, Nikolas Popper	Structure of Simulation Systems for Structural-Dynamic Systems.	Asia International Conference on Modelling and Simulation	2007	DBLP DOI BibTeX RDF
19	Ewout Martens, Georges G. E. Gielen	Analyzing continuous-time Delta-Sigma-Modulators with generic behavioral models.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
19	Benjamin Nicolle, William Tatinian, Jean Oudinot, Gilles Jacquemod	Hierarchical Modeling of a Fractional Phase Locked Loop.	PATMOS	2006	DBLP DOI BibTeX RDF
19	Hessa Al-Junaid, Tom J. Kazmierski	HDL models of ferromagnetic core hysteresis using timeless discretisation of the magnetic slope.	DATE	2006	DBLP DOI BibTeX RDF
19	David Broman, Kaj Nyström, Peter Fritzson	Determining over- and under-constrained systems of equations using structural constraint delta.	GPCE	2006	DBLP DOI BibTeX RDF	equation-based, over-constrained, under-constrained, modeling, object-oriented, type checking, separate compilation
19	Scott Little, Nicholas Seegmiller, David Walter, Chris J. Myers, Tomohiro Yoneda	Verification of analog/mixed-signal circuits using labeled hybrid petri nets.	ICCAD	2006	DBLP DOI BibTeX RDF	hybrid petri nets, formal methods
19	Noëlle Lewis, Guillaume Monnerie, Léo Lewis, Jocelyn Sabatier, Pierre Melchior	Automatic procedure generating noise models for discrete-time applications.	ISCAS	2006	DBLP DOI BibTeX RDF
19	Gabriel Popescu, Leonid B. Goldgeisser	Model compatibility aspects in multilingual simulation environments.	ISCAS	2006	DBLP DOI BibTeX RDF
19	Bo Hu, Zhao Li, Lili Zhou, C.-J. Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe	Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
19	Peter R. Wilson, Reuben Wilcock	Behavioural modeling and simulation of a switched-current phase locked loop.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
19	Vanco B. Litovski, Mark Zwolinski, Miona Andrejevic	Behavioural modelling, simulation, test and diagnosis of MEMS using ANNs.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
19	Lei Yang 0019, Cherry Wakayama, C.-J. Richard Shi	Noise aware behavioral modeling of the E-Delta fractional-N frequency synthesizer.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	jitter noise, PLL, phase noise, frequency synthesizer
19	Matthieu Briere, Laurent Carrel, T. Michalke, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot	Design and Behavioral Modeling Tools for Optical Network-on-Chip.	DATE	2004	DBLP DOI BibTeX RDF
19	Pavel V. Nikitin, Vikram Jandhyala, Daniel A. White, Nathan Champagne, John D. Rockway, C.-J. Richard Shi, Chuanyi Yang, Yong Wang 0006, Gong Ouyang, Rob Sharpe, John W. Rockway	Modeling and Simulation of Circuit-Electromagnetic Effects in Electronic Design Flow.	ISQED	2004	DBLP DOI BibTeX RDF
19	Ayman Mounir, Ahmed Mostafa, Maged Fikry	Automatic Behavioural Model Calibration for Efficient PLL System Verification.	DATE	2003	DBLP DOI BibTeX RDF
19	Timm Ostermann, C. Lackner, R. Koessl, Richard Hagelauer, K. Beer, Ludger Krahn, Heinz-Theo Mammen, Werner John, Anton Sauer, Peter Schwarz, Günter Elst, M. Pistauer	LIMA: The New e-Learning Platform in Microelectronic Applications.	MSE	2003	DBLP DOI BibTeX RDF
19	Andrew D. Brown, Mark Zwolinski	The continuous-discrete interface - What does this really mean? Modelling and simulation issues.	ISCAS (3)	2003	DBLP DOI BibTeX RDF
19	Tom J. Kazmierski, Neil Clayton	A Two-Tier Distributed Electronic Design Framework.	DATE	2002	DBLP DOI BibTeX RDF
19	Thomas Zimmer, N. Milet-Lewis, Ahmed Fakhfakh, B. Ardouin, Hervé Levi, J. B. Duluc, Pascal Fouillat	Hierarchical Analogue Design and Behavioural Modelling.	MSE	1999	DBLP DOI BibTeX RDF
19	Jinghong Chen, Sung-Mo Kang	A mixed frequency-time approach for quasi-periodic steady-state simulation of multi-level modeled circuits.	ISCAS (6)	1999	DBLP DOI BibTeX RDF