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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 516 publication records. Showing 516 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
22 | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò |
On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Jerzy W. Greblicki |
CAD software for designing of Totally Self Checking Sequential Circuits. |
DepCoS-RELCOMEX |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Amit Vasudevan, Ramesh Yerraballi |
Cobra: Fine-grained Malware Analysis using Stealth Localized-executions. |
S&P |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Valerij V. Saposhnikov, Vladimir V. Saposhnikov, Andrej A. Morosov, Michael Gössel |
Necessary and Sufficient Conditions for the Existence of Totally Self-Checking Circuits. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
20 | Stanislaw J. Piestrak |
Self-Checking Design in Eastern Europe. |
IEEE Des. Test Comput. |
1996 |
DBLP DOI BibTeX RDF |
|
19 | Debaleena Das, Nur A. Touba, Markus Seuring, Michael Gössel |
Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes. |
IOLTW |
2000 |
DBLP DOI BibTeX RDF |
error detecting codes, Concurrent error detection, self-checking checkers |
19 | Cristiana Bolchini, Luigi Pomante, Donatella Sciuto, Fabio Salice |
A Synthesis Methodology Aimed at Improving the Quality of TSC Devices. |
DFT |
1999 |
DBLP DOI BibTeX RDF |
observability, logic synthesis, totally self-checking circuits |
19 | Cristiana Bolchini, Fabio Salice, Donatella Sciuto |
Fault Analysis in Networks with Concurrent Error Detection Properties. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
error detecting code, fault analysis, Totally Self-Checking |
19 | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò |
Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults. |
J. Electron. Test. |
1995 |
DBLP DOI BibTeX RDF |
CMOS, testability, Bridging fault, self-checking circuits, checker |
19 | Alessandro Bogliolo, Maurizio Damiani |
Synthesis of combinational circuits with special fault-handling capabilitie. |
VTS |
1995 |
DBLP DOI BibTeX RDF |
combinational circuit synthesis, fault-handling capabilities, internal faults, multilevel logic optimization process, logic testing, redundancy, redundancy, design for testability, logic design, combinational circuits, logic CAD, multivalued logic, circuit optimisation, self-checking circuits, circuit reliability, fault-tolerant circuits |
19 | Egor S. Sogomonyan, Michael Gössel |
Design of self-testing and on-line fault detection combinational circuits with weakly independent outputs. |
J. Electron. Test. |
1993 |
DBLP DOI BibTeX RDF |
Concurrent error detection, self-test, self-checking circuits |
19 | Carlos Urias Munoz |
An Approach to Software Product Testing. |
IEEE Trans. Software Eng. |
1988 |
DBLP DOI BibTeX RDF |
software product testing, self-checking test cases, black box test cases, random test cases, correctness measurements, defect circumvention, sampling, program testing, program testing, automatic test case generation, exhaustive testing |
19 | Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gössel |
A New Self-Checking Code-Disjoint Carry-Skip Adder. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Michael Nicolaidis |
Self-exercising checkers for unified built-in self-test (UBIST). |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Mohammed Fadle Abdulla, C. P. Ravikumar |
A self-checking signature scheme for checking backdoor security attacks in Internet. |
J. High Speed Networks |
2004 |
DBLP BibTeX RDF |
|
18 | Steffen Tarnick |
Controllable self-checking checkers for conditional concurrent checking. |
VTS |
1994 |
DBLP DOI BibTeX RDF |
|
18 | Anna Antola, Vincenzo Piuri, Mariagiovanna Sami |
Semi-Concurrent Error Detection in Data Paths. |
DFT |
1997 |
DBLP DOI BibTeX RDF |
|
18 | Uwe Sparmann, Sudhakar M. Reddy |
On the effectiveness of residue code checking for parallel two's complement multipliers. |
IEEE Trans. Very Large Scale Integr. Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Michael Nicolaidis |
Carry checking/parity prediction adders and ALUs. |
IEEE Trans. Very Large Scale Integr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano |
Error Detection in Signed Digit Arithmetic Circuit with Parity Checker. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Nur A. Touba, Edward J. McCluskey |
Logic synthesis of multilevel circuits with concurrent error detection. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Ricardo de Oliveira Duarte, Michael Nicolaidis, Hakim Bederr, Yervant Zorian |
Fault-secure shifter design: results and implementations. |
ED&TC |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Michele Favalli, Cecilia Metra |
Sensing circuit for on-line detection of delay faults. |
IEEE Trans. Very Large Scale Integr. Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Johannes Reisinger |
Time driven operating systems: a case study on the MARS kernel. |
ACM SIGOPS European Workshop |
1992 |
DBLP DOI BibTeX RDF |
|
17 | Lukás Sekanina |
Evolution of Polymorphic Self-checking Circuits. |
ICES |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante |
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. |
IOLTS |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Cecilia Metra, Martin Omaña 0001, Daniele Rossi 0001, José Manuel Cazeaux, T. M. Mak |
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gössel |
A New Self-Checking and Code-Disjoint Non-Restoring Array Divider. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gössel |
New Self-checking Output-Duplicated Booth Multiplier with High Fault Coverage for Soft Errors. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev |
Power-Balanced Self Checking Circuits for Cryptographic Chips. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Martin Omaña 0001, O. Losco, Cecilia Metra, Andrea Pagni |
On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano |
A Self Checking Reed Solomon Encoder: Design and Analysis. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Jing-Ling Yang, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun |
A high-efficiency strongly self-checking asynchronous datapath. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Egor S. Sogomonyan, Daniel Marienfeld, Vitalij Ocheretnij, Michael Gössel |
A New Self-Checking Sum-Bit Duplicated Carry-Select Adder. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Vitalij Ocheretnij, Daniel Marienfeld, Egor S. Sogomonyan, Michael Gössel |
Self-Checking Code-Disjoint Carry-Select Adder with Low Area Overhead by Use of Add1-Circuits. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Kartik Mohanram, Egor S. Sogomonyan, Michael Gössel, Nur A. Touba |
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Salvatore Pontarelli, Gian Carlo Cardarilli, A. Leandri, Marco Ottavi, Marco Re, Adelio Salsano |
A self-checking cell logic block for fault tolerant FPGAs. |
ISCAS (4) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Jimson Mathew, Elena Dubrova |
Self-Checking 1-out-of-n CMOS Current-Mode Checker. |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Cristiana Bolchini, Fabio Salice, Donatella Sciuto |
Designing Self-Checking FPGAs through Error Detection Codes. |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Bill G. Horne, Lesley R. Matheson, Casey Sheehan, Robert Endre Tarjan |
Dynamic Self-Checking Techniques for Improved Tamper Resistance. |
Digital Rights Management Workshop |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Athanasios Kakarountas, Kyriakos Papadomanolakis, Vasileios Kokkinos, Constantinos E. Goutis |
Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and Performance. |
PATMOS |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Parag K. Lala, Anup Singh, Alvernon Walker |
A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs. |
DFT |
1999 |
DBLP DOI BibTeX RDF |
DCVSL, Stuck-ON/OFF, Stuck-at Faults, Self-testing |
17 | Tassos Markas, Mark Royals, Nick Kanopoulos |
Design and DCVS implementation of a self-checking bus-monitor unit for highly reliable fault-tolerant system configurations. |
IEEE Trans. Very Large Scale Integr. Syst. |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Niraj K. Jha |
Totally self-checking checker designs for Bose-Lin, Bose, and Blaum codes. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1991 |
DBLP DOI BibTeX RDF |
|
17 | Sandip Kundu, Sudhakar M. Reddy |
Embedded Totally Self-Checking Checkers: A Practical Design. |
IEEE Des. Test Comput. |
1990 |
DBLP DOI BibTeX RDF |
|
15 | Christian Walter, Mohammad Syafrudin, Herbert Schweinzer |
A Self-Contained and Self-Checking LPS with High Accuracy. |
ISPRS Int. J. Geo Inf. |
2013 |
DBLP DOI BibTeX RDF |
|
15 | Mahmut Yilmaz, Derek Hower, Sule Ozev, Daniel J. Sorin |
Self-Checking and Self-Diagnosing 32-bit Microprocessor Multiplier. |
ITC |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Amit M. Paradkar |
Towards model-based generation of self-priming and self-checking conformance tests for interactive system. |
Inf. Softw. Technol. |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Amit M. Paradkar |
Towards Model-Based Generation of Self-Priming and Self-Checking Conformance Tests for Interactive Systems. |
SAC |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Egor S. Sogomonyan, Michael Gössel |
Self-testing and self-checking combinational circuits with weakly independent outputs. |
VTS |
1992 |
DBLP DOI BibTeX RDF |
|
15 | David A. Rennels, Hyeongil Kim |
VLSI Implementation of a Self-Checking Self-Exercising Memory System. |
FTCS |
1991 |
DBLP DOI BibTeX RDF |
|
15 | Yuval Tamir, Mike Liang, Titus Lai, Marc Tremblay |
The UCLA Mirror Processor: A Building Block for Self-Checking Self-Repring Computing Nodes. |
FTCS |
1991 |
DBLP DOI BibTeX RDF |
|
15 | Serge Noraz |
Application des circuits intégrés autotestables à la sureté de fonctionnement des systèmes. (Application of self-checking and self-testing circuits on reliable systems). |
|
1989 |
RDF |
|
15 | Eike Best, Flaviu Cristian |
Comments on "Self-Stabilizing Programs: The Fault-Tolerant Capability of Self-Checking Programs". |
IEEE Trans. Computers |
1985 |
DBLP DOI BibTeX RDF |
|
15 | Ali Mili 0001 |
Self-Stabilizing Programs: The Fault-Tolerant Capability of Self-Checking Programs. |
IEEE Trans. Computers |
1982 |
DBLP DOI BibTeX RDF |
|
14 | Matthias Jacob, Mariusz H. Jakubowski, Ramarathnam Venkatesan |
Towards integral binary execution: implementing oblivious hashing using overlapped instruction encodings. |
MM&Sec |
2007 |
DBLP DOI BibTeX RDF |
anti-disassembly, oblivious hashing, overlapped code, obfuscation, tamper-resistance, integrity checking |
14 | Brendan Hall, Kevin Driscoll 0001, Michael Paulitsch, Samar Dajani-Brown |
Ringing out Fault Tolerance. A New Ring Network for Superior Low-Cost Dependability. |
DSN |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Anzhela Yu. Matrosova, Valentina Andreeva, Yu. Sedov |
Survivable Discrete Circuits Design. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Stanislaw J. Piestrak |
Feasibility Study of Designing TSC Sequential Circuits with 100% Fault Coverage. |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Stanislaw J. Piestrak, Dimitris Bakalis, Xrysovalantis Kavousianos |
On the Design of Self-Testing Checkers for Modified Berger Codes. |
IOLTW |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Jianhui Jiang, Hongbao Shi, Yinghua Min, Xiaodong Zhao |
A Novel NMR Structure with Concurrent Error Location Capabilities. |
PRDC |
1999 |
DBLP DOI BibTeX RDF |
|
14 | Jien-Chung Lo, James C. Daly, Michael Nicolaidis |
A strongly code disjoint built-in current sensor for strongly fault-secure static CMOS realizations. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
14 | Dimane Mpoeleng, Paul D. Ezhilchelvan, Neil A. Speirs |
From Crash Tolerance to Authenticated Byzantine Tolerance: A Structured Approach, the Cost and Benefits. |
DSN |
2003 |
DBLP DOI BibTeX RDF |
Authenticated Byzantine failures, fail- signal, CORBA, group communication, self-checking, total order, State machine replication |
14 | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001 |
Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System. |
J. Electron. Test. |
2002 |
DBLP DOI BibTeX RDF |
fault simulation, safety-critical, self-checking |
14 | Cecilia Metra, Jien-Chung Lo |
Intermediacy Prediction for High Speed Berger Code Checkers. |
J. Electron. Test. |
2000 |
DBLP DOI BibTeX RDF |
self-checking circuits, checkers, Berger code |
14 | Albrecht P. Stroele, Steffen Tarnick |
Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes. |
J. Electron. Test. |
2000 |
DBLP DOI BibTeX RDF |
code checkers, code word accumulators, code word generators, embedded checkers, cyclic arithmetic codes, low-cost arithmetic codes, built-in self-test, on-line test, totally self-checking checkers |
14 | Sergio Antoy, Richard G. Hamlet |
Automatically Checking an Implementation against Its Formal Specification. |
IEEE Trans. Software Eng. |
2000 |
DBLP DOI BibTeX RDF |
Self-checking code, object-oriented software testing, formal specification, rewriting |
14 | Seongwon Kim, Mani Soma, Dilip Risbud |
An Effective Defect-Oriented BIST Architecture for High-Speed Phase-Locked Loops. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
Defect-oriented testing, Built-In Self-Test (BIST), Design for Testability, PLL, Self-Checking Circuits |
14 | Debaleena Das, Nur A. Touba |
Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes. |
J. Electron. Test. |
1999 |
DBLP DOI BibTeX RDF |
Bose-Lin codes, sequential circuits, logic synthesis, concurrent error detection, self-checking circuits |
14 | Marcelo Lubaszewski, Bernard Courtois |
A Reliable Fail-Safe System. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
reliability, built-in self-test, concurrent error detection, Self-checking, fail-safe |
14 | G. Robert Redinbo |
Generalized Algorithm-Based Fault Tolerance: Error Correction via Kalman Estimation. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
fault-tolerant linear processing, Kalman recursive filtering, mean-square error estimation, real convolutional codes, real number error correction, time-varying fault models, totally self-checking comparators, Algorithm-based fault tolerance |
14 | Michael Nicolaidis |
Fail-Safe Interfaces for VLSI: Theoretical Foundations and Implementation. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
Fail-safe circuits, totally fail-safe circuits, strongly fail-safe circuits, fail-safe comparators, fail-safe voters, self-checking circuits |
14 | Stanislaw J. Piestrak |
Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel Counters. |
J. Electron. Test. |
1998 |
DBLP DOI BibTeX RDF |
counters of 1s, m-out-of-n (m/n) codes, concurrent error detection, on-line testing, self-checking circuit, unidirectional errors, parallel counters, unordered codes, self-testing checker |
14 | C.-J. Richard Shi, Janusz A. Brzozowski |
Cluster-cover a theoretical framework for a class of VLSI-CAD optimization problems. |
ACM Trans. Design Autom. Electr. Syst. |
1998 |
DBLP DOI BibTeX RDF |
cluster-cover, logic minimizaiton, self-checking logic design, topological routing, NP-completeness, state assignment |
14 | Michael Nicolaidis, Ricardo de Oliveira Duarte |
Design of Fault-Secure Parity-Prediction Booth Multipliers. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Booth multipliers, Self-checking circuits |
14 | Cecilia Metra, Michele Favalli, Bruno Riccò |
Highly Testable and Compact 1-out-of-n Code Checker with Single Output. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
1-out-of-n code, Self-checking circuit, checker |
14 | Kazuo Kawakubo, Koji Tanaka, Hiromi Hiraishi |
Formal Verification Of Self-Testing Properties Of Combinational Circuits. |
Asian Test Symposium |
1996 |
DBLP DOI BibTeX RDF |
self-testing properties, logic function manipulation, decision function, output code words, self-checking logic, mutiple-input multiple-output circuit, fault tolerance, formal verification, combinational circuits, combinational circuits, binary decision diagrams, stuck-at faults, satisfiability problem, characteristic functions, Berger code |
14 | Vassilios V. Dimakopoulos, G. Sourtziotis, Antonis M. Paschalis, Dimitris Nikolos |
On TSC Checkers for m-out-n Codes. |
IEEE Trans. Computers |
1995 |
DBLP DOI BibTeX RDF |
MOS transistor implementation, fault tolerance, Fault detection, totally self-checking checkers, m-out-of-n code |
14 | J. Q. Wang, Parag K. Lala |
Partially Strongly Fault Secure and Partially Strongly Code Disjoint I-out-of-3 Code Checker. |
IEEE Trans. Computers |
1994 |
DBLP DOI BibTeX RDF |
strongly code disjoint, strongly fault secure, code checker, fault tolerance, logic testing, logic design, time delay, combinatorial circuits, circuit reliability, fault secure, self-checking checker |
14 | Tomislav Lovric |
Systematic and Design Diversity - Software Techniques for Hardware Fault Detection. |
EDCC |
1994 |
DBLP DOI BibTeX RDF |
design faults, operational faults, fault detection coverage, relative test, absolute test, software implemented hardware-fault injection, systematic diversity, Virtual Duplex System, self-checking, design diversity, fail-safe |
14 | G. Robert Redinbo, Leonard M. Napolitano Jr., David D. Andaleon |
Multibit Correcting Data Interface for Fault-Tolerant Systems. |
IEEE Trans. Computers |
1993 |
DBLP DOI BibTeX RDF |
multibit correcting data interface, nibble errors, uncoded data, shortened Reed-Solomon code, byte errors, binary-sized code, dual orthogonal basis, totally self-checking equality checker, ultrareliable memory module, single desktop programmable gate array, fault tolerant computing, error correction codes, processor, Reed-Solomon codes, fault-tolerant systems, logic arrays |
14 | Sy-Yen Kuo, Sheng-Chiech Liang |
Concurrent Error Detection and Correction in Real-Time Systolic Sorting Arrays. |
IEEE Trans. Computers |
1992 |
DBLP DOI BibTeX RDF |
online error correction, two level pipelining, real-time systolic sorting arrays, online error detection, VLSI sorting arrays, functional errors, data errors, real-time systems, parallel algorithms, VLSI, sorting, error correction codes, systolic arrays, error detection codes, concurrent error detection, high-throughput, self-checking, WSI, concurrent error correction |
14 | Sandeep Pagey, Sunil D. Sherlekar, G. Venkatesh 0001 |
A methodology for the design of SFS/SCD circuits for a class of unordered codes. |
J. Electron. Test. |
1991 |
DBLP DOI BibTeX RDF |
strongly fault-secure, strongly code disjoint, concurrent error detection, Self-checking circuits, unordered codes |
14 | Antonis M. Paschalis, Costas Efstathiou, Constantine Halatsis |
An Efficient TSC 1-out-of-3 Code Checker. |
IEEE Trans. Computers |
1990 |
DBLP DOI BibTeX RDF |
TSC 1-out-of-3 code checker, combinational totally self-checking, logic testing, logic design, automatic testing, integrated logic circuits |
14 | Michael Nicolaidis, Bernard Courtois |
Strongly Code Disjoint Checkers. |
IEEE Trans. Computers |
1988 |
DBLP DOI BibTeX RDF |
strongly code disjoint checkers, strongly fault secure networks, combinational system, error detection codes, combinatorial circuits, totally self-checking |
14 | Takashi Nanya, Toshiaki Kawamura |
Error/Secure/Propagating Concept and its Application to the Design of Strongly Fault-Secure Processors. |
IEEE Trans. Computers |
1988 |
DBLP DOI BibTeX RDF |
error-secure interfaces, totally self-checking systems, Intel 8080, strongly fault-secure processors, error-propagating interfaces, fault tolerant computing, computer architecture, automatic testing, microprocessor chips, digital system, computer interfaces, 8 bit |
14 | Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis |
Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. |
IEEE Trans. Computers |
1988 |
DBLP DOI BibTeX RDF |
half-adder, VLSI MOS implementation, logic design, trees, codes, codes, adders, modular design, totally self-checking checkers, full-adder |
14 | Ingrid Jansch, Bernard Courtois |
Definition and Design of Strongly Language Disjoint Checkers. |
IEEE Trans. Computers |
1988 |
DBLP DOI BibTeX RDF |
strongly language disjoint checkers, logic testing, fault location, totally self-checking, sequential systems |
14 | Bella Bose |
Burst Unidirectional Error-Detecting Codes. |
IEEE Trans. Computers |
1986 |
DBLP DOI BibTeX RDF |
Burst errors, encoder, decoder, unidirectional errors, self-checking checker |
14 | Bella Bose, Der Jei Lin |
Systematic Unidirectional Error-Detecting Codes. |
IEEE Trans. Computers |
1985 |
DBLP DOI BibTeX RDF |
encoder, decoder, Hamming distance, Unidirectional errors, self-checking checker, Asymmetric errors, symmetric errors |
14 | Eiji Fujiwara, Nobuo Mutoh, Kohji Matsuoka |
A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing. |
IEEE Trans. Computers |
1984 |
DBLP DOI BibTeX RDF |
self-verification, error-detection ability, group-parity prediction checker, self-testing, Built-in testing, duplication, self-checking checker, fault-detection ability |
14 | Bella Bose, Der Jei Lin |
PLA Implementation of k-out-of-n Code TSC Checker. |
IEEE Trans. Computers |
1984 |
DBLP DOI BibTeX RDF |
Code disjoint, k-out-of-n codes, fault detection, self-testing, totally self-checking checkers, fault secure |
14 | Hao Dong 0004 |
Modified Berger Codes for Detection of Unidirectional Errors. |
IEEE Trans. Computers |
1984 |
DBLP DOI BibTeX RDF |
self-checking circuits, unidirectional errors, Berger codes |
14 | Udi Manber |
System Diagnosis with Repair. |
IEEE Trans. Computers |
1980 |
DBLP DOI BibTeX RDF |
t/s diagnosability, Diagnosability with repair, graph model of system diagnosis, fault detection, multiple faults, digital systems, self checking |
14 | Richard M. Sedmak, Harris L. Liebergot |
Fault Tolerance of a General Purpose Computer Implemented by Very Large Scale Integration. |
IEEE Trans. Computers |
1980 |
DBLP DOI BibTeX RDF |
fault tolerance, reliability, very large scale integration (VLSI), redundancy, computer, Availability, fault detection, maintainability, fault recovery, self- checking |
14 | Dhiraj K. Pradhan |
A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications. |
IEEE Trans. Computers |
1980 |
DBLP DOI BibTeX RDF |
Coset codes, decoder logic, erasure decoding, mass memories, multiple errors, TSC checkers, error detection, error correction, transient faults, multiple faults, unidirectional errors, self-checking, shift register memories, read-only memories, random errors, two-rail checkers |
14 | Bengt E. Ossfeldt, Ingmar Jonsson |
Recovery and Diagnostics in the Central Control of the AXE Switching System. |
IEEE Trans. Computers |
1980 |
DBLP DOI BibTeX RDF |
Concurrent diagnosis diagnostic programs, diagnostics performance evaluation, maintenance software, physical fault insertion, fault-tolerant computing, maintainability, self checking, intermittent fault |
14 | John J. Shedletsky |
Error Correction by Alternate-Data Retry. |
IEEE Trans. Computers |
1978 |
DBLP DOI BibTeX RDF |
Alternate-data retry (ADR), fault neutralization, morphic circuits, availability, error correction, self-checking, recoverable |
14 | Dennis A. Reynolds, Gernot Metze |
Fault Detection Capabilities of Alternating Logic. |
IEEE Trans. Computers |
1978 |
DBLP DOI BibTeX RDF |
Alternating logic, alternating systems, on-line detection, synchronous machine, stuck-at-faults, combinational network, time redundancy, single fault, totally self-checking |
14 | Shunichi Toida |
System Diagnosis and Redundant Tests. |
IEEE Trans. Computers |
1976 |
DBLP DOI BibTeX RDF |
redundant tests, test connections, Fault diagnosis, self-checking |
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