Search results for "DSPs"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
21	Rudy Lauwereins, Marleen Adé, Stefaan Note	Real-time emulation of DSP applications on programmable DSPs and FPGAs.	ICECS	1996	DBLP DOI BibTeX RDF
21	Rainer Leupers, Peter Marwedel	Instruction selection for embedded DSPs with complex instructions.	EURO-DAC	1996	DBLP DOI BibTeX RDF
21	Inés del Campo, José Manuel Tarela	A CAD tool to implement real-time fuzzy controllers on DSPs.	RTS	1995	DBLP DOI BibTeX RDF
21	H. John Reekie, John M. Potter	Generating efficient loop code for programmable DSPs.	ICASSP (2)	1994	DBLP DOI BibTeX RDF
21	David A. Jaffe, Julius O. Smith III	Real Time Sound Processing and Synthesis on Multiple DSPs Using the Music Kit and the Ariel Quint Processor.	ICMC	1993	DBLP BibTeX RDF
21	K. Fazekas	Parallel Processing Architecture for Subband Coding Using DSPs.	Eur. Trans. Telecommun.	1992	DBLP DOI BibTeX RDF
21	Ichiro Kuroda, Takao Nishitani	Asynchronous multirate system design for programmable DSPs.	ICASSP	1992	DBLP DOI BibTeX RDF
21	Jaime Moreno 0004, Mario Medina	Matrix computations in arrays of DSPs.	ASAP	1992	DBLP DOI BibTeX RDF
21	Jacob Levison, Ichiro Kuroda, Takao Nishitani	A reconfigurable processor array with routing LSIs and general purpose DSPs.	ASAP	1992	DBLP DOI BibTeX RDF
21	A. J. Anderson	A performance evaluation of microprocessors, DSPs and the transputer for recursive parameter estimation.	Microprocess. Microsystems	1991	DBLP DOI BibTeX RDF
21	Henry Davis, Robert Fine, Denis Regimbal	Merging data converters and DSPs for mixed-signal processors.	IEEE Micro	1990	DBLP DOI BibTeX RDF
21	Edward A. Lee	Programmable DSPs: a brief overview.	IEEE Micro	1990	DBLP DOI BibTeX RDF
21	Makoto Mizukami	Head Positioning Control Using DSPs.	J. Robotics Mechatronics	1990	DBLP DOI BibTeX RDF
21	W. G. Marshall, D. W. Hoare, A. P. Clark	Using DSPs to synchronize a digital satellite modem.	Microprocess. Microsystems	1990	DBLP DOI BibTeX RDF
21	David A. Jaffe	Efficient Dynamic Resource Management on Multiple DSPs as Implemented in the NeXT Music Kit.	ICMC	1990	DBLP BibTeX RDF
21	Luí de Sá, Jorge Dias 0001, Vítor Silva 0001	Image processing system with multiple DSPs.	Microprocess. Microprogramming	1989	DBLP DOI BibTeX RDF
21	Mark B. Sandler, L. Hayat, L. Costa, A. A. Naqvi	A comparative evaluation of DSPs, microprocessors and the transputer for image processing.	ICASSP	1989	DBLP DOI BibTeX RDF
21	John Hartung, Steven L. Gay, Stephen G. Haigh	A practical C language compiler/optimizer for real-time implementations on a family of floating point DSPs.	ICASSP	1988	DBLP DOI BibTeX RDF
11	Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito 0001	On the exploitation of loop-level parallelism in embedded applications.	ACM Trans. Embed. Comput. Syst.	2009	DBLP DOI BibTeX RDF	multithreading, Multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops, system-on-chip (Soc)
11	Rogier Baert, Carolina Blanch, Paul Coene, Maja D'Hondt, Zhe Ma, Roel Wuyts	The future is dynamic: adaptive runtime resource management for heterogeneous computer platforms.	OOPSLA Companion	2009	DBLP DOI BibTeX RDF	embedded software engineering, runtime resource management, heterogeneous devices
11	Rogier Baert, Carolina Blanch, Paul Coene, Maja D'Hondt, Zhe Ma, Roel Wuyts	The future is dynamic: adaptive runtime resource management for heterogeneous computer platforms.	OOPSLA Companion	2009	DBLP DOI BibTeX RDF	embedded software engineering, runtime resource management, heterogeneous devices
11	Jinwoo Song, Kee Beom Kim, Yong Ho Song, Ki-Seok Chung	Implementation of IEEE802.11a software defined receiver on chip multi-processor architecture using OpenMP.	ICHIT	2009	DBLP DOI BibTeX RDF	802.11a, GPP, multi-core, OpenMP, SDR
11	Rimma V. Nehme, Hyo-Sang Lim, Elisa Bertino, Elke A. Rundensteiner	StreamShield: a stream-centric approach towards security and privacy in data stream environments.	SIGMOD Conference	2009	DBLP DOI BibTeX RDF	security punctuations, access control, data streams
11	Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr	TotalProf: a fast and accurate retargetable source code profiler.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	source code profiling, architecture description language, performance estimation, instruction set simulation
11	Hyunh Van Luong, Sangjin Cho, Jong-Myon Kim, Uipil Chong	Real-Time Sound Synthesis of Plucked String Instruments Using a Data Parallel Architecture.	ICIC (1)	2009	DBLP DOI BibTeX RDF	Music synthesis, Plucked-string instrument, Data parallel architectures, Parallel processing, Physical modeling
11	Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu	Energy-aware probabilistic multiplier: design and analysis.	CASES	2009	DBLP DOI BibTeX RDF	optimization, multiplier, voltage scaling, probabilistic computation
11	Muhammad Usman Karim Khan, Abdul Bais, Yahya M. Khawaja, Ghulam M. Hassan, Rizwana Arshad	A Swift and Memory Efficient Hough Transform for Systems with Limited Fast Memory.	ICIAR	2009	DBLP DOI BibTeX RDF
11	Jason C. Chen, Shao-Yi Chien	CRISP: Coarse-Grained Reconfigurable Image Stream Processor for Digital Still Cameras and Camcorders.	IEEE Trans. Circuits Syst. Video Technol.	2008	DBLP DOI BibTeX RDF
11	Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev	A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	hardware space exploration, embedded system design, Multiprocessor system-on-chip, real time analysis, electrocardiogram algorithms
11	Bjorn De Sutter, Paul Coene, Tom Vander Aa, Bingfeng Mei	Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays.	LCTES	2008	DBLP DOI BibTeX RDF	register allocation, placement and routing, coarse-grained, reconfigurable arrays
11	N. Alaraje, Guy Hembroff	Impact of NoFPGA IP router architecture on link bandwidth.	EIT	2008	DBLP DOI BibTeX RDF
11	Taneem Ahmed, Paul D. Kundarewich, Jason Helge Anderson, Brad L. Taylor, Rajat Aggarwal	Architecture-specific packing for virtex-5 FPGAs.	FPGA	2008	DBLP DOI BibTeX RDF	optimization, performance, FPGAs, field-programmable gate arrays, power, placement, packing
11	Akash Kumar 0001, Kees van Berkel 0001	Vectorization of Reed Solomon Decoding and Mapping on the EVP.	DATE	2008	DBLP DOI BibTeX RDF
11	Min Li 0001, Bruno Bougard, Eduardo Lopez-Estraviz, André Bourdoux, David Novo, Liesbet Van der Perre, Francky Catthoor	Selective Spanning with Fast Enumeration: A Near Maximum-Likelihood MIMO Detector Designed for Parallel Programmable Baseband Architectures.	ICC	2008	DBLP DOI BibTeX RDF
11	Weijun Zhang, Yujie Dun, Weixiang Shi, Baogang Miao, Bingo Zhang	High Productivity Computing System Based on FPGA and Its Application on Plasma Simulation.	HPCC	2008	DBLP DOI BibTeX RDF
11	Xiaoyan Jia, Jie Guo 0007, Gerhard P. Fettweis	Integrated code generation by using fuzzy control system.	SCOPES	2008	DBLP DOI BibTeX RDF
11	Alastair Colin Murray, Björn Franke	Fast source-level data assignment to dual memory banks.	SCOPES	2008	DBLP DOI BibTeX RDF
11	Immacolata Colacicco, Giacomo Marchiori, Raffaele Tripiccione	The hardware application platform of the hartes project.	FPL	2008	DBLP DOI BibTeX RDF
11	Yijun Liu, Banghai Wang, Guobo Xie, Pinghua Chen, Zhenkun Li	Designing a Multi-Processor Education Board for High-Performance Embedded Processing.	ICYCS	2008	DBLP DOI BibTeX RDF
11	Constantin Paleologu, Felix Albu, Andrei Alexandru Enescu, Silviu Ciochina	Square-Root-Free QRD-LSL Adaptive Algorithm with Improved Numerical Robustness.	ICN	2008	DBLP DOI BibTeX RDF	QR-decomposition-based least-squares lattice (QRD-LSL), Adaptive filters, logarithmic number system (LNS), fixed-point arithmetic
11	Hassan A. Salamy, J. Ramanujam	Optimal address register allocation for arrays in DSP applications.	ESTIMedia	2008	DBLP DOI BibTeX RDF
11	Hassan A. Salamy, J. Ramanujam	Storage optimization through code size reduction for digital signal processors.	ESTIMedia	2008	DBLP DOI BibTeX RDF
11	Xiaohui Gu, Spiros Papadimitriou, Philip S. Yu, Shu-Ping Chang	Toward Predictive Failure Management for Distributed Stream Processing Systems.	ICDCS	2008	DBLP DOI BibTeX RDF
11	Li Zhang, Shuangfei Li, Zan Yin, Wenyuan Zhao	A Research on an ASIP Processing Element Architecture Suitable for FPGA Implementation.	CSSE (3)	2008	DBLP DOI BibTeX RDF
11	Enrique Alba 0001, Davide Anguita, Alessandro Ghio, Sandro Ridella	Using Variable Neighborhood Search to improve the Support Vector Machine performance in embedded automotive applications.	IJCNN	2008	DBLP DOI BibTeX RDF
11	Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov	Protecting bus-based hardware IP by secret sharing.	DAC	2008	DBLP DOI BibTeX RDF	cryptography, manufacturing, integrated circuits, computer crime
11	Anton A. Krasnobaev, Alexandr K. Platonov	A method for synthesis of specialized architectures of technical vision systems.	WISES	2008	DBLP DOI BibTeX RDF
11	Wei Han 0001, Ying Yi, Mark Muir, Ioannis Nousias, Tughrul Arslan, Ahmet Teyfik Erdogan	Efficient Implementation of Wireless Applications on Multi-core Platforms Based on Dynamically Reconfigurable Processors.	CISIS	2008	DBLP DOI BibTeX RDF
11	Ming-che Lai, Jianjun Guo, Zhuxi Zhang, Zhiying Wang	Using an Automated Approach to Explore and Design a High-Efficiency Processor Element for the Multimedia Domain.	CISIS	2008	DBLP DOI BibTeX RDF
11	Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson	Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology.	Trans. High Perform. Embed. Archit. Compil.	2007	DBLP DOI BibTeX RDF	HW/SW, hardware space exploration, embedded system design, Multiprocessor System-on-Chip, real-time analysis, electrocardiogram algorithms
11	Oscal T.-C. Chen, Li-Hsun Chen, Nai-Wei Lin, Chih-Chang Chen	Application-Specific Data Path for Highly Efficient Computation of Multistandard Video Codecs.	IEEE Trans. Circuits Syst. Video Technol.	2007	DBLP DOI BibTeX RDF
11	Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere	Classifying interprocess communication in process network representation of nested-loop programs.	ACM Trans. Embed. Comput. Syst.	2007	DBLP DOI BibTeX RDF	hybrid classification approach, matrix manipulations, Static analysis, integer linear programming
11	Fan-Min Li, An-Yeu Wu	On the New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold.	IEEE Trans. Signal Process.	2007	DBLP DOI BibTeX RDF
11	Nainesh Agarwal, Nikitas J. Dimopoulos	DSPstone Benchmark of CoDeL's Automated Clock Gating Platform.	ISVLSI	2007	DBLP DOI BibTeX RDF
11	Ahmed Amine Jerraya	HW/SW implementation from abstract architecture models.	DATE	2007	DBLP DOI BibTeX RDF
11	Chih-Lyang Hwang, Chin-Yan Shih, Ching-Chang Wong	Distributed Active-Vision Network-Space Approach for Trajectory Tracking and Obstacle Avoidance of a Car-Like Mobile Robot.	FUZZ-IEEE	2007	DBLP DOI BibTeX RDF
11	Maurizio Paganini	Nomadik®: A Mobile Multimedia Application Processor Platform.	ASP-DAC	2007	DBLP DOI BibTeX RDF	mobile multimedia application processor platform, Nomadik platform, industry standard host processor, low-power DSP, hardware accelerators
11	Subhomoy Chattopadhyay	Low power design techniques for nanometer design processes: 65 nm and smaller.	SBCCI	2007	DBLP DOI BibTeX RDF	65 nm, low power, embedded design
11	Hanno Scharwächter, Jonghee M. Youn, Rainer Leupers, Yunheung Paek, Gerd Ascheid, Heinrich Meyr	A code-generator generator for multi-output instructions.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	ISS, code-selection, compiler/architecture co-design, ASIP
11	Nan Wu 0003, Qianming Yang, Mei Wen, Yi He 0008, Changqing Xun, Chunyuan Zhang	A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
11	Radomir S. Stankovic, Jaakko Astola	A Note on Possible Applications of Fourier Representations in Circuit Design over Reprogrammable Technological Platforms.	ISMVL	2007	DBLP DOI BibTeX RDF
11	Zhenmin Li, Taewhan Kim	Address Code Optimization Exploiting Code Scheduling in DSP Applications.	ISCAS	2007	DBLP DOI BibTeX RDF
11	Gianmarco Girau, Andrea Tomatis, Fabio Dovis, Paolo Mulassano	Efficient Software Defined Radio Implementations of GNSS Receivers.	ISCAS	2007	DBLP DOI BibTeX RDF
11	Suman Mamidi, Michael J. Schulte, Daniel Iancu, C. John Glossner	Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems.	ASAP	2007	DBLP DOI BibTeX RDF
11	Hai-Wei Wang, David W. Lin, Kun-Chien Hung, Youn-Tai Lee	Design and DSP Software Implementation of Mobile WiMAX Baseband Transceiver Functions.	EUC Workshops	2007	DBLP DOI BibTeX RDF	digital signal processor (DSP) software implementation, bit-interleaved coded modulation, synchronization, WiMAX, orthogonal frequency-division multiple access (OFDMA), Channel estimation, IEEE 802.16e
11	Roger D. Chamberlain, Mark A. Franklin, Eric J. Tyson, Jeremy Buhler, Saurabh Gayen, Patrick Crowley, James H. Buckley	Application development on hybrid systems.	SC	2007	DBLP DOI BibTeX RDF	gamma ray astronomy, performance modeling, hybrid systems, hardware/software co-design
11	Subhomoy Chattopadhyay, Rakesh Patel	Tutorial T3: Low Power Design Techniques for Nanometer Design Processes - 65nm and Smaller.	VLSI Design	2007	DBLP DOI BibTeX RDF
11	Johnny Huynh, José Nelson Amaral, Paul Berube, Sid Ahmed Ali Touati	Evaluation of Offset Assignment Heuristics.	HiPEAC	2007	DBLP DOI BibTeX RDF
11	David W. Currie, Xiushan Feng, Masahiro Fujita, Alan J. Hu, Mark Kwan, Sreeranga P. Rajan	Embedded Software Verification Using Symbolic Execution and Uninterpreted Functions.	Int. J. Parallel Program.	2006	DBLP DOI BibTeX RDF	Formal verification, DSP, embedded software, VLIW
11	Derek Messie, Mina Jung, Jae C. Oh, Shweta Shetty, Steven Nordstrom, Michael Haney	Prototype of fault adaptive embedded software for large-scale real-time systems.	Artif. Intell. Rev.	2006	DBLP DOI BibTeX RDF	Large-scale real-time systems, Multi-agent systems, Embedded systems, Subsumption architecture
11	Xiaotong Zhuang, Santosh Pande	Parallelizing load/stores on dual-bank memory embedded processors.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	memory bank allocation, parallel load/stores, profile driven optimization, DSP architectures
11	Bastian Ristau, Gerhard P. Fettweis	An Optimization Methodology for Memory Allocation and Task Scheduling in SoCs Via Linear Programming.	SAMOS	2006	DBLP DOI BibTeX RDF
11	Dorit Nuzman, Richard Henderson	Multi-platform Auto-vectorization.	CGO	2006	DBLP DOI BibTeX RDF
11	Sung Dae Kim, Jeong Hoo Lee, Chung Jin Hyun, Myung Hoon Sunwoo	ASIP approach for implementation of H.264/AVC.	ASP-DAC	2006	DBLP DOI BibTeX RDF
11	Kwang Woo Lee, Sung Dae Kim, Myung Hoon Sunwoo	VSIP : Video Specific Instruction Set Processor for H.264/AVC.	SiPS	2006	DBLP DOI BibTeX RDF
11	Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito 0001	Challenges in exploitation of loop parallelism in embedded applications.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	multithreading, multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops
11	Dong Wang, Xiao Hu, Shuming Chen, Yang Guo	Bandwidth Optimization of the EMCI for a High Performance 32-bit DSP.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF
11	Ming-che Lai, Kui Dai, Lu Hong-yi, Zhiying Wang 0003	A Novel Data-Parallel Coprocessor for Multimedia Signal Processing.	ICME	2006	DBLP DOI BibTeX RDF
11	Hank G. Dietz, Bill Dieter, Randy Fisher, Kungyen Chang	Floating-Point Computation with Just Enough Accuracy.	International Conference on Computational Science (1)	2006	DBLP DOI BibTeX RDF
11	Heiko Falk, Jens Wagner, André Schaefer	Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization.	ESTIMedia	2006	DBLP DOI BibTeX RDF
11	Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson	MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	hardware space exploration, multiprocessor system-on-chip, real-time analysis, electrocardiogram algorithms
11	Hassan A. Salamy, J. Ramanujam	An Effective Heuristic for Simple Offset Assignment with Variable Coalescing.	LCPC	2006	DBLP DOI BibTeX RDF
11	Jason C. Chen, Chun-Fu Shen, Shao-Yi Chien	CRISP: coarse-grain reconfigurable image signal processor for digital still cameras.	ISCAS	2006	DBLP DOI BibTeX RDF
11	Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi	A Large Scale Adaptable Multiplier for Cryptographic Applications.	AHS	2006	DBLP DOI BibTeX RDF
11	Jeonghun Cho, Yunheung Paek	Run-Time Memory Optimization for DDMB Architecture Through a CCB Algorithm.	EUC Workshops	2006	DBLP DOI BibTeX RDF	dual data memory banks, compiler and on-chip memory, DSP, Run-time environment
11	Zheng Shen, Hu He 0001, Yanjun Zhang, Yihe Sun	VS-ISA: A Video Specific Instruction Set Architecture for ASIP Design.	IIH-MSP	2006	DBLP DOI BibTeX RDF
11	Alok Kumar Pani, Ratnam V. Raja Kumar	Optimized VLIW Architecture for Non-zero IF QAM-Modem Implementations.	VLSI Design	2006	DBLP DOI BibTeX RDF
11	Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev	A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration.	DAC	2006	DBLP DOI BibTeX RDF	hardware space exploration, embedded system design, multiprocessor system-on-chip, real-time analysis, electrocardiogram algorithms
11	José-Alejandro Piñeiro, Stuart F. Oberman, Jean-Michel Muller, Javier D. Bruguera	High-Speed Function Approximation Using a Minimax Quadratic Interpolator.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Table-based methods, minimax polynomial approximation, single-precision computations, computer arithmetic, square root, reciprocal, elementary functions
11	Jarno K. Tanskanen, Reiner Creutzburg, Jarkko Niittylahti	On Design of Parallel Memory Access Schemes for Video Coding.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	parallel memory access, SIMD memory architecture, video coding, MPEG-4, H.263, subword parallelism, conflict-free access, storage scheme, skewing scheme, data alignment
11	Holger Blume, H. T. Feldkämper, Tobias G. Noll	Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	heterogeneous systems on chip, partitioning and mapping, reconfigurable platforms, design space exploration, cost models
11	S. S. Yedlapalli	Transforming Real Linear Prediction Coefficients to Line Spectral Representations With a Real FFT.	IEEE Trans. Speech Audio Process.	2005	DBLP DOI BibTeX RDF
11	Derek Messie, Mina Jung, Jae C. Oh, Shweta Shetty, Steven Nordstrom, Michael Haney	Prototype of Fault Adaptive Embedded Software for Large-Scale Real-Time Systems.	ECBS	2005	DBLP DOI BibTeX RDF
11	Mustafa Aktan, Günhan Dündar	Design of Digital Filters for Low Power Applications Using Integer Quadratic Programming.	PATMOS	2005	DBLP DOI BibTeX RDF
11	Arne Schulz, Wolfgang Nebel	Optimization of Digital Audio Processing Algorithms Suitable for Hearing Aids.	PATMOS	2005	DBLP DOI BibTeX RDF
11	Barry Vercoe	Singing with Your Mobile: From DSP Arrays to Low-Cost Low-Power Chip Sets.	INTETAIN	2005	DBLP DOI BibTeX RDF
11	Sean Leventhal, Lin Yuan, Neal K. Bambha, Shuvra S. Bhattacharyya, Gang Qu 0001	DSP Address Optimization Using Evolutionary Algorithms.	SCOPES	2005	DBLP DOI BibTeX RDF
11	Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat	Division by Constant for the ST100 DSP Microprocessor.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
11	Michael Bramberger, Markus Quaritsch, Thomas Winkler 0002, Bernhard Rinner, Helmut Schwabach	Integrating multi-camera tracking into a dynamic task allocation system for smart cameras.	AVSS	2005	DBLP DOI BibTeX RDF
11	Xiushan Feng, Alan J. Hu	Cutpoints for formal equivalence verification of embedded software.	EMSOFT	2005	DBLP DOI BibTeX RDF	formal verification, embedded software, equivalence checking