Search results for "Itanium"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
12	Howard Chen 0002, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Yew	Continuous Adaptive Object-Code Re-optimization Framework.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
12	Qingda Lu, Jiesheng Wu, Dhabaleswar K. Panda 0001, P. Sadayappan	Applying MPI Derived Datatypes to the NAS Benchmarks: A Case Study.	ICPP Workshops	2004	DBLP DOI BibTeX RDF
12	Kristof Beyls, Erik H. D'Hollander	Platform-Independent Cache Optimization by Pinpointing Low-Locality Reuse.	International Conference on Computational Science	2004	DBLP DOI BibTeX RDF
12	Miroslav N. Velev	Efficient formal verification of pipelined processors with instruction queues.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	logic of equality, positive equality, decomposition, SAT
12	Yung-Chang Chiu, Ce-Kuen Shieh, Jing-Xin Wang, Alvin Wen-Yu Su, Tyng-Yeu Liang	A Real Time MPEG-4 Parallel Encoder on Software Distributed Shared Memory Systems.	ISPA	2004	DBLP DOI BibTeX RDF
12	Ghassan Chehaibar	Integrating Formal Verification with Mur ? of Distributed Cache Coherence Protocols in FAME Multiprocessor System Design.	FORTE	2004	DBLP DOI BibTeX RDF
12	Oscar R. Hernandez, Chunhua Liao, Barbara M. Chapman	Dragon: A Static and Dynamic Tool for OpenMP.	WOMPAT	2004	DBLP DOI BibTeX RDF
12	Christophe Lemuet, William Jalby, Sid Ahmed Ali Touati	Improving Load/Store Queues Usage in Scientific Computing.	ICPP	2004	DBLP DOI BibTeX RDF
12	Bryan Roger Buck, Jeffrey K. Hollingsworth	Data Centric Cache Measurement on the Intel ltanium 2 Processor.	SC	2004	DBLP DOI BibTeX RDF
12	Bill Greene	Agile Methods Applied to Embedded Firmware Development.	Agile Development Conference	2004	DBLP DOI BibTeX RDF
12	Rodric M. Rabbah, Hariharan Sandanagobalane, Mongkol Ekpanyapong, Weng-Fai Wong	Compiler orchestrated prefetching via speculation and predication.	ASPLOS	2004	DBLP DOI BibTeX RDF	prefetching, speculation, precomputation, predicated execution
12	John Harrison 0001	Formal Verification of Square Root Algorithms.	Formal Methods Syst. Des.	2003	DBLP DOI BibTeX RDF	formal verification, floating-point arithmetic, automated theorem proving
12	Rodric M. Rabbah, Krishna V. Palem	Data remapping for design space optimization of embedded memory systems.	ACM Trans. Embed. Comput. Syst.	2003	DBLP DOI BibTeX RDF	data remapping, embedded systems, caches, memory hierarchy, Design space exploration, compiler optimization, memory subsystem
12	Dong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, Roy Dz-Ching Ju	Efficient Resource Management during Instruction Scheduling for the EPIC Architecture.	IEEE PACT	2003	DBLP DOI BibTeX RDF
12	Jiwei Lu, Howard Chen 0002, Rao Fu, Wei-Chung Hsu, Bobbie Othmer, Pen-Chung Yew, Dong-yuan Chen	The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System.	MICRO	2003	DBLP DOI BibTeX RDF	Linux, Intel
12	Spyridon Triantafyllis, Manish Vachharajani, Neil Vachharajani, David I. August	Compiler Optimization-Space Exploration.	CGO	2003	DBLP DOI BibTeX RDF
12	Howard Chen 0002, Wei-Chung Hsu, Dong-yuan Chen	Dynamic Trace Selection Using Performance Monitoring Hardware Sampling.	CGO	2003	DBLP DOI BibTeX RDF
12	Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani	Integrated Prepass Scheduling for a Java Just-In-Time Compiler on the IA-64 Architecture.	CGO	2003	DBLP DOI BibTeX RDF
12	Yang Liu, Zhaoqing Zhang, Ruliang Qiao, Roy Dz-Ching Ju	A Region-Based Compilation Infrastructure.	Interaction between Compilers and Computer Architectures	2003	DBLP DOI BibTeX RDF	Single-Entry-Multiple-Exit (SEME) Region, Multiple-Entry-Multiple-Exit (MEME) Region and Compiler Optimization, Region, Interval
12	Won So, Alexander G. Dean	Procedure Cloning and Integration for Converting Parallelism from Coarse to Fine Grain.	Interaction between Compilers and Computer Architectures	2003	DBLP DOI BibTeX RDF
12	Youfeng Wu, Li-Ling Chen, Roy Ju, Jesse Fang	Performance potentials of compiler-directed data speculation.	ISPASS	2003	DBLP DOI BibTeX RDF
12	Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González 0001, Per Hammarlund, Hong Wang 0003, John Paul Shen	A framework for modeling and optimization of prescient instruction prefetch.	SIGMETRICS	2003	DBLP DOI BibTeX RDF	optimization, multithreading, analytical modeling, path expressions, helper threads, instruction prefetch
12	Makoto Kudo, Hisayasu Kuroda, Yasumasa Kanada	Parallel Blocked Sparse Matrix-Vector Multiplication with Dynamic Parameter Selection Method.	International Conference on Computational Science	2003	DBLP DOI BibTeX RDF
12	Hongbo Yang, Ramaswamy Govindarajan, Guang R. Gao, Ziang Hu	Compiler-Assisted Cache Replacement: Problem Formulation and Performance Evaluation.	LCPC	2003	DBLP DOI BibTeX RDF
12	Cristian Coarfa, Yuri Dotsenko, Jason Eckhardt, John M. Mellor-Crummey	Co-array Fortran Performance and Potential: An NPB Experimental Study.	LCPC	2003	DBLP DOI BibTeX RDF
12	Noah Snavely, Saumya K. Debray, Gregory R. Andrews	Unspeculation.	ASE	2003	DBLP DOI BibTeX RDF
12	Daisuke Takahashi, Mitsuhisa Sato, Taisuke Boku	An OpenMP Implementation of Parallel FFT and Its Performance on IA-64 Processors.	WOMPAT	2003	DBLP DOI BibTeX RDF
12	Rahul Bhatt, Dave LaFollette, Arjun Kapur	The Fallacy of Spec-Based Design.	SEFM	2003	DBLP DOI BibTeX RDF
12	Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani	Eliminating Exception Constraints of Java Programs for IA-64.	IEEE PACT	2002	DBLP DOI BibTeX RDF
12	Prosenjit Chatterjee, Hemanthkumar Sivaraj, Ganesh Gopalakrishnan	Shared Memory Consistency Protocol Verification Against Weak Memory Models: Refinement via Model-Checking.	CAV	2002	DBLP DOI BibTeX RDF
12	Youfeng Wu, Mauricio J. Serrano, Rakesh Krishnaiyer, Wei Li 0015, Jesse Fang	Value-Profile Guided Stride Prefetching for Irregular Code.	CC	2002	DBLP DOI BibTeX RDF
12	Kristof Beyls, Erik H. D'Hollander	Reuse Distance-Based Cache Hint Selection.	Euro-Par	2002	DBLP DOI BibTeX RDF
12	Shih-Wei Liao, Perry H. Wang, Hong Wang 0003, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery	Post-Pass Binary Adaptation for Software-Based Speculative Precomputation.	PLDI	2002	DBLP DOI BibTeX RDF	chaining speculative precomputation, dependence reduction, long-range thread-based prefetching, loop rotation, post-pass, scheduling, prediction, slicing, speculation, triggering, pointer, slack, delay minimization
12	Prosenjit Chatterjee, Ganesh Gopalakrishnan	A Specification and Verification Framework for Developing Weak Shared Memory Consistency Protocols.	FMCAD	2002	DBLP DOI BibTeX RDF
12	Praveen Parvathala, Kaila Maneparambil, William Lindsay	FRITS - A Microprocessor Functional BIST Method.	ITC	2002	DBLP DOI BibTeX RDF
12	David M. Harris, Sam Naffziger	Statistical clock skew modeling with data delay variations.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
12	Gautam Doshi, Rakesh Krishnaiyer, Kalyan Muthukumar	Optimizing Software Data Prefetches with Rotating Registers.	IEEE PACT	2001	DBLP DOI BibTeX RDF
12	Perry H. Wang, Hong Wang 0003, Ralph-Michael Kling, Kalpana Ramakrishnan, John Paul Shen	Register Renaming and Scheduling for Dynamic Execution of Predicated Code.	HPCA	2001	DBLP DOI BibTeX RDF
12	Kanna Shimizu, David L. Dill, Ching-Tsun Chou	A Specification Methodology by a Collection of Compact Properties as Applied to the Intel® ItaniumTM Processor Bus Protocol.	CHARME	2001	DBLP DOI BibTeX RDF
12	Jamison D. Collins, Hong Wang 0003, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen	Speculative precomputation: long-range prefetching of delinquent loads.	ISCA	2001	DBLP DOI BibTeX RDF	Systems Application Architecture
12	Eric Dahlen, Jennifer Gustin, Susan Meredith, Doug Moran	The 82460GX Sever/Workstation Chip Set.	IEEE Micro	2000	DBLP DOI BibTeX RDF
12	Monica S. Lam	Software pipelining: an effective scheduling technique for VLIW machines (with retrospective)	Best of PLDI	1988	DBLP DOI BibTeX RDF