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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 174 occurrences of 109 keywords
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Results
Found 433 publication records. Showing 424 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
19 | Marko S. Andjelkovic, Milos Krstic, Rolf Kraemer, Varadan Savulimedu Veeravalli, Andreas Steininger |
A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 26th IEEE Asian Test Symposium, ATS 2017, Taipei City, Taiwan, November 27-30, 2017, pp. 82-87, 2017, IEEE Computer Society, 978-1-5386-2437-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Lingkan Gong, Alexander Kroh, Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel |
Reliable SEU monitoring and recovery using a programmable configuration controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017, pp. 1-6, 2017, IEEE, 978-9-0903-0428-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Ghaith Kazma, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria |
Analysis of SEU propagation in sequential circuits at RTL using Satisfiability Modulo Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 15th IEEE International New Circuits and Systems Conference, NEWCAS 2017, Strasbourg, France, June 25-28, 2017, pp. 237-240, 2017, IEEE, 978-1-5090-4991-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Marko S. Andjelkovic, Milos Krstic, Rolf Kraemer |
Assessment of the amplitude-duration criterion for SET/SEU robustness evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, Thessaloniki, Greece, July 3-5, 2017, pp. 9-12, 2017, IEEE, 978-1-5386-0352-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Holger Michel, Hipólito Guzmán-Miranda, Alexander Dörflinger, Harald Michalik, Miguel Aguirre Aguirre Echánove |
SEU fault classification by fault injection for an FPGA in the space instrument SOPHI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: 2017 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2017, Pasadena, CA, USA, July 24-27, 2017, pp. 9-15, 2017, IEEE, 978-1-5386-3439-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Israel C. Lopes, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin |
SEU susceptibility analysis of a feedforward neural network implemented in a SRAM-based FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 18th IEEE Latin American Test Symposium, LATS 2017, Bogotá, Colombia, March 13-15, 2017, pp. 1-6, 2017, IEEE, 978-1-5386-0415-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Thierry Bonnoit, Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco |
SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 18th IEEE Latin American Test Symposium, LATS 2017, Bogotá, Colombia, March 13-15, 2017, pp. 1-4, 2017, IEEE, 978-1-5386-0415-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Ghaith Kazma, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria |
Analysis of SEU Propagation in Combinational Circuits at RTL Based on Satisfiability Modulo Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the on Great Lakes Symposium on VLSI 2017, Banff, AB, Canada, May 10-12, 2017, pp. 239-244, 2017, ACM, 978-1-4503-4972-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Ahmed S. Sajit, Michael A. Turi |
SEU tolerance of FinFET 6T SRAM, 8T SRAM and DICE memory cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCWC ![In: IEEE 7th Annual Computing and Communication Workshop and Conference, CCWC 2017, Las Vegas, NV, USA, January 9-11, 2017, pp. 1-5, 2017, IEEE, 978-1-5090-4228-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Ligia Eliana Setenareski |
Fiscalização da neutralidade da rede e seu impacto na evolução da internet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2017 |
RDF |
|
19 | Pilin Junsangsri, Jie Han 0001, Fabrizio Lombardi |
Design of a hybrid non-volatile SRAM cell for concurrent SEU detection and correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 52, pp. 156-167, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Wei Wei 0034, Kazuteru Namba, Yong-Bin Kim, Fabrizio Lombardi |
A Novel Scheme for Tolerating Single Event/Multiple Bit Upsets (SEU/MBU) in Non-Volatile Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 65(3), pp. 781-790, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Qingyu Chen, Haibin Wang, Li Chen 0001, Lixiang Li 0001, Xing Zhao, Rui Liu 0011, Mo Chen, Xuantian Li |
An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 32(3), pp. 385-391, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco |
Towards an efficient SEU effects emulation on SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 66, pp. 173-182, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Chung Tah Chua, Hock Guan Ong, Kevin Sanchez, Philippe Perdu, Chee Lip Gan |
Effects of voltage stress on the single event upset (SEU) response of 65 nm flip flop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 64, pp. 199-203, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xuejun Li |
An SEU resilient, SET filterable and cost effective latch in presence of PVT variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 63, pp. 239-250, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro |
Combined SEU and SEFI Protection for Memories Using Orthogonal Latin Square Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11), pp. 1933-1943, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Saqib A. Khan, Shi-Jie Wen, Sanghyeon Baeg |
Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 13(17), pp. 20160627, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Saqib A. Khan, Shi-Jie Wen, Sanghyeon Baeg |
Erratum: Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation [IEICE Electronics Express Vol. 13 (2016) No. 17 pp. 20160627]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 13(19), pp. 20168001, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Tomas Vanat, Filip Krizek, Jozef Ferencei, Hana Kubátová |
Comparing proton and neutron induced SEU cross section in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Kosice, Slovakia, April 20-22, 2016, pp. 214-217, 2016, IEEE, 978-1-5090-2467-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Michael J. Wirthlin, Andrew M. Keller, Chase McCloskey, Parker Ridd, David S. Lee, Jeffrey Draper |
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 21-23, 2016, pp. 205-214, 2016, ACM, 978-1-4503-3856-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Michail S. Vavouras, Christos-Savvas Bouganis |
Area-driven partial reconfiguration for SEU mitigation on SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: International Conference on ReConFigurable Computing and FPGAs, ReConFig 2016, Cancun, Mexico, November 30 - Dec. 2, 2016, pp. 1-6, 2016, IEEE, 978-1-5090-3707-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Afef Kchaou, W. El Hadj Youssef, Rached Tourki, Fraidy Bouesse, Pablo Ramos, Raoul Velazco |
A deep analysis of SEU consequences in the internal memory of LEON3 processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 17th Latin-American Test Symposium, LATS 2016, Foz do Iguacu, Brazil, April 6-8, 2016, pp. 178, 2016, IEEE, 978-1-5090-1331-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Hiroki Ueno, Kazuteru Namba |
Construction of a soft error (SEU) hardened Latch with high critical charge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016, Storrs, CT, USA, September 19-20, 2016, pp. 27-30, 2016, IEEE Computer Society, 978-1-5090-3623-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Meng Li 0004, Ye Wang 0014, Michael Orshansky |
A Monte Carlo simulation flow for SEU analysis of sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016, pp. 44:1-44:6, 2016, ACM, 978-1-4503-4236-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Zhengfeng Huang, Huaguo Liang, Sybille Hellebrand |
A High Performance SEU Tolerant Latch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 31(4), pp. 349-359, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Cécile Weulersse, Florent Miller, Thierry Carrière, R. Mangeret |
Prediction of proton cross sections for SEU in SRAMs and SDRAMs using the METIS engineer tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 55(9-10), pp. 1491-1495, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Daniela Munteanu, Jean-Luc Autran |
SEU sensitivity of Junctionless Single-Gate SOI MOSFETs-based 6T SRAM cells investigated by 3D TCAD simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 55(9-10), pp. 1501-1505, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Guohe Zhang, Yunlin Zeng, Feng Liang 0001, Kebin Chen |
A novel SEU tolerant SRAM data cell design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 12(17), pp. 20150504, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Gilles Gasiot, Dimitri Soussan, Jean-Luc Autran, Victor Malherbe, Philippe Roche |
Muons and thermal neutrons SEU characterization of 28nm UTBB FD-SOI and Bulk eSRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, pp. 2, 2015, IEEE, 978-1-4673-7362-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Vanessa Vargas, Pablo Ramos, Raoul Velazco, Jean-François Méhaut, Nacer-Eddine Zergainoh |
Evaluating SEU fault-injection on parallel applications implemented on multicore processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: IEEE 6th Latin American Symposium on Circuits & Systems, LASCAS 2015, Montevideo, Uruguay, February 24-27, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8332-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Sushil Kumar, Srivatsan Chellappa, Lawrence T. Clark |
Temporal pulse-clocked multi-bit flip-flop mitigating SET and SEU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pp. 814-817, 2015, IEEE, 978-1-4799-8391-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Adrian Evans, Enrico Costenaro, Arkady Bramnik |
Flip-flop SEU reduction through minimization of the temporal vulnerability factor (TVF). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 21st IEEE International On-Line Testing Symposium, IOLTS 2015, Halkidiki, Greece, July 6-8, 2015, pp. 162-167, 2015, IEEE, 978-1-4673-7905-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco |
Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 21st IEEE International On-Line Testing Symposium, IOLTS 2015, Halkidiki, Greece, July 6-8, 2015, pp. 36-39, 2015, IEEE, 978-1-4673-7905-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Katerina Katsarou, Yiorgos Tsiatouhas |
Soft error immune latch under SEU related double-node charge collection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 21st IEEE International On-Line Testing Symposium, IOLTS 2015, Halkidiki, Greece, July 6-8, 2015, pp. 46-49, 2015, IEEE, 978-1-4673-7905-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Clement Champeix, Nicolas Borrel, Jean-Max Dutertre, Bruno Robisson, Mathieu Lisart, Alexandre Sarafianos |
SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 177-182, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Clara Vianna Prado |
Digital natives versus digital immigrants: interpretive analysis of differences in the use of ICT in their daily lives and their perception of education in the present (Nativos digitais versus imigrantes digitais: análise interpretativista das diferenças no uso das TIC em seu cotidiano e sua percepção do ensino na atualidade). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
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19 | Reza Omidi Gosheblagh, Karim Mohammadi |
Seu-Secure Parity Prediction Multiplier on SRAM-Based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 23(6), 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Yibai He, Shuming Chen |
Comparison of heavy-ion induced SEU for D- and TMR-flip-flop designs in 65-nm bulk CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Inf. Sci. ![In: Sci. China Inf. Sci. 57(10), pp. 1-7, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Reza Omidi Gosheblagh, Karim Mohammadi |
Three-Level Management Algorithm to Increase the SEU Emulation Rate in DPR Based Emulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 30(6), pp. 739-749, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | I-Chyn Wey, Yu-Sheng Yang, Bing-Chen Wu, Chien-Chang Peng |
A low power-delay-product and robust Isolated-DICE based SEU-tolerant latch circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 45(1), pp. 1-13, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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19 | Reza Omidi Gosheblagh, Karim Mohammadi |
Hybrid time and hardware redundancy to mitigate SEU effects on SRAM-FPGAs: Case study over the MicroLAN protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 45(7), pp. 870-879, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Peng Li, Minxuan Zhang, Weicheng Zhang, Zhenyu Zhao, Chao Song, Hua Fan |
Effect of charge sharing on SEU sensitive area of 40-nm 6T SRAM cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 11(4), pp. 20140051, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Pilin Junsangsri, Fabrizio Lombardi, Jie Han 0001 |
A hybrid non-volatile SRAM cell with concurrent SEU detection and correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-4, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Zhengfeng Huang |
A high performance SEU-tolerant latch for nanoscale CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-5, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Patricio Lopez Gonzalez, Vicente Baena Lecuyer, Hipólito Guzmán-Miranda, Javier Barrientos Rojas, Miguel A. Aguirre |
On the modelling of SEU effects on spread spectrum wireless systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WiSEE ![In: 2014 IEEE International Conference on Wireless for Space and Extreme Environments, WiSEE 2014, Noordwijk, Netherlands, October 30-31, 2014, pp. 1-5, 2014, IEEE, 978-1-4799-5653-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Igor Villata, Unai Bidarte, Uli Kretzschmar, Armando Astarloa, Jesús Lázaro 0001 |
Fast and accurate SEU-tolerance characterization method for Zynq SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014, pp. 1-4, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Robért Glein, Bernhard Schmidt, Florian Rittner, Jürgen Teich, Daniel Ziener |
A Self-Adaptive SEU Mitigation System for FPGAs with an Internal Block RAM Radiation Particle Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014, Boston, MA, USA, May 11-13, 2014, pp. 251-258, 2014, IEEE Computer Society, 978-1-4799-5110-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai |
Reconfiguration network design for SEU recovery in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 1524-1527, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Kejun Wu, Hoda Pahlevanzadeh, Peng Liu 0016, Qiaoyan Yu |
A new fault injection method for evaluation of combining SEU and SET effects on circuit reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 602-605, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Vanessa Vargas, Pablo Ramos, Wassim Mansour, Raoul Velazco, Nacer-Eddine Zergainoh, Jean-François Méhaut |
Preliminary results of SEU fault-injection on multicore processors in AMP mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014, pp. 194-197, 2014, IEEE, 978-1-4799-5323-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Luca Cassano, Hipólito Guzmán-Miranda, Miguel A. Aguirre |
Early assessment of SEU sensitivity through untestable fault identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014, pp. 186-189, 2014, IEEE, 978-1-4799-5323-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Katerina Katsarou, Yiorgos Tsiatouhas |
Double node charge sharing SEU tolerant latch design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014, pp. 122-127, 2014, IEEE, 978-1-4799-5323-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Wassim Mansour, Pablo Ramos, Rafic A. Ayoubi, Raoul Velazco |
SEU fault-injection at system level: Method, tools and preliminary results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 15th Latin American Test Workshop - LATW 2014, Fortaleza, Brazil, March 12-15, 2014, pp. 1-5, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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19 | Evaldo Carlos Fonseca Pereira, Odair Lelis Goncalez, Rafael Galhardo Vaz, Claudio Antonio Federico, Thiago Hanna Both, Gilson Inácio Wirth |
The effects of total ionizing dose on the neutron SEU cross section of a 130 nm 4 Mb SRAM memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 15th Latin American Test Workshop - LATW 2014, Fortaleza, Brazil, March 12-15, 2014, pp. 1-4, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Anna Vaskova, A. Fabregat, Marta Portela-García, Mario García-Valderas, Celia López-Ongil, Matteo Sonza Reorda |
Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 15th Latin American Test Workshop - LATW 2014, Fortaleza, Brazil, March 12-15, 2014, pp. 1-6, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Wei Wei 0034, Fabrizio Lombardi, Kazuteru Namba |
Designs and analysis of non-volatile memory cells for single event upset (SEU) tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014, pp. 69-74, 2014, IEEE Computer Society, 978-1-4799-6155-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Thiago Baesso Procaci, Sean W. M. Siqueira, Leila Cristina Vasconcelos de Andrade |
Encontrando Usuários Confiáveis em Comunidades Online de Perguntas e Respostas Através de seu Índice de Confiança. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBSI ![In: Proceedings of the 10th Brazilian Symposium on Information Systems, SBSI 2014, Londrina, Brazil, May 27-30, 2014., pp. 675-686, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
19 | Marcio Juliato, Catherine H. Gebotys |
A Quantitative Analysis of a Novel SEU-Resistant SHA-2 and HMAC Architecture for Space Missions Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Aerosp. Electron. Syst. ![In: IEEE Trans. Aerosp. Electron. Syst. 49(3), pp. 1536-1554, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Michelangelo Grosso, Hipólito Guzmán-Miranda, Miguel A. Aguirre |
Exploiting Fault Model Correlations to Accelerate SEU Sensitivity Assessment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Informatics ![In: IEEE Trans. Ind. Informatics 9(1), pp. 142-148, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Martin Straka, Jan Kastil, Zdenek Kotásek, Lukas Miculka |
Fault tolerant system design and SEU injection based testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 37(2), pp. 155-173, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Wassim Mansour, Raoul Velazco |
SEU Fault-Injection in VHDL-Based Processors: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 29(1), pp. 87-94, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Monica Alderighi, Fabio Casini, Sergio D'Angelo, Alessio Gravina, Valentino Liberali, Marcello Mancini, Paolo Musazzi, Sandro Pastore, Matteo Sassi, Gabriele Sorrenti |
A Preliminary Study about SEU Effects on Programmable Interconnections of SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 29(3), pp. 341-350, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Zhen Gao 0001, Pedro Reviriego, Wen Pan, Zhan Xu, Ming Zhao 0001, Jing Wang 0001, Juan Antonio Maestro |
Efficient Arithmetic-Residue-Based SEU-Tolerant FIR Filter Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 60-II(8), pp. 497-501, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Cinzia Bernardeschi, Luca Cassano, Mario G. C. A. Cimino, Andrea Domenici |
GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 59(10-D), pp. 1243-1254, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Jose Luis Nunes, João Carlos Cunha, Raul Barbosa, Mário Zenha Rela |
Evaluating Xilinx SEU Controller Macro for fault injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2013 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Budapest, Hungary, June 24-27, 2013, pp. 1-2, 2013, IEEE Computer Society, 978-1-4673-6471-3. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Konstantin O. Petrosyants, Igor A. Kharitonov, D. A. Popov |
Coupled TCAD-SPICE simulation of parasitic BJT effect on SOI CMOS SRAM SEU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: East-West Design & Test Symposium, EWDTS 2013, Rostov-on-Don, Russia, September 27-30, 2013, pp. 1-4, 2013, IEEE Computer Society, 978-1-4799-2095-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Greicy Marques-Costa, Wassim Mansour, Fabrice Pancher, Raoul Velazco, Alain Bui, Devan Sohier |
Optimization of a self-converging algorithm at assembly level to improve SEU fault-tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013, pp. 1-4, 2013, IEEE, 978-1-4673-4897-3. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Uli Kretzschmar, Armando Astarloa, Jesús Lázaro 0001 |
SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications - 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings, pp. 37-46, 2013, Springer, 978-3-642-36811-0. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Cinzia Bernardeschi, Luca Cassano, Andrea Domenici |
Formal approaches to SEU testing in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013, Torino, Italy, June 24-27, 2013, pp. 209-216, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato |
High-speed DFG-level SEU vulnerability analysis for applying selective TMR to resource-constrained CGRA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 538-545, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Eugenio de Oliveira Simonetto, Mauri Leodir Löbler |
Simulação Computacional para Avaliação de Cenários sobre a Reciclagem de Resíduos Sólidos Urbanos e o seu Impacto na Economia de Energia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBSI ![In: Proceedings of the 9th Brazilian Symposium on Information Systems, SBSI 2013, João Pessoa, Brazil, May 22-24, 2013., pp. 529-540, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Yaqing Chi, Yibai He, Bin Liang, Chunmei Hu |
A Scan Chain Based SEU Test Method for Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NCCET ![In: Computer Engineering and Technology - 17th CCF Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers, pp. 180-185, 2013, Springer, 978-3-642-41634-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Pietro Cunha Dolci |
Modelo para avaliar a influência dos investimentos em TI na governança da cadeia de suprimentos e o seu desempenho. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2013 |
RDF |
|
19 | Sidnei Roberto Feliciano da Silva |
As relações do intraempreendedorismo e da IT Fashion com a consumerização de TI e seu impacto no desempenho pessoal e na governança de TI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2013 |
RDF |
|
19 | Yoshihiro Ichinomiya, Tsuyoshi Kimura, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi |
Fault-Injection Analysis to Estimate SEU Failure in Time by Using Frame-Based Partial Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(12), pp. 2347-2356, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Wenhui Yang, Zhen Gao 0001, Xiang Chen 0007, Ming Zhao 0001, Jing Wang 0001 |
Residue code based low cost SEU-tolerant fir filter design for OBP satellite communication systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURASIP J. Wirel. Commun. Netw. ![In: EURASIP J. Wirel. Commun. Netw. 2012, pp. 174, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Surendra S. Rathod, Ashok K. Saxena, Sudeb Dasgupta |
Dg-FinFET-Based SRAM Configurations for Increased SEU Immunity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 21(4), 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Zhongming Wang, Zhibin Yao, Hongxia Guo, Min Lv |
Bitstream decoding and SEU-induced failure analysis in SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Inf. Sci. ![In: Sci. China Inf. Sci. 55(4), pp. 971-982, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Karine Castellani-Coulié, Hassen Aziza, Gilles Micolau, Jean-Michel Portal |
Optimization of SEU Simulations for SRAM Cells Reliability under Radiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 28(3), pp. 331-338, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Naifeng Jing, Ju-Yueh Lee, Zhe Feng 0002, Weifeng He, Zhigang Mao, Lei He 0001 |
SEU fault evaluation and characteristics for SRAM-based FPGA architectures and synthesis algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 18(1), pp. 13:1-13:18, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Seokjoong Kim, Matthew R. Guthaus |
SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 181-195, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Seokjoong Kim, Matthew R. Guthaus |
Dynamic voltage scaling for SEU-tolerance in low-power memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, pp. 207-212, 2012, IEEE, 978-1-4673-2657-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Abbas Mohammadi 0001, Mojtaba Ebrahimi, Alireza Ejlali, Seyed Ghassem Miremadi |
SCFIT: A FPGA-based fault injection technique for SEU fault model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012, pp. 586-589, 2012, IEEE, 978-1-4577-2145-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Jing Zhou, Zengrong Liu, Lei Chen 0010, Shuo Wang, Zhiping Wen 0001, Lishuai Wu, Xun Chen |
Study of an Automated Precise SEU Fault Injection Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, IPDPS 2012, Shanghai, China, May 21-25, 2012, pp. 277-281, 2012, IEEE Computer Society, 978-1-4673-0974-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Fang Dong 0001, Junzhou Luo, Jiahui Jin, Yanhao Wang, Yanmin Zhu |
Performance evaluation and analysis of SEU Cloud Computing Platform - Using general benchmarks and real world AMS application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC ![In: Proceedings of the IEEE International Conference on Systems, Man, and Cybernetics, SMC 2012, Seoul, Korea (South), October 14-17, 2012, pp. 1455-1460, 2012, IEEE, 978-1-4673-1713-9. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Yoshihiro Ichinomiya, Kohei Takano, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi |
Accelerated evaluation of SEU failure-in-time using frame-based partial reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPT ![In: 2012 International Conference on Field-Programmable Technology, FPT 2012, Seoul, Korea (South), December 10-12, 2012, pp. 220-223, 2012, IEEE, 978-1-4673-2846-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Mohammed Shayan, Virendra Singh, Adit D. Singh, Masahiro Fujita |
SEU tolerant robust memory cell design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012, pp. 13-18, 2012, IEEE Computer Society, 978-1-4673-2082-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Celia López-Ongil, Marta Portela-García, Mario García-Valderas, Anna Vaskova, Luis Entrena, Joaquín Rivas-Abalo, Alberto Martín-Ortega, Javier Martinez-Oter, S. Rodriguez-Bustabad, Ignacio Arruego |
SEU sensitivity of robust communication protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012, pp. 188-193, 2012, IEEE Computer Society, 978-1-4673-2082-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Norhuzaimin Julai, Alexandre Yakovlev, Alexandre V. Bystrov |
Error detection and correction of single event upset (SEU) tolerant latch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012, pp. 1-6, 2012, IEEE Computer Society, 978-1-4673-2082-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Yuriy Shiyanovskii, Aravind Rajendran, Christos A. Papachristou |
A low power memory cell design for SEU protection against radiation effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: 2012 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2012, Erlangen, Germany, June 25-28, 2012, pp. 288-295, 2012, IEEE, 978-1-4673-1915-7. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Wassim Mansour, Raoul Velazco |
SEU fault-injection in VHDL-based processors: A case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 13th Latin American Test Workshop, LATW 2012, Quito, Ecuador, April 10-13, 2012, pp. 1-5, 2012, IEEE Computer Society, 978-1-4673-2355-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Neil J. Perrins, Alistair A. McEwan |
SEU Protection for High-Reliability Flash File Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CPA ![In: 34th Communicating Process Architectures, CPA 2012, organised under the auspices of WoTUG, Dundee, Scotland, UK, August 26, 2012, pp. 219-220, 2012, Open Channel Publishing Ltd., 978-0-9565409-5-9. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
19 | Mohammed Shayan, Virendra Singh, Adit D. Singh, Masahiro Fujita |
SEU Tolerant Robust Latch Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings, pp. 223-232, 2012, Springer, 978-3-642-31493-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Josmaria Lima Ribeiro de Oliveira |
Estudo comparado entre bibliotecários, contadores e analistas de tecnologia da informação: processo de profissionalização e seu efeito na formação, atuação e reconhecimento profissional. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2012 |
RDF |
|
19 | Shahin Golshan, Hessam Kooti, Elaheh Bozorgzadeh |
SEU-Aware High-Level Data Path Synthesis and Layout Generation on SRAM-Based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(6), pp. 829-840, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
19 | Martin Straka, Jan Kastil, Zdenek Kotásek |
SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland, pp. 223-230, 2011, IEEE Computer Society, 978-1-4577-1048-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
19 | Naifeng Jing, Ju-Yueh Lee, Zhe Feng 0002, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He 0001 |
Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 282-285, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
19 | Aitzan Sari, Mihalis Psarakis |
Scrubbing-based SEU mitigation approach for Systems-on-Programmable-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPT ![In: 2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011, pp. 1-8, 2011, IEEE, 978-1-4577-1741-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
19 | Luca Sterpone, Fabio Margaglia, Markus Köster, Jens Hagemeyer, Mario Porrmann |
Analysis of SEU effects in partially reconfigurable SoPCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: 2011 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2011, San Diego, California, USA, June 6-9, 2011, pp. 129-136, 2011, IEEE, 978-1-4577-0598-4. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
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