Search results for "SystemC"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
26	Elvinia Riccobene, Patrizia Scandurra	Model transformations in the UPES/UPSoC development process for embedded systems.	Innov. Syst. Softw. Eng.	2009	DBLP DOI BibTeX RDF	Model-based development (MBD), Unified modeling language (UML), Model transformations, SystemC, Embedded system design
26	Marius Gligor, Nicolas Fournel, Frédéric Pétrot	Using binary translation in event driven simulation for fast and flexible MPSoC simulation.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	systemc simulation, codesign, binary translation
26	Olga Zlydareva, Claudio Sacchi	SDR application for implementing an integrated UMTS/WiMAX PHY-layer architecture.	MobiMedia	2007	DBLP DOI BibTeX RDF	WiMAX, UMTS, SystemC, software defined radio, physical layer
26	Antoine Perrin, Frank Ghenassia	Bridging gap between simulation and spreadsheet study.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	performance, verification, SoC, SystemC
26	Grant Martin	The First Transaction, but not the Last.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	SystemC, transaction-level modeling, ESL, TLM
26	Armando Sánchez-Peña, Pedro P. Carballo, Luz García 0001, Antonio Núñez	VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems.	DSD	2006	DBLP DOI BibTeX RDF	AMBA 3 AXI, VIPACES, Virtual Components, Verification, Test, System-on-Chip (SoC), IP, DCT, Emulation, SystemC, Environment, TLM, IDCT, VIP
26	Klaus Rothbart, Ulrich Neffe, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger	Power consumption profile analysis for security attack simulation in smart cards at high abstraction level.	EMSOFT	2005	DBLP DOI BibTeX RDF	simulation, analysis, smart card, fault injection, attack, SystemC, embedded security, power profile
26	Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli	×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip.	DATE	2004	DBLP DOI BibTeX RDF	Systems on Chips, Networks on Chips, SystemC, application-specific, latency-insensitive design
26	Massimo Conti, Marco Caldari, Giovanni B. Vece, Simone Orcioni, Claudio Turchetti	Performance analysis of different arbitration algorithms of the AMBA AHB bus.	DAC	2004	DBLP DOI BibTeX RDF	AMBA AHB BUS, arbitration algorithm, performance, systemC
26	Srinivasan Murali, Giovanni De Micheli	SUNMAP: a tool for automatic topology selection and generation for NoCs.	DAC	2004	DBLP DOI BibTeX RDF	systems on chip, mapping, networks on chip, topology, SystemC
26	Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens	A modular simulation framework for architectural exploration of on-chip interconnection networks.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	simulation, network-on-chip, SystemC, architecture exploration
26	Franco Fummi, Giovanni Perbellini, Paolo Gallo, Massimo Poncino, Stefano Martini, Fabio Ricciato	A timing-accurate modeling and simulation environment for networked embedded systems.	DAC	2003	DBLP DOI BibTeX RDF	remote debugging, emulation, systemC, co-simulation
24	Yung-Yuan Chen, Chung-Hsien Hsu, Kuen-Long Leu	SoC-level risk assessment using FMEA approach in system design with SystemC.	SIES	2009	DBLP DOI BibTeX RDF
24	Deepak Mathaikutty, Sandeep K. Shukla	MCF: A Metamodeling-Based Component Composition Framework - Composing SystemC IPs for Executable System Models.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
24	Cristiana Bolchini, Antonio Miele, Donatella Sciuto	Fault Models and Injection Strategies in SystemC Specifications.	DSD	2008	DBLP DOI BibTeX RDF
24	Alessandro Mignogna, Massimo Conti, M. D'Angelo, Massimo Baleani, Alberto Ferrari	Transaction Level Modeling and Performance Analysis in SystemC of IEEE 802.15.4 Wireless Standard.	DSD	2008	DBLP DOI BibTeX RDF
24	Henrik Svensson, Thomas Lenart, Viktor Öwall	Modelling and exploration of a reconfigurable array using systemC TLM.	IPDPS	2008	DBLP DOI BibTeX RDF
24	Lin Chen, Wanzhong Sun, Zhixin Wang, Chao Zhou	A SystemC-Based Transaction Level Modeling of On-Chip-Bus.	CSSE (4)	2008	DBLP DOI BibTeX RDF
24	Junji Kitamichi, Koji Ueda, Kenichi Kuroda	A Modeling of a Dynamically Reconfigurable Processor Using SystemC.	VLSI Design	2008	DBLP DOI BibTeX RDF
24	Alisson Vasconcelos de Brito, Matthias Kühnle, Michael Hübner 0001, Jürgen Becker 0001, Elmar U. K. Melcher	Modelling and Simulation of Dynamic and Partially Reconfigurable Systems using SystemC.	ISVLSI	2007	DBLP DOI BibTeX RDF
24	Richard Maciel, Bruno C. Albertini, Sandro Rigo, Guido Araujo, Rodolfo Azevedo	A Methodology and Toolset to Enable SystemC and VHDL Co-simulation.	ISVLSI	2007	DBLP DOI BibTeX RDF
24	Alair Dias Jr., Diógenes Cecilio da Silva Jr.	Code-coverage Based Test Vector Generation for SystemC Designs.	ISVLSI	2007	DBLP DOI BibTeX RDF
24	Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull	Interactive presentation: Implementation of a transaction level assertion framework in SystemC.	DATE	2007	DBLP DOI BibTeX RDF
24	Yung-Tai Hsu, Yuan-Jin Wen, Sheng-De Wang	Embedded Hardware/Software Design and Cosimulation using User Mode Linux and SystemC.	ICPP Workshops	2007	DBLP DOI BibTeX RDF
24	Alisson Vasconcelos de Brito, Elmar U. K. Melcher, Wilson Rosas	An open-source tool for simulation of partially reconfigurable systems using SystemC.	ISVLSI	2006	DBLP DOI BibTeX RDF
24	Hiroaki Nakamura, Naoto Sato, Naoshi Tabuchi	An efficient and portable scheduler for RTOS simulation and its certified integration to SystemC.	DATE	2006	DBLP DOI BibTeX RDF
24	Martin Streubühr, Joachim Falk, Christian Haubelt, Jürgen Teich, Rainer Dorsch, Thomas Schlipf	Task-accurate performance modeling in SystemC for real-time multi-processor architectures.	DATE	2006	DBLP DOI BibTeX RDF
24	Nico Bannow, Karsten Haug, Wolfgang Rosenstiel	Automatic systemC design configuration for a faster evaluation of different partitioning alternatives.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
24	Yongjun Wang, Xiaoming Zhang	A Novel Modeling Method of Network Processor Architecture Based on SystemC.	CIT	2006	DBLP DOI BibTeX RDF
24	Pao-Ann Hsiung, Chun-Hsian Huang, Chih-Feng Liao	Perfecto: A Systemc-Based Performance Evaluation Framework for Dynamically Partially Reconfigurable Systems.	FPL	2006	DBLP DOI BibTeX RDF
24	George Economakos	Behavioral synthesis with SystemC and PSL assertions for interface specification.	ISCAS	2006	DBLP DOI BibTeX RDF
24	Andrzej Pulka	SystemC models generation based on libraries of templates.	ISCAS	2006	DBLP DOI BibTeX RDF
24	Liang Liang, Bo Zhou, Xuegong Zhou, Chenglian Peng	System Prototyping Based on SystemC Transaction-Level Modeling.	IMSCCS (2)	2006	DBLP DOI BibTeX RDF
24	Luca Benini, Davide Bertozzi, Alessandro Bogliolo, Francesco Menichelli, Mauro Olivieri	MPARM: Exploring the Multi-Processor SoC Design Space with SystemC.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	system-on-chip simulation, design space exploration, multiprocessor embedded systems
24	Sören Sonntag, Matthias Gries, Christian Sauer 0001	SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC.	SAMOS	2005	DBLP DOI BibTeX RDF
24	Daniel Kroening, Natasha Sharygina	Formal verification of SystemC by automatic hardware/software partitioning.	MEMOCODE	2005	DBLP DOI BibTeX RDF
24	David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla	Automated Extraction of Structural Information from SystemC-based IP for Validation.	MTV	2005	DBLP DOI BibTeX RDF
24	M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai	RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC.	DATE	2005	DBLP DOI BibTeX RDF
24	Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen	SystemC-based Design Methodology for Reconfigurable System-on-Chip.	DSD	2005	DBLP DOI BibTeX RDF
24	Pallavi Shurpali, Ravi Shankar 0001, Ellie Shuff	On Ensuring Safety and Liveness Properties of Concurrent Models in SystemC.	MSE	2005	DBLP DOI BibTeX RDF
24	Sanggyu Park, Soo-Ik Chae	A C/C++-Based Functional Verification Framework Using the SystemC Verification Library.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
24	Matthieu Briere, Emmanuel Drouard, Fabien Mieyeville, David Navarro, Ian O'Connor, Frédéric Gaffiot	Heterogeneous Modelling of an Optical Network-on-Chip with SystemC.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
24	Vikram Singh Saun, Preeti Ranjan Panda	Extracting Exact Finite State Machines from Behavioral SystemC Descriptions.	VLSI Design	2005	DBLP DOI BibTeX RDF
24	Tianhao Zhang, Krishnendu Chakrabarty, Richard B. Fair	Behavioral modeling and performance evaluation of microelectrofluidics-based PCR systems using SystemC.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
24	Ole Blaurock	A Modular Approach to SystemC-Based Codesign Promoting Reuse of High-Level Legacy C-Models.	ECBS	2004	DBLP DOI BibTeX RDF
24	Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr	Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs.	SAMOS	2004	DBLP DOI BibTeX RDF
24	Rocco Le Moigne, Olivier Pasquier, Jean Paul Calvez	A Generic RTOS Model for Real-time Systems Simulation with SystemC.	DATE	2004	DBLP DOI BibTeX RDF
24	Hector Posadas, Fernando Herrera, Pablo Sánchez, Eugenio Villar, Francisco Blasco	System-Level Performance Analysis in SystemC.	DATE	2004	DBLP DOI BibTeX RDF
24	Guido Post, P. K. Venkataraghavan, Tapan Ray, D. R. Seetharaman	A SystemC-Based Verification Methodology for Complex Wireless Software IP.	DATE	2004	DBLP DOI BibTeX RDF
24	Adam Donlin, Axel Braun, Adam Rose	SystemC for the Design and Modeling of Programmable Systems.	FPL	2004	DBLP DOI BibTeX RDF
24	Jinwen Xi, Peixin Zhong	Hardware/Software Co-Modeling of SAT Solver Based on Distributed Computing Elements using SystemC.	ICCD	2004	DBLP DOI BibTeX RDF
24	Ole Blaurock	A SystemC-Based Modular Design and Verification Framework for C-Model Reuse in a HW/SW-Co-Design Flow.	ICDCS Workshops	2004	DBLP DOI BibTeX RDF
24	Samy Meftali, Jean-Luc Dekeyser	An Optimal Charge Balancing Model for Fast Distributed SystemC Simulation in IP/SoC Design.	IWSOC	2004	DBLP DOI BibTeX RDF
24	Luca Benini, Davide Bertozzi, Davide Bruni, Nicola Drago, Franco Fummi, Massimo Poncino	SystemC Cosimulation and Emulation of Multiprocessor SoC Designs.	Computer	2003	DBLP DOI BibTeX RDF
24	Jan Lundgren, Bengt Oelmann, Trond Ytterdal, Patrik Eriksson, Munir Abdalla, Mattias O'Nils	Behavioral Simulation of Power Line Noise Coupling in Mixed-Signal Systems using SystemC.	ISVLSI	2003	DBLP DOI BibTeX RDF
24	Christoph Grimm 0001, Christian Meise, Wilhelm Heupke, Klaus Waldschmidt	Refinement of Mixed-Signal Systems with SystemC.	DATE	2003	DBLP DOI BibTeX RDF
24	Marco Caldari, Massimo Conti, Massimo Coppola, Stephane Curaba, Lorenzo Pieralisi, Claudio Turchetti	Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0.	DATE	2003	DBLP DOI BibTeX RDF
24	Marco Caldari, Massimo Conti, Paolo Crippa, Giuliano Marozzi, Fabio Di Gennaro, Simone Orcioni, Claudio Turchetti	SystemC Modeling of a Bluetooth Transceiver: Dynamic Management of Packet Type in a Noisy Channel.	DATE	2003	DBLP DOI BibTeX RDF
24	Marcello Coppola, Stephane Curaba, Miltos D. Grammatikakis, Giuseppe Maruccia	IPSIM: SystemC 3.0 Enhancements for Communication Refinement.	DATE	2003	DBLP DOI BibTeX RDF
24	Ashraf Salem	Formal Semantics of Synchronous SystemC.	DATE	2003	DBLP DOI BibTeX RDF
24	Armin Wellig, Julien Zory	Framed Complexity Analysis in SystemC for Multi-level Design Space Exploration.	DSD	2003	DBLP DOI BibTeX RDF
24	Antti Pelkonen, Kostas Masselos, Miroslav Cupák	System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC.	IPDPS	2003	DBLP DOI BibTeX RDF
24	Ghaiyyur Quraishi, Ravi Shankar 0002	On simulating the IP Market Dynamics in an Academic Environment Using SystemC.	MSE	2003	DBLP DOI BibTeX RDF
24	Armando Armaroli, Marcello Coppola, Mario Diaz-Nava, Luca Fanucci	High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim.	IWSOC	2003	DBLP DOI BibTeX RDF
24	Fabrizio Ferrandi, Michele Rendine, Donatella Sciuto	Functional Verification for SystemC Descriptions Using Constraint Solving.	DATE	2002	DBLP DOI BibTeX RDF
24	Rolf Drechsler, Daniel Große	Reachability Analysis for Formal Verification of SystemC.	DSD	2002	DBLP DOI BibTeX RDF
24	Ramaswamy Ramaswamy, Russell Tessier	The Integration of SystemC and Hardware-Assisted Verification.	FPL	2002	DBLP DOI BibTeX RDF
24	Dirk W. Hoffmann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel	Simulation Meets Verification: Checking Temporal Properties in SystemC.	EUROMICRO	2000	DBLP DOI BibTeX RDF
19	Daniel Gajski, Todd M. Austin, Steve Svoboda	What input-language is the best choice for high level synthesis (HLS)?	DAC	2010	DBLP DOI BibTeX RDF
19	Sangkil Jung, Sangjin Hong	Network/hardware cross-layer evaluation for ROHC and packet aggregation on wireless mesh networks.	Wirel. Networks	2009	DBLP DOI BibTeX RDF	Network/hardware cross-layer evaluation, ROHC, Wireless mesh network
19	Thilo Pionteck, Carsten Albrecht, Roman Koch, Torben Brix, Erik Maehle	Design and Simulation of Runtime Reconfigurable Systems.	DDECS	2008	DBLP DOI BibTeX RDF
19	Morteza Damavandpeyma, Siamak Mohammadi	Architectural Synthesis with Control Data Flow Extraction toward an Asynchronous CAD Tool.	DSD	2008	DBLP DOI BibTeX RDF
19	Marcello Mura, Mariagiovanna Sami	Code Generation from Statecharts: Simulation of Wireless Sensor Networks.	DSD	2008	DBLP DOI BibTeX RDF
19	Zhonglei Wang, Wolfgang Haberl, Andreas Herkersdorf, Martin Wechs	A Simulation Approach for Performance Validation during Embedded Systems Design.	ISoLA	2008	DBLP DOI BibTeX RDF
19	Angelo Gargantini, Elvinia Riccobene, Patrizia Scandurra	A model-driven validation & verification environment for embedded systems.	SIES	2008	DBLP DOI BibTeX RDF
19	Amine Anane, El Mostapha Aboulhamid, Julie Vachon, Yvon Savaria	Modeling and simulation of complex heterogeneous systems.	ISCAS	2008	DBLP DOI BibTeX RDF
19	Christian Haubelt, Thomas Schlichter, Joachim Keinert, Michael Meredith	SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models.	DAC	2008	DBLP DOI BibTeX RDF	rapid prototyping, design space exploration, ESL design
19	Jürgen Schnerr, Oliver Bringmann 0001, Alexander Viehl, Wolfgang Rosenstiel	High-performance timing simulation of embedded software.	DAC	2008	DBLP DOI BibTeX RDF	software timing, virtual prototypes, simulation acceleration
19	Pablo Sanchez, Javier Barreda, Jorge Ocón	Integration of domain-specific models into a MDA framework for time-critical embedded systems.	WISES	2008	DBLP DOI BibTeX RDF
19	Pascal T. Wolkotte, Philip K. F. Hölzenspies, Gerard J. M. Smit	Fast, Accurate and Detailed NoC Simulations.	NOCS	2007	DBLP DOI BibTeX RDF
19	Taewook Oh, Youngmin Yi, Soonhoi Ha	Communication Architecture Simulation on the Virtual Synchronization Framework.	SAMOS	2007	DBLP DOI BibTeX RDF
19	Bernhard Niemann, Christian Haubelt	Towards a Unified Execution Model for Transactions in TLM.	MEMOCODE	2007	DBLP DOI BibTeX RDF
19	Matthias Krause 0002, Oliver Bringmann 0001, André Hergenhan, Gökhan Tabanoglu, Wolfgang Rosenstiel	Timing simulation of interconnected AUTOSAR software-components.	DATE	2007	DBLP DOI BibTeX RDF
19	Wolfgang Ecker, Volkan Esen, Lars Schönberg, Thomas Steininger, Michael Velten, Michael Hull	Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance.	DATE	2007	DBLP DOI BibTeX RDF
19	Axel Siebenborn, Alexander Viehl, Oliver Bringmann 0001, Wolfgang Rosenstiel	Control-Flow Aware Communication and Conflict Analysis of Parallel Processes.	ASP-DAC	2007	DBLP DOI BibTeX RDF
19	Pascal T. Wolkotte, Philip K. F. Hölzenspies, Gerard J. M. Smit	Using an FPGA for Fast Bit Accurate SoC Simulation.	IPDPS	2007	DBLP DOI BibTeX RDF
19	Ali Ahmadinia, Balal Ahmad, Tughrul Arslan	System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design.	AHS	2007	DBLP DOI BibTeX RDF
19	Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla	CARH: service-oriented architecture for validating system-level designs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
19	Emmanuel Viaud, François Pêcheux, Alain Greiner	An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principles.	DATE	2006	DBLP DOI BibTeX RDF
19	Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi	Heterogeneous behavioral hierarchy for system level designs.	DATE	2006	DBLP DOI BibTeX RDF
19	Sangkil Jung, Sangjin Hong, Peom Park	Effect of RObust Header Compression (ROHC) and Packet Aggregation on Multi-hop Wireless Mesh Networks.	CIT	2006	DBLP DOI BibTeX RDF
19	Sanggyu Park, Sang-yong Yoon, Soo-Ik Chae	A Mixed-Level Virtual Prototyping Environment for Refinement-Based Design Environment.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
19	Claude Helmstetter, Florence Maraninchi, Laurent Maillet-Contoz, Matthieu Moy	Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip.	FMCAD	2006	DBLP DOI BibTeX RDF
19	Haja Moinudeen, Ali Habibi, Sofiène Tahar	Design for Verification of the PCI-X Bus.	FMCAD	2006	DBLP DOI BibTeX RDF
19	M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai	Enabling RTOS simulation modeling in a system level design language.	ASP-DAC	2005	DBLP DOI BibTeX RDF
19	Zhengting He, Aloysius K. Mok, Cheng Peng	Timed RTOS Modeling for Embedded System Design.	IEEE Real-Time and Embedded Technology and Applications Symposium	2005	DBLP DOI BibTeX RDF
19	Tobias Bjerregaard, Shankar Mahadevan, Jens Sparsø	A Channel Library for Asynchronous Circuit Design Supporting Mixed-Mode Modeling.	PATMOS	2004	DBLP DOI BibTeX RDF
19	Andrea Bona, Vittorio Zaccaria, Roberto Zafalon	System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip.	DATE	2004	DBLP DOI BibTeX RDF	Network-on-Chip power analysis, communication based low power design, system-level energy optimization
19	Nico Bannow, Karsten Haug	Evaluation of an Object-Oriented Hardware Design Methodology for Automotive Applications.	DATE	2004	DBLP DOI BibTeX RDF
19	A. Bernstein, M. Burton, Frank Ghenassia	How to bridge the abstraction gap in system level modeling and design.	ICCAD	2004	DBLP DOI BibTeX RDF