| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | K. Vinay, Vikas Vazhayil, Madhav Rao |
An event driven approximate bio-electrical model generating surface electromyography RMS features.  |
VLSID  |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Shraman Mukherjee, Sumantra Seth, Saurabh Saxena |
A 5-Gb/s PAM4 Voltage Mode Transmitter with Current Mode Continuous Time Linear Equalizer. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Anupama Deo, Ashis Maity, Amit Patra |
A High Voltage Level Shifter for Automotive Buck Converter with a Fast Transient Response. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Neelam Surana, Pramod Kumar Bharti, Bachu Varun Tej, Joycee Mekie |
Mixed-8T: Energy-Efficient Configurable Mixed-VT SRAM Design Techniques for Neural Networks. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahabubul Alam, Swaroop Ghosh |
DeepQMLP: A Scalable Quantum-Classical Hybrid Deep Neural Network Architecture for Classification. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | U. S. Shikha, Rekha K. James, Anju Pradeep, Sumi Baby, Jobymol Jacob |
Threshold Voltage Modeling of Negative Capacitance Double Gate TFET. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jyoti Patel, Shashank Banchhor, Surila Guglani, Avirup Dasgupta, Sourajeet Roy, Anand Bulusu, Sudeb Dasgupta |
Design optimization Using Symmetric/Asymmetric Spacer for 14 nm Multi-Fin Tri-gate Fin-FET for Mid-Band 5G Applications. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mani Shankar Yadav, Avinash Kumar Gupta, Kanupriya Varshney, Brajesh Rawat |
How Good Silicon Oxide-based Memristor Can be? |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Santanu Kundu, Manoranjan Prasad, Sashank Nishad, Sandeep Nachireddy, Harikrishnan K |
MLIR: Machine Learning based IR Drop Prediction on ECO Revised Design for Faster Convergence. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Akshara Ravi, Vivek Chaturvedi |
Static Malware Analysis using ELF features for Linux based IoT devices. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayan Chakraborty 0005, Sayandeep Sanyal, Pallab Dasgupta, Aritra Hazra, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian |
Tracking Coverage Artefacts for Periodic Signals using Sequence-based Abstractions. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Asmit De, Swaroop Ghosh |
HeapSafe: Securing Unprotected Heaps in RISC-V. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kedar Janardan Dhori, Promod Kumar, Christophe Lecocq, Pascal Urard, Olivier Callen, Florian Cacho, Maryline Parra, Prashant Pandey, Daniel Noblet |
40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sunil Kumar C. R, Aruna Kumar, Sanjib Basu |
Novel Circuit Architecture for configurable eDP and MIPI DPHY IO. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Amina Haroon, Sneh Saurabh |
Image Completion using a Sparse Probabilistic Spin Logic Network. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Srivastava 0002, Baibhab Chatterjee, Dana Weinstein, Shreyas Sen |
A Low Phase Noise 30 GHz Oscillator Topology for Resonant-Fin-Transistors Based High-Q On-chip Resonators in 14 nm Technology. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumanta Pyne |
An Architectural support for Digital Microfluidic based Hot-Spot free Computing. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Adithya Sunil Edakkadan, Kuntal Desai, Abhishek Srivastava 0002 |
A 2.75-2.94 GHz Voltage Controlled Oscillator with Low Gain Variation for Quantum Sensing Applications. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnendu Guha, Amlan Chakrabarti |
Criticality based Reliability from Rowhammer Attacks in Multi-User-Multi-FPGA Platform. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kattekola Naresh, Y. Padma Sai, Shubhankar Majumdar |
Design of 8-bit Dadda Multiplier using Gate Level Approximate 4: 2 Compressor. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdulrahman Alaql, Aritra Dasgupta, Md. Moshiur Rahman 0001, Swarup Bhunia |
SEVA: Structural Analysis based Security Evaluation of Sequential Locking. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Vaibhavi Solanki, Rahul Ranjan Kumar, Praveen Ghagare, Anand D. Darji |
Low Power and Area Efficient Approximate 2D-DCT Architecture for Wireless Capsule Endoscopy. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Anjali Agrawal, Smruti R. Sarangi |
NanoLeak: A Fast Analytical Green's Function-based Leakage-aware Thermal Simulator. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankur Bal, Sharad Gupta, Rupesh Singh |
A Real Time Multi-Bit DAC Mismatch Estimation & Correction Technique For Wideband Continuous Time Sigma Delta Modulators. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Santunu Sarangi, Indranil Som, T. K. Bhattacharyya |
A 10 Gb/s On-chip Jitter Measurement Circuit Based on Transition Region Scanning Method. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kritanta Saha, Sudipta Paul 0001, Pritha Banerjee 0001, Susmita Sur-Kolay |
Stitch-avoiding Global Routing for Multiple E-Beam Lithography. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashish Papreja, Sresthavadhani Mantha, Abhishek Srivastava 0002 |
Design Methodology of Low Phase Noise mmWave Oscillator with Partial Cancellation of Static Capacitance of High-Q On-chip MEMS Resonator. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | M. R. Ashuthosh, Santosh Krishna, Vishvas Sudarshan, Srinivasan Subramaniyan, Madhura Purnaprajna |
MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Rushabh Shah, Krishna Agrawal, G. Anjaneyulu, Vishnu Bhaskari |
Automated Debugger for Optimum Physical Clock Structure Targeting Minimal Latency. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Y. Pawan Kumar Gururaj, Sai Anirudh Karre, Raghav Mittal, Y. Raghu Reddy, Syed Azeemuddin |
Customizable Head-mounted Device for Detection of Eye Disorders using Virtual Reality. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jitendra Kumar, Asutosh Srivastava |
Dynamic Variable Ordering during Algebraic Backward Rewriting for Formal Verification of Multipliers. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | S. Raghuram, N. Shashank |
Approximate Adders for Deep Neural Network Accelerators. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Bodepu Sai Tirumala Naidu, Shreya Biswas, Rounak Chatterjee, Sayak Mandal, Srijan Pratihar, Ayan Chatterjee, Arnab Raha, Amitava Mukherjee, Janet Paluh |
SCENIC: An Area and Energy-Efficient CNN-based Hardware Accelerator for Discernable Classification of Brain Pathologies using MRI. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankit Gupta 0010, Adrita Barari, Damini, Keerthi Kiran Jagannathachar, Seungwoo Lee, Janghoon Oh, Jungha Kim, Min-Joo Kim |
Identifying Combination of Defects and Unknown Defects on Semiconductor Wafers using Deep Learning and Hierarchical Reclustering. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kalyan Baital, Amlan Chakrabarti, Biswadeep Chatterjee, Stefan Holst, Xiaoqing Wen |
Power and Energy Safe Real-Time Multi-Core Task Scheduling. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sachin Ramesh Pundkar, Surajit Pradeep Karmakar, Samir Kumar Mishra, Surendra Singh, Tushar Vrind |
Energy Aware Dynamic Load Balancer for Embedded Multi-core Systems. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | V. Naveen Chander, Kuruvilla Varghese |
A Soft RISC-V Vector Processor for Edge-AI. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | |
35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, VLSID 2022, Bangalore, India, February 26 - March 2, 2022 |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Srinivasa Prasad Soundararajan, Harry Gee, Adam Whitworth |
Parasitic Interactions with Intermediate Substrates and Methods to Mitigate their Impact: A Case Study in Voltage Protection ICs. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Akhilesh Rawat, Anjali Goel, Brajesh Rawat |
Role of Interface Trap Charges in the Performance of Monolayer and Bilayer MoS2-based Field-Effect Transistors. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia |
Robust Estimation of FPGA Resources and Performance from CNN Models. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Arpan Jain, Abhishek Pullela, Ashfakh Ali, Zia Abbas |
A 180o Phase Shift Biasing Technique for Realizing High PSRR in Low Power Temperature Sensors. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jayaraj U. Kidav, Akula Sri Rama Pavan, M. Rajesh, Navin Kumar |
A PC based Ultrasound back-end signal processor using Intel® Performance Primitives. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chandan Kumar, Rahul Kumar, Anuj Grover, Shouri Chatterjee, Kedar Janardan Dhori, Harsh Rawat |
Retention Problem Free High Density 4T SRAM cell with Adaptive Body Bias in 18nm FD-SOI. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Niraj Kumar 0004, Arijit Mondal |
Energy Optimized Non-preemptive Scheduling of Real-Time Tasks with Precedence and Reliability Constraints. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajath Vasudevamurthy |
Pulse-width Modulation Technique for Generation of Multiple Analog Voltages for On-chip Calibration. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sri Harsha Gade, Mitali Sinha, Madhur Kumar, Sujay Deb |
Scalable Hybrid Cache Coherence Using Emerging Links for Chiplet Architectures. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Javed S. Gaggatur, Miryala Chandra Shekar, Komal Deshmukh |
A 0.009mm2, 0-230mA Wide-range Load Current Output Capacitor-less Low Dropout Regulator for High Bandwidth Memory parallel IOs. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Dola Ram, Suraj Panwar, Kuruvilla Varghese |
Hardware Accelerator for Capsule Network based Reinforcement Learning. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta 0001, Debesh K. Das, Bhargab B. Bhattacharya |
Easily-Verifiable Design of Non-Scan Sequential Machines for Conformance Checking. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Michalis Piponidis, Panayiotis Aristodemou, Theocharis Theocharides |
Towards a Fully Autonomous UAV Controller for Moving Platform Detection and Landing. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Nisarga Ramesh, Javed S. Gaggatur |
A 0.6 V, 2nd order low-pass Gm-C filter using CMOS inverter-based tunable OTA with 1.114 GHz cut-off frequency in 90nm CMOS technology. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Debjyoti Bhattacharjee, Anirban Majumder, Anupam Chattopadhyay |
In-memory realization of SHA-2 using ReVAMP architecture. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Soham Roy, Spencer K. Millican, Vishwani D. Agrawal |
Training Neural Network for Machine Intelligence in Automatic Test Pattern Generator. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Ebrahimabadi, Mohamed F. Younis, Wassila Lalouani, Naghmeh Karimi |
A Novel Modeling-Attack Resilient Arbiter-PUF Design. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Miryala Chandra Shekar, Sandeep Goyal, Shalabh Gupta |
A 27S/32S DC-balanced line coding scheme for PAM-4 signaling. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanmitra Bharat Naik, Siddharth R. K., Anirban Chatterjee, Kumar Y. B. Nithin, M. H. Vasantha, Ramnath Kini |
A 1 V Double-Balanced Mixer for 2.4-2.5 GHz ISM Band Applications. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman 0001 |
Neural Network based Indirect Estimation of Functional Parameters of Amplifier by extracting features from Wavelet Transform. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Javed S. Gaggatur |
A 1.8 - 6.3 GHz Quadrature Ring VCO-based Fast-settling PLL for Wireline I/O in 55nm CMOS. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Prasad Kulkarni, Sahil Garg, Shubhi Agrawal, Maryam Shojaei Baghini |
Low Power Extended Range Multi-Modulus Divider Using True-Single-Phase-Clock Logic. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Katsuhiro Ichikawa, Shigeru Yamashita |
A Multiply Accumulator for Stochastic Numbers Without Scaling Errors. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek Tyagi, Vikas Rana |
Adaptive Forward Body Bias Voltage Generator. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Sharma 0002, Sudip Roy 0001 |
Optical Waveguide Channel Routing with Reduced Bend-Loss for Photonic Integrated Circuits. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Shashank Banchhor, Nitanshu Chauhan, Aditya Doneria, Bulusu Anand |
Gain Stabilization Methodology for FinFET Amplifiers Considering Self-Heating Effect. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Arnab Raha, Sang Kyun Kim, Deepak Mathaikutty, Guruguhanathan Venkataramanan, Debabrata Mohapatra, Raymond Sung, Cormac Brick, Gautham N. Chinya |
Design Considerations for Edge Neural Network Accelerators: An Industry Perspective. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Feraj Husain, Belal Iqbal, Anuj Grover |
A 0.4µA Offset, 6ns Sensing-time Multi-level Sense Amplifier for Resistive Non-Volatile Memories in 65nm LSTP Technology. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek Tyagi, Shivam Kalla, Vikas Rana |
Negative Voltage Generator and Current DAC Based Regulator For Flash Memory. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Noble Sebastian, Chavva Subbareddy, Immanuel Raja |
A 3.55 dB NF Ultra-Compact Noise-Optimized LNA for 5G mm-Wave Bands in 65nm CMOS. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sriharsha Enjapuri, Deepesh Gujjar, Sandipan Sinha, Ramesh Halli, Manish Trivedi |
A 5nm Wide Voltage Range Ultra High Density SRAM Design for L2/L3 Cache Applications. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Shubhankar Suman Singh, Smruti R. Sarangi |
ISAMod: A Tool for Designing ASIPs by Comparing Different ISAs. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Shyamali Mitra, Debojyoti Banerjee, Mrinal K. Naskar |
A Low Latency Stochastic Square Root Circuit. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayushparth Sharma, Kusum Lata |
Reconfigurable HW-SW Co-design Platform for Lung Cancer Detection and Classification. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Aniali Agrawal, Anand Singh, Ankit Gola, Hameedah Sultan, Smruti R. Sarangi |
A Fast Compact Thermal Model For Smart Phones. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Remya Ramakrishnan, Aditya K. V. Dev, Darshik A. S, Renuka Chinchwadkar, Madhura Purnaprajna |
Demystifying Compression Techniques in CNNs: CPU, GPU and FPGA cross-platform analysis. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Annarao Kulkarni, Shashikala Gunderao Pattanshetty, Aneesh Raveendran, David Selvakumar, Sandra Jean, Vivian Desalphine |
PositGen-A Verification Suite for Posit Arithmetic. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Subrata Das, Petr Fiser, Soumya Pandit, Debesh Kumar Das |
Minimization of Switching Activity of Graphene Based Circuits. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Hameedah Sultan, Smruti R. Sarangi |
Variability-Aware Thermal Simulation using CNNs. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Arun Mohan 0001, Saroj Mondal |
Challenges in Adoption of RF to DC Converter for Micro-Scale RF Energy Harvesting Systems. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Diksha Moolchandani, Geesara Prathap, Ilya Afanasyev 0001, Anshul Kumar, Manuel Mazzara, Smruti R. Sarangi |
Game Theory-Based Parameter-Tuning for Path Planning of UAVs. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | B. S. Ajay, Madhav Rao |
Binary neural network based real time emotion detection on an edge computing device to detect passenger anomaly. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Arghadip Das, Chandrachur Majumder, Debaprasad De, Arnab Raha, Mrinal Kanti Naskar |
HIPER: Low Power, High Performance and Area-Efficient Hardware Accelerators for Hidden Periodicity Detection using Ramanujan Filter Banks. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Shekhar Suman Borah, Ankur Singh, Mourina Ghosh |
A Novel Low-Power Electronically Tunable Higher-Order Quadrature Oscillator using CDBA. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Richa Sharma, G. K. Sharma 0001, Manisha Pattanaik |
A Few Shot Learning based Approach for Hardware Trojan Detection using Deep Siamese CNN. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | |
34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, VLSID 2021, Guwahati, India, February 20-24, 2021 |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen |
Deterministic Digital Calibration of 1.5 bits/stage Pipelined ADCs by Direct Extraction of Calibration Coefficients. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Dharmaray Nedalgi, Saroja V. Siddamal |
High Voltage Receiver Using Low Voltage Devices With Reduced Dead-zone. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Masoud Shahshahani, Mohammad Sabri, Bahareh Khabbazan, Dinesh Bhatia |
An Automated Tool for Implementing Deep Neural Networks on FPGA. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Pooja S. Shanbhag, Sujata Kotabagi, Priyanka Buduru, Pruthvi Benagi, S. Suma, Shraddha H |
Ring Oscillator with Improved Design. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Anirban Barman, Ashis Maity |
DC-DC Converter for Powering Micro-system Load in Energy Harvesting Front-ends. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sairam Sri Vatsavai, Ishan G. Thakkar |
Silicon Photonic Microring Based Chip-Scale Accelerator for Delayed Feedback Reservoir Computing. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ihsen Alouani, Anouar Ben Khalifa, Farhad Merchant, Rainer Leupers |
An Investigation on Inherent Robustness of Posit Data Representation. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | P. S. Babu, Snehashri Sivaraman, Deepa N. Sarma, Tripti S. Warrier |
Evaluation of Bit Manipulation Instructions in Optimization of Size and Speed in RISC-V. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Rounak Chatterjee, Souradeep Chowdhury, Soham Mondal, Arnab Raha, Janet Paluh, Amitava Mukherjee |
PreSyNC: Hardware realization of the Presynaptic Region of a Biologically Extensive Neuronal Circuitry. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Krashna Nand Mishra, Yogeshbhai Vallabhbhai Patel |
Creating Fastest Self timing Reference Path for High Speed Memory Designs. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Farhad Merchant, Dominik Sisejkovic, Lennart M. Reimann, Kirthihan Yasotharan, Thomas Grass, Rainer Leupers |
ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Niraj Kumar 0004, Arijit Mondal |
Online Optimization of Energy Consumption and Makespan for Active Replication based Scheduling Approaches for Real-time Systems. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnendu Guha, Amlan Chakrabarti, Krishna Paul, Biswadeep Chatterjee |
Criticality based Reduction of Security Costs in a FPGA based Cloud Computing Farm. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | P. Saravanan 0001, B. Syndia Priyadarshini, P. Vignesh Kanna, P. Vaishnavi |
Hardware Accelerator for Dual Standard Deblocking Filter. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Anish Reghunath, Mihir Mody, Hetul Sanghvi, Ankur |
Novel Census Transform Hardware IP. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Pandy Kalimuthu, Kanad Basu, Benjamin Carrión Schäfer |
Efficient Hierarchical Post-Silicon Validation and Debug. |
VLSID |
2021 |
DBLP DOI BibTeX RDF |
|
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