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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1775 occurrences of 908 keywords
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Results
Found 3437 publication records. Showing 3436 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
38 | Stuart F. Oberman |
Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia, pp. 106-115, 1999, IEEE Computer Society, 0-7695-0116-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
38 | R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili |
Power implications of precision limited arithmetic in floating point FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 165-168, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
38 | Jonathan Richard Shewchuk |
Adaptive Precision Floating-Point Arithmetic and Fast Robust Geometric Predicates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Comput. Geom. ![In: Discret. Comput. Geom. 18(3), pp. 305-368, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
38 | Barry S. Fagin, C. Renard |
Field programmable gate arrays and floating point arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 2(3), pp. 365-367, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
38 | Steve Carr 0001, Ken Kennedy |
Improving the Ratio of Memory Operations to Floating-Point Operations in Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 16(6), pp. 1768-1810, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
unroll-and-jam, balance |
38 | William D. Clinger |
How to Read Floating-Point Numbers Accurately. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'90 Conference on Programming Language Design and Implementation (PLDI), White Plains, New York, USA, June 20-22, 1990, pp. 92-101, 1990, ACM, 0-89791-364-7. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
38 | Harry W. Look |
Compatible software and hardware implementations permitted by IEEE standards for binary floating-point arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1984 National Computer Conference, 9-12 July 1984, Las Vegas, Nevada, USA, pp. 101-105, 1984, AFIPS Press, 0-88283-043-0. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
37 | Mahesh Bhat, John Crawford, Ricardo Morin, Kumar Shiv |
Performance Characterization of Decimal Arithmetic in Commercial Java Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 54-61, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
software decimal implementations, commercial Java workloads, binary floating-point numbers, special decimal representations, optimized hardware support, decimal math, BigDecimal class, scale manipulation, SPECjbb2005, SPECjAppServer2004, mission-critical financial workload, Trade Completion, hashing, performance characterization, decimal arithmetic, format conversion |
36 | Ivan Morel, Damien Stehlé, Gilles Villard |
H-LLL: using householder inside LLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSAC ![In: Symbolic and Algebraic Computation, International Symposium, ISSAC 2009, Seoul, Republic of Korea, July 29-31, 2009, Proceedings, pp. 271-278, 2009, ACM, 978-1-60558-609-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
householder's algorithm, floating-point arithmetic, lattice reduction, lll |
36 | Stephen F. Siegel, Anastasia Mironova, George S. Avrunin, Lori A. Clarke |
Combining symbolic execution with model checking to verify parallel numerical programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Softw. Eng. Methodol. ![In: ACM Trans. Softw. Eng. Methodol. 17(2), pp. 10:1-10:34, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
model checking, parallel programming, concurrency, MPI, Message Passing Interface, high performance computing, symbolic execution, floating-point, Spin, Finite-state verification, numerical program |
36 | Eric Goubault, Sylvie Putot, Philippe Baufreton, Jean Gassino |
Static Analysis of the Accuracy in Control Systems: Principles and Experiments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMICS ![In: Formal Methods for Industrial Critical Systems, 12th International Workshop, FMICS 2007, Berlin, Germany, July 1-2, 2007, Revised Selected Papers, pp. 3-20, 2007, Springer, 978-3-540-79706-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Static analysis, control systems, floating-point computations |
36 | Scott J. Campbell, Sunil P. Khatri |
Resource and delay efficient matrix multiplication using newer FPGA devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 308-311, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA, floating point, multiplier, matrix |
36 | Claire Fang Fang, Rob A. Rutenbar, Markus Püschel, Tsuhan Chen |
Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 496-501, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Static error analysis, custom floating-point, embedded hardware, probabilistic error bound, affine arithmetic |
36 | Matthieu Martel |
Propagation of Roundoff Errors in Finite Precision Computations: A Semantics Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESOP ![In: Programming Languages and Systems, 11th European Symposium on Programming, ESOP 2002, held as Part of the Joint European Conference on Theory and Practice of Software, ETAPS 2002, Grenoble, France, April 8-12, 2002, Proceedings, pp. 194-208, 2002, Springer, 3-540-43363-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
IEEE Standard 754, Abstract Interpretation, Floating-point Arithmetic, Numerical Precision |
35 | Vincent J. DiGri, Jane E. King |
The Share 709 System: Input-Output Translation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 6(2), pp. 141-144, 1959. The full citation details ...](Pics/full.jpeg) |
1959 |
DBLP DOI BibTeX RDF |
|
35 | Ghassem Jaberipur, Behrooz Parhami, Saeid Gorgin 0001 |
Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 59(5), pp. 694-706, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Adder/subtractor, redundant format, computer arithmetic, floating point, rounding, signed-digit number system |
35 | Kentaro Sano, Kazuya Katahira, Satoru Yamamoto |
Segment-Parallel Predictor for FPGA-Based Hardware Compressor and Decompressor of Floating-Point Data Streams to Enhance Memory I/O Bandwidth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCC ![In: 2010 Data Compression Conference (DCC 2010), 24-26 March 2010, Snowbird, UT, USA, pp. 416-425, 2010, IEEE Computer Society, 978-0-7695-3994-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
prediction-based compresson, hardware, floating point, memory bandwidth, lossless compression |
35 | Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler |
Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010, pp. 223-228, 2010, IEEE Computer Society, 978-0-7695-4024-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Memory-based floating-point numeric function generators, piecewise-split EVMDDs |
35 | Shailendra Jain, Vasantha Erraguntla, Sriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Tulasi Mandepudi, V. P. Karthik |
A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010, pp. 252-257, 2010, IEEE Computer Society, 978-0-7695-3928-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multiply-accumulate, Fused and continuous MAC, VLSI, Floating-point |
35 | Zheng-wei Hu, Dong-xing Duan, Zhi-yuan Xie, Xing Yang |
Pipeline Design of Transformation between Floating Point Numbers Based on IEEE754 Standard and 32-bit Integer Numbers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IITSI ![In: Second International Symposium on Intelligent Information Technology and Security Informatics, IITSI 2009, January 23-25, 2009, Moscow, Russia, pp. 92-96, 2009, IEEE Computer Society, 978-0-7695-3579-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ieee754 standard, floating-point data, pipeline, data transform |
35 | Taciano A. Rodolfo, Ney Laert Vilar Calazans, Fernando Gehm Moraes |
Floating Point Hardware for Embedded Processors in FPGAs: Design Space Exploration for Performance and Area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 24-29, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
floating point hardware, GALS design, FPGA, prototyping, embedded processor |
35 | Martin Langhammer, Tom VanCourt |
FPGA Floating Point Datapath Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: FCCM 2009, 17th IEEE Symposium on Field Programmable Custom Computing Machines, Napa, California, USA, 5-7 April 2009, Proceedings, pp. 259-262, 2009, IEEE Computer Society, 978-0-7695-3716-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
performance computing, optimization, FPGA, floating point |
35 | Michael DeLorimier, André DeHon |
Floating-point sparse matrix-vector multiply for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 75-85, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
compressed sparse row, FPGA, reconfigurable architecture, floating point, sparse matrix |
35 | Keith D. Underwood |
FPGAs vs. CPUs: trends in peak floating-point performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 171-180, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, supercomputing, floating point, trends |
35 | Romesh M. Jessani, Michael Putrino |
Comparison of Single- and Dual-Pass Multiply-Add Fused Floating-Point Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(9), pp. 927-936, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
multiply-add fused, multiply array, alignment shifter, sign encoding, Floating-point unit, Booth encoding |
35 | Stuart F. Oberman, Michael J. Flynn |
Design Issues in Division and Other Floating-Point Operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(2), pp. 154-161, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Benchmarks, computer arithmetic, multiplication, floating-point, division, system performance, square root |
35 | John K. Reid |
Remark on "Fast Floating-Point Processing in Common Lisp". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Math. Softw. ![In: ACM Trans. Math. Softw. 22(4), pp. 496-497, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Fortran, Fortran 90, Common Lisp, floating-point computation |
35 | Ronald J. Cosentino, John J. Vaccaro |
Adaptation of the Mactaggart and Jack Complex Multiplication Algorithm for Floating-Point Operators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(10), pp. 1324-1326, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
Mactaggart complex multiplication, Jack complex multiplication algorithm, floating-point operators, vector cross-products, digital arithmetic, matrix multiplication, hardware implementation |
35 | Osaaki Watanuki, Milos D. Ercegovac |
Error Analysis of Certain Floating-Point On-Line Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(4), pp. 352-358, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
redundant significand, Absolute error, floating-point on-line algorithm, maximum relative representation error, pseudo-normalized significand |
35 | David J. Kuck, Douglas Stott Parker Jr., Ahmed H. Sameh |
Analysis of Rounding Methods in Floating-Point Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 26(7), pp. 643-650, 1977. The full citation details ...](Pics/full.jpeg) |
1977 |
DBLP DOI BibTeX RDF |
guard digits, ROM rounding, rounding methods, Floating-point arithmetic |
35 | C. K. Yuen |
On the Floating Point Representation of Complex Numbers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 24(8), pp. 846-848, 1975. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
imaginary base, negative base, floating point, rounding errors, Complex numbers, number representation |
35 | Behzad Akbarpour, Sofiène Tahar, Abdelkader Dekdouk |
Formalization of Fixed-Point Arithmetic in HOL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 27(1-2), pp. 173-200, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
theorem-proving, floating-point arithmetic, fixed-point arithmetic, HOL |
33 | William George Osborne, Ray C. C. Cheung, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer |
Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 617-620, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
33 | Rafiahamed Shaik, Mrityunjoy Chakraborty |
An Efficient Realization of the Decision Feedback Equalizer using Block Floating Point Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1047-1050, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Holger Keding, Markus Willems, Martin Coors, Heinrich Meyr |
FRIDGE: A Fixed-Point Design and Simulation Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 429-435, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
FRIDGE, interpolative approach, fixed-C, assignment-time instantiation, simulation, design, interpolation, quantization, fixed-point |
33 | Lutz Kettner, Kurt Mehlhorn, Sylvain Pion, Stefan Schirra, Chee-Keng Yap |
Reply to "Backward Error Analysis ...". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (1) ![In: Computational Science and Its Applications - ICCSA 2006, International Conference, Glasgow, UK, May 8-11, 2006, Proceedings, Part I, pp. 60-60, 2006, Springer, 3-540-34070-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Chuan He, Guan Qin, Mi Lu, Wei Zhao 0001 |
An Efficient Implementation of High-Accuracy Finite Difference Computing Engine on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 95-98, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung |
Automating custom-precision function evaluation for embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005, pp. 22-31, 2005, ACM, 1-59593-149-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
embedded systems, reconfigurable computing, fixed-point arithmetic, function evaluation |
33 | John N. Coleman, E. I. Chester, Christopher I. Softley, Jiri Kadlec |
Arithmetic on the European Logarithmic Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(7), pp. 702-715, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
interpolation, Digital arithmetic, logarithmic number system |
32 | Stefan Funke |
Of What Use Is Floating-Point Arithmetic in Computational Geometry? ![Search on Bibsonomy](Pics/bibsonomy.png) |
Efficient Algorithms ![In: Efficient Algorithms, Essays Dedicated to Kurt Mehlhorn on the Occasion of His 60th Birthday, pp. 341-354, 2009, Springer, 978-3-642-03455-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
32 | Gokul Govindu, Ling Zhuo, Seonil Choi, Viktor K. Prasanna |
Analysis of High-Performance Floating-Point Arithmetic on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Gokul Govindu, Seonil Choi, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar |
A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Manhwee Jo, Ganghee Lee, Kyungwook Chang, Kyuseung Han, Kiyoung Choi, Hoonmo Yang, Kiwook Yoon |
Coarse-grained reconfigurable architecture for multiple application domains: a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICHIT ![In: Proceedings of the 2009 International Conference on Hybrid Information Technology, ICHIT 2009, Daejeon, Korea, August 27-29, 2009, pp. 546-553, 2009, ACM, 978-1-60558-662-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
system design, coarse-grained reconfigurable architecture |
31 | Yonghee You, Mee Young Sung |
Haptic Data Transmission Based on the Prediction and Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICC ![In: Proceedings of IEEE International Conference on Communications, ICC 2008, Beijing, China, 19-23 May 2008, pp. 1824-1828, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | David Boland, George A. Constantinides |
An FPGA-based implementation of the MINRES algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 379-384, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Ling Zhuo, Viktor K. Prasanna |
High-Performance and Area-Efficient Reduction Circuits on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 24-27 October 2005, Rio de Janeiro, Brazil, pp. 52-59, 2005, IEEE Computer Society, 0-7695-2446-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Andreas Moshovos, Gurindar S. Sohi |
Reducing Memory Latency via Read-after-Read Memory Dependence Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(3), pp. 313-326, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
memory dependence prediction, cache, dynamic optimization, load |
31 | J Strother Moore |
Functional formal methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceedings of the Seventh ACM SIGPLAN International Conference on Functional Programming (ICFP '02), Pittsburgh, Pennsylvania, USA, October 4-6, 2002., pp. 123, 2002, ACM, 1-58113-487-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
functional programming, Java Virtual Machine, microarchitecture, software verification, Common Lisp, hardware verification, mechanical theorem proving |
31 | Victor Milenkovic |
Shortest Path Geometric Rounding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algorithmica ![In: Algorithmica 27(1), pp. 57-86, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Robust geometry, Numerical issues, Computational geometry, Numerical analysis, Rounding |
31 | Michael J. Schulte, Earl E. Swartzlander Jr. |
A Processor for Staggered Interval Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: The International Conference on Application Specific Array Processors (ASAP'95), July 24-26, 1995, Strasbourg, France, pp. 104-112, 1995, IEEE Computer Society, 0-8186-7109-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
computer arithmetic, hardware, processor, Interval arithmetic, precision, application specific, numerical computations |
30 | Jim Rasmusson, Jacob Ström, Tomas Akenine-Möller |
Error-bounded lossy compression of floating-point color buffers using quadtree decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 26(1), pp. 17-30, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Color buffer compression, Real-time, Quadtree, High dynamic range, Lossy compression, Texture compression |
30 | Virgil E. Petcu, Alexandru Amaricai, Mircea Vladutiu |
A Dual-Threaded Architecture for Interval Arithmetic Coprocessor with Shared Floating Point Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 146-149, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Jie Zhou 0007, Yong Dou, Yuanwu Lei, Yazhuo Dong |
Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings, pp. 254-259, 2008, Springer, 978-3-540-78609-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Zhi-Jian Sun, Xue-Mei Liu |
Application of Floating Point DSP and FPGA in Integration Navigation System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSSE (4) ![In: International Conference on Computer Science and Software Engineering, CSSE 2008, Volume 4: Embedded Programming / Database Technology / Neural Networks and Applications / Other Applications, December 12-14, 2008, Wuhan, China, pp. 58-61, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Alexandru Amaricai, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan, Oana Boncalo |
Floating point multiplication rounding schemes for interval arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008, Leuven, Belgium, pp. 19-24, 2008, IEEE Computer Society, 978-1-4244-1897-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Saroja V. Siddamal, R. M. Banakar, B. C. Jinaga |
Design of High-Speed Floating Point Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 285-289, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
FP operations, Fast Carry look ahead adder (MCLA), CSD algorithm, Booth algorithm |
30 | K. Scott Hemmert, Keith D. Underwood |
Floating-Point Divider Design for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(1), pp. 115-118, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Ling Zhuo, Viktor K. Prasanna |
Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(4), pp. 433-448, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
computations on matrices, field-programmable gate arrays, parallel algorithms, Scientific computing, reconfigurable hardware |
30 | Jérémie Detrey, Florent de Dinechin |
Floating-Point Trigonometric Functions for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 29-34, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Chun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton |
Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 196-201, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Sylvie Boldo, Jean-Christophe Filliâtre |
Formal Verification of Floating-Point Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 25-27 June 2007, Montpellier, France, pp. 187-194, 2007, IEEE Computer Society, 0-7695-2854-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Liang-Kai Wang, Charles Tsen, Michael J. Schulte, Divya Jhalani |
Benchmarks and performance analysis of decimal floating-point applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 164-170, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Michael J. Schulte, Dimitri Tan, Carl Lemonds |
Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 304-310, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen |
A Compact DSP Core with Static Floating-Point Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 42(2), pp. 127-138, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Caroline Collange, Jérémie Detrey, Florent de Dinechin |
Floating Point or LNS: Choosing the Right Arithmetic on an Aapplication Basis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 197-203, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Pedro C. Diniz, Gokul Govindu |
Design of a Field-Programmable Dual-Precision Floating-Point Arithmetic Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Owen Callanan, David Gregg, Andy Nisbet, Mike Peardon |
High Performance Scientific Computing Using FPGAs with IEEE Floating Point and Logarithmic Arithmetic for Lattice QCD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Paruj Ratanaworabhan, Jian Ke, Martin Burtscher |
Fast Lossless Compression of Scientific Floating-Point Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCC ![In: 2006 Data Compression Conference (DCC 2006), 28-30 March 2006, Snowbird, UT, USA, pp. 133-142, 2006, IEEE Computer Society, 0-7695-2545-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Michael R. Bodnar, John R. Humphrey, Petersen F. Curt, James P. Durbano, Dennis W. Prather |
Floating-Point Accumulation Circuit for Matrix Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 24-26 April 2006, Napa, CA, USA, Proceedings, pp. 303-304, 2006, IEEE Computer Society, 0-7695-2661-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Sylvie Boldo |
Pitfalls of a Full Floating-Point Proof: Example on the Formal Proof of the Veltkamp/Dekker Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCAR ![In: Automated Reasoning, Third International Joint Conference, IJCAR 2006, Seattle, WA, USA, August 17-20, 2006, Proceedings, pp. 52-66, 2006, Springer, 3-540-37187-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Hank G. Dietz, Bill Dieter, Randy Fisher, Kungyen Chang |
Floating-Point Computation with Just Enough Accuracy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (1) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part I, pp. 226-233, 2006, Springer, 3-540-34379-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | J. A. P. Reyes, Louis P. Alarcón, L. Alarilla Jr. |
A study of floating-point architectures for pipelined RISC processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Neil Burgess |
Prenormalization rounding in IEEE floating-point operations using a flagged prefix adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(2), pp. 266-277, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Carlos Álvarez 0001, Jesús Corbal, Mateo Valero |
Fuzzy Memoization for Floating-Point Multimedia Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(7), pp. 922-927, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Low-power design, real-time and embedded systems, special-purpose and application-based systems |
30 | Chi Huang, Xinyu Wu, Jinmei Lai, Chengshou Sun, Gang Li |
A design of high speed double precision floating point adder using macro modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 11-12, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Peter-Michael Seidel |
High-Radix Implementation of IEEE Floating-Point Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 27-29 June 2005, Cape Cod, MA, USA, pp. 99-106, 2005, IEEE Computer Society, 0-7695-2366-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Michael Haselman, Michael J. Beauchamp, Aaron Wood, Scott Hauck, Keith D. Underwood, K. Scott Hemmert |
A Comparison of Floating Point and Logarithmic Number Systems for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 181-190, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis |
Test Generation Methodology for High-Speed Floating Point Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 6-8 July 2005, Saint Raphael, France, pp. 227-232, 2005, IEEE Computer Society, 0-7695-2406-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Sylvie Boldo, Marc Daumas |
Properties of two's complement floating point notations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 5(2-3), pp. 237-246, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Digital signal processing, Avionics, Formal proof |
30 | Leonardo R. Bachega, Siddhartha Chatterjee, Kenneth A. Dockser, John A. Gunnels, Manish Gupta 0002, Fred G. Gustavson, Christopher A. Lapkowski, Gary K. Liu, Mark P. Mendell, Charles D. Wait, T. J. Christopher Ward |
A High-Performance SIMD Floating Point Unit for BlueGene/L: Architecture, Compilation, and Algorithm Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September - 3 October 2004, Antibes Juan-les-Pins, France, pp. 85-96, 2004, IEEE Computer Society, 0-7695-2229-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Antoine Miné |
Relational Abstract Domains for the Detection of Floating-Point Run-Time Errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESOP ![In: Programming Languages and Systems, 13th European Symposium on Programming, ESOP 2004, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2004, Barcelona, Spain, March 29 - April 2, 2004, Proceedings, pp. 3-17, 2004, Springer, 3-540-21313-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Andras Frankel, Doron Nussbaum, Jörg-Rüdiger Sack |
Floating-Point Filter for the Line Intersection Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GIScience ![In: Geographic Information Science, Third International Conference, GIScience 2004, Adelphi, MD, USA, October 20-23, 2004, Proceedings, pp. 94-105, 2004, Springer, 3-540-23558-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Sylvie Putot, Eric Goubault, Matthieu Martel |
Static Analysis-Based Validation of Floating-Point Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Numerical Software with Result Verification ![In: Numerical Software with Result Verification, International Dagstuhl Seminar, Dagstuhl Castle, Germany, January 19-24, 2003, Revised Papers, pp. 306-313, 2003, Springer, 3-540-21260-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Hossam A. H. Fahmy, Michael J. Flynn |
The Case for a Redundant Format in Floating Point Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 15-18 June 2003, Santiago de Compostela, Spain, pp. 95-, 2003, IEEE Computer Society, 0-7695-1894-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Cristina Iordache, Ping Tak Peter Tang |
An Overview of Floating-Point Support and Math Library on the Intel XScaleTM Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 15-18 June 2003, Santiago de Compostela, Spain, pp. 122-128, 2003, IEEE Computer Society, 0-7695-1894-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Xiaojun Wang, Brent E. Nelson |
Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 8-11 April 2003, Napa, CA, USA, Proceedings, pp. 195-, 2003, IEEE Computer Society, 0-7695-1979-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Eric Goubault, Matthieu Martel, Sylvie Putot |
Asserting the Precision of Floating-Point Computations: A Simple Abstract Interpreter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESOP ![In: Programming Languages and Systems, 11th European Symposium on Programming, ESOP 2002, held as Part of the Joint European Conference on Theory and Practice of Software, ETAPS 2002, Grenoble, France, April 8-12, 2002, Proceedings, pp. 209-212, 2002, Springer, 3-540-43363-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
30 | Tomás Lang, Javier D. Bruguera |
Floating-Point Fused Multiply-Add with Reduced Latency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 145-, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
30 | Marc Daumas, Laurence Rideau, Laurent Théry |
A Generic Library for Floating-Point Numbers and Its Application to Exact Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TPHOLs ![In: Theorem Proving in Higher Order Logics, 14th International Conference, TPHOLs 2001, Edinburgh, Scotland, UK, September 3-6, 2001, Proceedings, pp. 169-184, 2001, Springer, 3-540-42525-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Lee D. McFearin, David W. Matula |
Generation and Analysis of Hard to Round Cases for Binary Floating Point Division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 11-17 June 2001, Vail, CO, USA, pp. 119-127, 2001, IEEE Computer Society, 0-7695-1150-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Johan Piper, Jiren Yuan |
Realization of a floating-point A/D converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 404-407, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Chia-Lin Yang, Barton Sano, Alvin R. Lebeck |
Exploiting Parallelism in Geometry Processing with General Purpose Processors and Floating-Point SIMD Instructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(9), pp. 934-946, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
geometry pipeline, paired-single instructions, 3D graphics, superscalar processors, SIMD instructions |
30 | Hiroomi Hikawa |
Pulse Mode Multilayer Neural Network with Floating Point Operation and On-Chip Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN (2) ![In: Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, IJCNN 2000, Neural Computing: New Challenges and Perspectives for the New Millennium, Como, Italy, July 24-27, 2000, Volume 2, pp. 71-80, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | John Harrison 0001 |
Formal Verification of Floating Point Trigonometric Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, Third International Conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings, pp. 217-233, 2000, Springer, 3-540-41219-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | Marc Daumas |
Multiplications of Floating Point Expansions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia, pp. 250-257, 1999, IEEE Computer Society, 0-7695-0116-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Guenter Gerwig, Michael Kroener |
Floating-Point Unit in Standard Cell Design with 116 Bit Wide Dataflow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia, pp. 266-, 1999, IEEE Computer Society, 0-7695-0116-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Fred G. Gustavson, José E. Moreira, Robert F. Enenkel |
The fused multiply-add instruction leads to algorithms for extended-precision floating point: applications to java and high-performance computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Proceedings of the 1999 conference of the Centre for Advanced Studies on Collaborative Research, November 8-11, 1999, Mississauga, Ontario, Canada, pp. 4, 1999, IBM. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
Java |
30 | Walter B. Ligon III, Scott McMillan, Greg Monn, Kevin Schoonover, Fred Stivers, Keith D. Underwood |
A Re-evaluation of the Practicality of Floating-Point Operations on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 15-17 April 1998, Napa Valley, CA, USA, pp. 206-215, 1998, IEEE Computer Society, 0-8186-8900-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
30 | Peter-Michael Seidel |
How to Half the Latency of IEEE Compliant Floating-Point Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 24th EUROMICRO '98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden, pp. 10329-10332, 1998, IEEE Computer Society, 0-8186-8646-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
30 | John Harrison 0001 |
Floating Point Verification in HOL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TPHOLs ![In: Higher Order Logic Theorem Proving and Its Applications, 8th International Workshop, Aspen Grove, UT, USA, September 11-14, 1995, Proceedings, pp. 186-199, 1995, Springer, 3-540-60275-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
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