Search results for "floating-point"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
38	Stuart F. Oberman	Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
38	R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili	Power implications of precision limited arithmetic in floating point FIR filters.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
38	Jonathan Richard Shewchuk	Adaptive Precision Floating-Point Arithmetic and Fast Robust Geometric Predicates.	Discret. Comput. Geom.	1997	DBLP DOI BibTeX RDF
38	Barry S. Fagin, C. Renard	Field programmable gate arrays and floating point arithmetic.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
38	Steve Carr 0001, Ken Kennedy	Improving the Ratio of Memory Operations to Floating-Point Operations in Loops.	ACM Trans. Program. Lang. Syst.	1994	DBLP DOI BibTeX RDF	unroll-and-jam, balance
38	William D. Clinger	How to Read Floating-Point Numbers Accurately.	PLDI	1990	DBLP DOI BibTeX RDF
38	Harry W. Look	Compatible software and hardware implementations permitted by IEEE standards for binary floating-point arithmetic.	AFIPS National Computer Conference	1984	DBLP DOI BibTeX RDF
37	Mahesh Bhat, John Crawford, Ricardo Morin, Kumar Shiv	Performance Characterization of Decimal Arithmetic in Commercial Java Workloads.	ISPASS	2007	DBLP DOI BibTeX RDF	software decimal implementations, commercial Java workloads, binary floating-point numbers, special decimal representations, optimized hardware support, decimal math, BigDecimal class, scale manipulation, SPECjbb2005, SPECjAppServer2004, mission-critical financial workload, Trade Completion, hashing, performance characterization, decimal arithmetic, format conversion
36	Ivan Morel, Damien Stehlé, Gilles Villard	H-LLL: using householder inside LLL.	ISSAC	2009	DBLP DOI BibTeX RDF	householder's algorithm, floating-point arithmetic, lattice reduction, lll
36	Stephen F. Siegel, Anastasia Mironova, George S. Avrunin, Lori A. Clarke	Combining symbolic execution with model checking to verify parallel numerical programs.	ACM Trans. Softw. Eng. Methodol.	2008	DBLP DOI BibTeX RDF	model checking, parallel programming, concurrency, MPI, Message Passing Interface, high performance computing, symbolic execution, floating-point, Spin, Finite-state verification, numerical program
36	Eric Goubault, Sylvie Putot, Philippe Baufreton, Jean Gassino	Static Analysis of the Accuracy in Control Systems: Principles and Experiments.	FMICS	2007	DBLP DOI BibTeX RDF	Static analysis, control systems, floating-point computations
36	Scott J. Campbell, Sunil P. Khatri	Resource and delay efficient matrix multiplication using newer FPGA devices.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	FPGA, floating point, multiplier, matrix
36	Claire Fang Fang, Rob A. Rutenbar, Markus Püschel, Tsuhan Chen	Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling.	DAC	2003	DBLP DOI BibTeX RDF	Static error analysis, custom floating-point, embedded hardware, probabilistic error bound, affine arithmetic
36	Matthieu Martel	Propagation of Roundoff Errors in Finite Precision Computations: A Semantics Approach.	ESOP	2002	DBLP DOI BibTeX RDF	IEEE Standard 754, Abstract Interpretation, Floating-point Arithmetic, Numerical Precision
35	Vincent J. DiGri, Jane E. King	The Share 709 System: Input-Output Translation.	J. ACM	1959	DBLP DOI BibTeX RDF
35	Ghassem Jaberipur, Behrooz Parhami, Saeid Gorgin 0001	Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF	Adder/subtractor, redundant format, computer arithmetic, floating point, rounding, signed-digit number system
35	Kentaro Sano, Kazuya Katahira, Satoru Yamamoto	Segment-Parallel Predictor for FPGA-Based Hardware Compressor and Decompressor of Floating-Point Data Streams to Enhance Memory I/O Bandwidth.	DCC	2010	DBLP DOI BibTeX RDF	prediction-based compresson, hardware, floating point, memory bandwidth, lossless compression
35	Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler	Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs.	ISMVL	2010	DBLP DOI BibTeX RDF	Memory-based floating-point numeric function generators, piecewise-split EVMDDs
35	Shailendra Jain, Vasantha Erraguntla, Sriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Tulasi Mandepudi, V. P. Karthik	A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm.	VLSI Design	2010	DBLP DOI BibTeX RDF	multiply-accumulate, Fused and continuous MAC, VLSI, Floating-point
35	Zheng-wei Hu, Dong-xing Duan, Zhi-yuan Xie, Xing Yang	Pipeline Design of Transformation between Floating Point Numbers Based on IEEE754 Standard and 32-bit Integer Numbers.	IITSI	2009	DBLP DOI BibTeX RDF	ieee754 standard, floating-point data, pipeline, data transform
35	Taciano A. Rodolfo, Ney Laert Vilar Calazans, Fernando Gehm Moraes	Floating Point Hardware for Embedded Processors in FPGAs: Design Space Exploration for Performance and Area.	ReConFig	2009	DBLP DOI BibTeX RDF	floating point hardware, GALS design, FPGA, prototyping, embedded processor
35	Martin Langhammer, Tom VanCourt	FPGA Floating Point Datapath Compiler.	FCCM	2009	DBLP DOI BibTeX RDF	performance computing, optimization, FPGA, floating point
35	Michael DeLorimier, André DeHon	Floating-point sparse matrix-vector multiply for FPGAs.	FPGA	2005	DBLP DOI BibTeX RDF	compressed sparse row, FPGA, reconfigurable architecture, floating point, sparse matrix
35	Keith D. Underwood	FPGAs vs. CPUs: trends in peak floating-point performance.	FPGA	2004	DBLP DOI BibTeX RDF	FPGA, supercomputing, floating point, trends
35	Romesh M. Jessani, Michael Putrino	Comparison of Single- and Dual-Pass Multiply-Add Fused Floating-Point Units.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	multiply-add fused, multiply array, alignment shifter, sign encoding, Floating-point unit, Booth encoding
35	Stuart F. Oberman, Michael J. Flynn	Design Issues in Division and Other Floating-Point Operations.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF	Benchmarks, computer arithmetic, multiplication, floating-point, division, system performance, square root
35	John K. Reid	Remark on "Fast Floating-Point Processing in Common Lisp".	ACM Trans. Math. Softw.	1996	DBLP DOI BibTeX RDF	Fortran, Fortran 90, Common Lisp, floating-point computation
35	Ronald J. Cosentino, John J. Vaccaro	Adaptation of the Mactaggart and Jack Complex Multiplication Algorithm for Floating-Point Operators.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	Mactaggart complex multiplication, Jack complex multiplication algorithm, floating-point operators, vector cross-products, digital arithmetic, matrix multiplication, hardware implementation
35	Osaaki Watanuki, Milos D. Ercegovac	Error Analysis of Certain Floating-Point On-Line Algorithms.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF	redundant significand, Absolute error, floating-point on-line algorithm, maximum relative representation error, pseudo-normalized significand
35	David J. Kuck, Douglas Stott Parker Jr., Ahmed H. Sameh	Analysis of Rounding Methods in Floating-Point Arithmetic.	IEEE Trans. Computers	1977	DBLP DOI BibTeX RDF	guard digits, ROM rounding, rounding methods, Floating-point arithmetic
35	C. K. Yuen	On the Floating Point Representation of Complex Numbers.	IEEE Trans. Computers	1975	DBLP DOI BibTeX RDF	imaginary base, negative base, floating point, rounding errors, Complex numbers, number representation
35	Behzad Akbarpour, Sofiène Tahar, Abdelkader Dekdouk	Formalization of Fixed-Point Arithmetic in HOL.	Formal Methods Syst. Des.	2005	DBLP DOI BibTeX RDF	theorem-proving, floating-point arithmetic, fixed-point arithmetic, HOL
33	William George Osborne, Ray C. C. Cheung, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer	Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems.	FPL	2007	DBLP DOI BibTeX RDF
33	Rafiahamed Shaik, Mrityunjoy Chakraborty	An Efficient Realization of the Decision Feedback Equalizer using Block Floating Point Arithmetic.	APCCAS	2006	DBLP DOI BibTeX RDF
33	Holger Keding, Markus Willems, Martin Coors, Heinrich Meyr	FRIDGE: A Fixed-Point Design and Simulation Environment.	DATE	1998	DBLP DOI BibTeX RDF	FRIDGE, interpolative approach, fixed-C, assignment-time instantiation, simulation, design, interpolation, quantization, fixed-point
33	Lutz Kettner, Kurt Mehlhorn, Sylvain Pion, Stefan Schirra, Chee-Keng Yap	Reply to "Backward Error Analysis ...".	ICCSA (1)	2006	DBLP DOI BibTeX RDF
33	Chuan He, Guan Qin, Mi Lu, Wei Zhao 0001	An Efficient Implementation of High-Accuracy Finite Difference Computing Engine on FPGAs.	ASAP	2006	DBLP DOI BibTeX RDF
33	Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung	Automating custom-precision function evaluation for embedded processors.	CASES	2005	DBLP DOI BibTeX RDF	embedded systems, reconfigurable computing, fixed-point arithmetic, function evaluation
33	John N. Coleman, E. I. Chester, Christopher I. Softley, Jiri Kadlec	Arithmetic on the European Logarithmic Microprocessor.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	interpolation, Digital arithmetic, logarithmic number system
32	Stefan Funke	Of What Use Is Floating-Point Arithmetic in Computational Geometry?	Efficient Algorithms	2009	DBLP DOI BibTeX RDF
32	Gokul Govindu, Ling Zhuo, Seonil Choi, Viktor K. Prasanna	Analysis of High-Performance Floating-Point Arithmetic on FPGAs.	IPDPS	2004	DBLP DOI BibTeX RDF
32	Gokul Govindu, Seonil Choi, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar	A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs.	IPDPS	2004	DBLP DOI BibTeX RDF
31	Manhwee Jo, Ganghee Lee, Kyungwook Chang, Kyuseung Han, Kiyoung Choi, Hoonmo Yang, Kiwook Yoon	Coarse-grained reconfigurable architecture for multiple application domains: a case study.	ICHIT	2009	DBLP DOI BibTeX RDF	system design, coarse-grained reconfigurable architecture
31	Yonghee You, Mee Young Sung	Haptic Data Transmission Based on the Prediction and Compression.	ICC	2008	DBLP DOI BibTeX RDF
31	David Boland, George A. Constantinides	An FPGA-based implementation of the MINRES algorithm.	FPL	2008	DBLP DOI BibTeX RDF
31	Ling Zhuo, Viktor K. Prasanna	High-Performance and Area-Efficient Reduction Circuits on FPGAs.	SBAC-PAD	2005	DBLP DOI BibTeX RDF
31	Andreas Moshovos, Gurindar S. Sohi	Reducing Memory Latency via Read-after-Read Memory Dependence Prediction.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	memory dependence prediction, cache, dynamic optimization, load
31	J Strother Moore	Functional formal methods.	ICFP	2002	DBLP DOI BibTeX RDF	functional programming, Java Virtual Machine, microarchitecture, software verification, Common Lisp, hardware verification, mechanical theorem proving
31	Victor Milenkovic	Shortest Path Geometric Rounding.	Algorithmica	2000	DBLP DOI BibTeX RDF	Robust geometry, Numerical issues, Computational geometry, Numerical analysis, Rounding
31	Michael J. Schulte, Earl E. Swartzlander Jr.	A Processor for Staggered Interval Arithmetic.	ASAP	1995	DBLP DOI BibTeX RDF	computer arithmetic, hardware, processor, Interval arithmetic, precision, application specific, numerical computations
30	Jim Rasmusson, Jacob Ström, Tomas Akenine-Möller	Error-bounded lossy compression of floating-point color buffers using quadtree decomposition.	Vis. Comput.	2010	DBLP DOI BibTeX RDF	Color buffer compression, Real-time, Quadtree, High dynamic range, Lossy compression, Texture compression
30	Virgil E. Petcu, Alexandru Amaricai, Mircea Vladutiu	A Dual-Threaded Architecture for Interval Arithmetic Coprocessor with Shared Floating Point Units.	DDECS	2008	DBLP DOI BibTeX RDF
30	Jie Zhou 0007, Yong Dou, Yuanwu Lei, Yazhuo Dong	Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.	ARC	2008	DBLP DOI BibTeX RDF
30	Zhi-Jian Sun, Xue-Mei Liu	Application of Floating Point DSP and FPGA in Integration Navigation System.	CSSE (4)	2008	DBLP DOI BibTeX RDF
30	Alexandru Amaricai, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan, Oana Boncalo	Floating point multiplication rounding schemes for interval arithmetic.	ASAP	2008	DBLP DOI BibTeX RDF
30	Saroja V. Siddamal, R. M. Banakar, B. C. Jinaga	Design of High-Speed Floating Point Multiplier.	DELTA	2008	DBLP DOI BibTeX RDF	FP operations, Fast Carry look ahead adder (MCLA), CSD algorithm, Booth algorithm
30	K. Scott Hemmert, Keith D. Underwood	Floating-Point Divider Design for FPGAs.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
30	Ling Zhuo, Viktor K. Prasanna	Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	computations on matrices, field-programmable gate arrays, parallel algorithms, Scientific computing, reconfigurable hardware
30	Jérémie Detrey, Florent de Dinechin	Floating-Point Trigonometric Functions for FPGAs.	FPL	2007	DBLP DOI BibTeX RDF
30	Chun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton	Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications.	FPL	2007	DBLP DOI BibTeX RDF
30	Sylvie Boldo, Jean-Christophe Filliâtre	Formal Verification of Floating-Point Programs.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
30	Liang-Kai Wang, Charles Tsen, Michael J. Schulte, Divya Jhalani	Benchmarks and performance analysis of decimal floating-point applications.	ICCD	2007	DBLP DOI BibTeX RDF
30	Michael J. Schulte, Dimitri Tan, Carl Lemonds	Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier.	ICCD	2007	DBLP DOI BibTeX RDF
30	Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen	A Compact DSP Core with Static Floating-Point Arithmetic.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF
30	Caroline Collange, Jérémie Detrey, Florent de Dinechin	Floating Point or LNS: Choosing the Right Arithmetic on an Aapplication Basis.	DSD	2006	DBLP DOI BibTeX RDF
30	Pedro C. Diniz, Gokul Govindu	Design of a Field-Programmable Dual-Precision Floating-Point Arithmetic Unit.	FPL	2006	DBLP DOI BibTeX RDF
30	Owen Callanan, David Gregg, Andy Nisbet, Mike Peardon	High Performance Scientific Computing Using FPGAs with IEEE Floating Point and Logarithmic Arithmetic for Lattice QCD.	FPL	2006	DBLP DOI BibTeX RDF
30	Paruj Ratanaworabhan, Jian Ke, Martin Burtscher	Fast Lossless Compression of Scientific Floating-Point Data.	DCC	2006	DBLP DOI BibTeX RDF
30	Michael R. Bodnar, John R. Humphrey, Petersen F. Curt, James P. Durbano, Dennis W. Prather	Floating-Point Accumulation Circuit for Matrix Applications.	FCCM	2006	DBLP DOI BibTeX RDF
30	Sylvie Boldo	Pitfalls of a Full Floating-Point Proof: Example on the Formal Proof of the Veltkamp/Dekker Algorithms.	IJCAR	2006	DBLP DOI BibTeX RDF
30	Hank G. Dietz, Bill Dieter, Randy Fisher, Kungyen Chang	Floating-Point Computation with Just Enough Accuracy.	International Conference on Computational Science (1)	2006	DBLP DOI BibTeX RDF
30	J. A. P. Reyes, Louis P. Alarcón, L. Alarilla Jr.	A study of floating-point architectures for pipelined RISC processors.	ISCAS	2006	DBLP DOI BibTeX RDF
30	Neil Burgess	Prenormalization rounding in IEEE floating-point operations using a flagged prefix adder.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
30	Carlos Álvarez 0001, Jesús Corbal, Mateo Valero	Fuzzy Memoization for Floating-Point Multimedia Applications.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Low-power design, real-time and embedded systems, special-purpose and application-based systems
30	Chi Huang, Xinyu Wu, Jinmei Lai, Chengshou Sun, Gang Li	A design of high speed double precision floating point adder using macro modules.	ASP-DAC	2005	DBLP DOI BibTeX RDF
30	Peter-Michael Seidel	High-Radix Implementation of IEEE Floating-Point Addition.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
30	Michael Haselman, Michael J. Beauchamp, Aaron Wood, Scott Hauck, Keith D. Underwood, K. Scott Hemmert	A Comparison of Floating Point and Logarithmic Number Systems for FPGAs.	FCCM	2005	DBLP DOI BibTeX RDF
30	George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis	Test Generation Methodology for High-Speed Floating Point Adders.	IOLTS	2005	DBLP DOI BibTeX RDF
30	Sylvie Boldo, Marc Daumas	Properties of two's complement floating point notations.	Int. J. Softw. Tools Technol. Transf.	2004	DBLP DOI BibTeX RDF	Digital signal processing, Avionics, Formal proof
30	Leonardo R. Bachega, Siddhartha Chatterjee, Kenneth A. Dockser, John A. Gunnels, Manish Gupta 0002, Fred G. Gustavson, Christopher A. Lapkowski, Gary K. Liu, Mark P. Mendell, Charles D. Wait, T. J. Christopher Ward	A High-Performance SIMD Floating Point Unit for BlueGene/L: Architecture, Compilation, and Algorithm Design.	IEEE PACT	2004	DBLP DOI BibTeX RDF
30	Antoine Miné	Relational Abstract Domains for the Detection of Floating-Point Run-Time Errors.	ESOP	2004	DBLP DOI BibTeX RDF
30	Andras Frankel, Doron Nussbaum, Jörg-Rüdiger Sack	Floating-Point Filter for the Line Intersection Algorithm.	GIScience	2004	DBLP DOI BibTeX RDF
30	Sylvie Putot, Eric Goubault, Matthieu Martel	Static Analysis-Based Validation of Floating-Point Computations.	Numerical Software with Result Verification	2003	DBLP DOI BibTeX RDF
30	Hossam A. H. Fahmy, Michael J. Flynn	The Case for a Redundant Format in Floating Point Arithmetic.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
30	Cristina Iordache, Ping Tak Peter Tang	An Overview of Floating-Point Support and Math Library on the Intel XScaleTM Architecture.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
30	Xiaojun Wang, Brent E. Nelson	Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs.	FCCM	2003	DBLP DOI BibTeX RDF
30	Eric Goubault, Matthieu Martel, Sylvie Putot	Asserting the Precision of Floating-Point Computations: A Simple Abstract Interpreter.	ESOP	2002	DBLP DOI BibTeX RDF
30	Tomás Lang, Javier D. Bruguera	Floating-Point Fused Multiply-Add with Reduced Latency.	ICCD	2002	DBLP DOI BibTeX RDF
30	Marc Daumas, Laurence Rideau, Laurent Théry	A Generic Library for Floating-Point Numbers and Its Application to Exact Computing.	TPHOLs	2001	DBLP DOI BibTeX RDF
30	Lee D. McFearin, David W. Matula	Generation and Analysis of Hard to Round Cases for Binary Floating Point Division.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
30	Johan Piper, Jiren Yuan	Realization of a floating-point A/D converter.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
30	Chia-Lin Yang, Barton Sano, Alvin R. Lebeck	Exploiting Parallelism in Geometry Processing with General Purpose Processors and Floating-Point SIMD Instructions.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	geometry pipeline, paired-single instructions, 3D graphics, superscalar processors, SIMD instructions
30	Hiroomi Hikawa	Pulse Mode Multilayer Neural Network with Floating Point Operation and On-Chip Learning.	IJCNN (2)	2000	DBLP DOI BibTeX RDF
30	John Harrison 0001	Formal Verification of Floating Point Trigonometric Functions.	FMCAD	2000	DBLP DOI BibTeX RDF
30	Marc Daumas	Multiplications of Floating Point Expansions.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
30	Guenter Gerwig, Michael Kroener	Floating-Point Unit in Standard Cell Design with 116 Bit Wide Dataflow.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
30	Fred G. Gustavson, José E. Moreira, Robert F. Enenkel	The fused multiply-add instruction leads to algorithms for extended-precision floating point: applications to java and high-performance computing.	CASCON	1999	DBLP BibTeX RDF	Java
30	Walter B. Ligon III, Scott McMillan, Greg Monn, Kevin Schoonover, Fred Stivers, Keith D. Underwood	A Re-evaluation of the Practicality of Floating-Point Operations on FPGAs.	FCCM	1998	DBLP DOI BibTeX RDF
30	Peter-Michael Seidel	How to Half the Latency of IEEE Compliant Floating-Point Multiplication.	EUROMICRO	1998	DBLP DOI BibTeX RDF
30	John Harrison 0001	Floating Point Verification in HOL.	TPHOLs	1995	DBLP DOI BibTeX RDF