Search results for "subthreshold"

Hits ?▲	Authors	Title	Venue	Year	Link
15	Landon Schmucker, Payman Zarkesh-Ha, Luke Emmert, Wolfgang Rudolph, Vitaly Gruzdev	A Subthreshold CMOS Inverter-Based Amplifier for Low Power and Low Noise Applications.	ICECS	2023	DBLP DOI BibTeX RDF
15	Haotao Lin, Haibiao Zuo, Qiaozhou Peng, Xiaojin Zhao	A 690fJ/Bit ML-Attack-Resilient Strong PUF Based on Subthreshold Voltage Attenuator Ring with Closed-Loop Feedback.	ESSCIRC	2023	DBLP DOI BibTeX RDF
15	Yimai Peng, Ashwin Bhat, Sanjay Wadhwa, David T. Blaauw, Dennis Sylvester	A 4.6nW Subthreshold Voltage Reference with 400× Current Variation Reduction and 64-Step 0.11% Output Voltage Programmability.	ESSCIRC	2023	DBLP DOI BibTeX RDF
15	Reza Papi, Fereidoon Hashemi Noshahr, Benoit Gosselin	A New Current-Mode Subthreshold, High-PSRR MOSFET-Only Bandgap Voltage Reference.	NEWCAS	2023	DBLP DOI BibTeX RDF
15	Nicola Lepri, P. Gibertini, Piergiulio Mannocci, A. Pirovano, I. Tortorelli, Paolo Fantini, Daniele Ielmini	In-memory neural network accelerator based on phase change memory (PCM) with one-selector/one-resistor (1S1R) structure operated in the subthreshold regime.	IMW	2023	DBLP DOI BibTeX RDF
15	Ole Richter, Hugh Greatorex, Benjamin Hucko, Madison Cotteret, Willian Soares Girão, Ella Janotte, Michele Mastella, Elisabetta Chicca	A Subthreshold Second-Order Integration Circuit for Versatile Synaptic Alpha Kernel and Trace Generation.	ICONS	2023	DBLP DOI BibTeX RDF
15	Qiuyao Yu, Yu Lei 0003, Zhitang Song, Guang-Ming Zhang, Houpeng Chen	A 1S1R Model with the Monte Carlo Function for Subthreshold Sensing Operation.	ISCAS	2023	DBLP DOI BibTeX RDF
15	Qiaozhou Peng, Haibiao Zuo, Jiacheng Hao, Xiaojin Zhao	A Subthreshold-Inverter-Based Strong PUF with High Reliability and Energy Efficiency.	ISCAS	2023	DBLP DOI BibTeX RDF
15	Jiajia Chen, Jiani Gu, Zhi Gong, Chengji Jin, Huan Liu, Xiao Yu, Genquan Han	Effect of Mobile Ions on Subthreshold Swing of HfO2-based Ferroelectric Field-Effect Transistors.	ICICDT	2023	DBLP DOI BibTeX RDF
15	Yen-Chen Chang, Wei-Heng Tai, Jyi-Tsong Lin	Steeper Subthreshold Swing Attained in Ge-Source Inductive Tunneling FET via Epitaxial Tunnel Layer for Suppressed Point Tunneling.	ASICON	2023	DBLP DOI BibTeX RDF
15	Daniel J. Mannion, Wing H. Ng, Adnan Mehonic, Anthony J. Kenyon	A Compact SPICE Model for Current Transients within the Subthreshold Regime of Memristors.	MetroXRAINE	2023	DBLP DOI BibTeX RDF
15	Yuxuan Huang, Feng Yan, Kangkang Sun, Jingjing Liu	A Self-Biased Subthreshold CMOS Voltage Reference with Temperature Compensation Circuit for IoT Self-Powered Sensor Applications.	APCCAS	2023	DBLP DOI BibTeX RDF
15	Viet Nguyen, Filippo Schembari, Robert Bogdan Staszewski	A Deep-Subthreshold Variation-Aware 0.2-V Open-Loop VCO-Based ADC.	IEEE J. Solid State Circuits	2022	DBLP DOI BibTeX RDF
15	Mousa Karimi, Mohamed Ali 0001, Ahmad Hassan, Reza Bostani, Boris Vaisband, Mohamad Sawan, Benoit Gosselin	A 7.6-ns Delay Subthreshold Level-Shifter Leveraging a Composite Transistor and a Voltage-Controlled Current Source.	IEEE Access	2022	DBLP DOI BibTeX RDF
15	Yuting Chen, Yuxuan Nie, Hailong Jiao	An Ultralow-Power 65-nm Standard Cell Library for Near/Subthreshold Digital Circuits.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
15	Corneliu A. Marinov, Ruxandra-Liana Costea	Correction to: Designing a Winner-Loser Gap for WTA in Subthreshold. Resolution Performance Revisited.	Circuits Syst. Signal Process.	2022	DBLP DOI BibTeX RDF
15	Corneliu A. Marinov, Ruxandra-Liana Costea	Designing a Winner-Loser Gap for WTA in Subthreshold. Resolution Performance Revisited.	Circuits Syst. Signal Process.	2022	DBLP DOI BibTeX RDF
15	Xin Xin 0005, Yuanhao Hu, Jueping Cai, Siwan Dong, Xingyuan Tong	A 0.6-V, 1.56-nW, 5.87-ppm/°C, 0.23%/V CMOS-Only Subthreshold Voltage Reference with the Threshold Voltage Difference.	Circuits Syst. Signal Process.	2022	DBLP DOI BibTeX RDF
15	Léopold Van Brandt, Roghayeh Saeidi, David Bol, Denis Flandre	Accurate and Insightful Closed-Form Prediction of Subthreshold SRAM Hold Failure Rate.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
15	Martin Lee, Kambiz Moez	A 0.5-1.7 V Efficient and PVT-Invariant Constant Subthreshold gm Reference Circuit in CMOS.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
15	Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins	A 0.1-V VIN Subthreshold 3-Stage Dual-Branch Charge Pump With 43.4% Peak Power Conversion Efficiency Using Advanced Dynamic Gate-Bias.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
15	Javier Beloso-Legarra, Alfio Dario Grasso, Antonio J. López-Martín, Gaetano Palumbo, Salvatore Pennisi	Two-Stage OTA With All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
15	Hamed Aminzadeh	Subthreshold reference circuit with curvature compensation based on the channel length modulation of MOS devices.	Int. J. Circuit Theory Appl.	2022	DBLP DOI BibTeX RDF
15	Mengxuan Yang, Qianqian Huang, Kaifeng Wang, Chang Su, Liang Chen, Yangyuan Wang, Ru Huang	Physical investigation of subthreshold swing degradation behavior in negative capacitance FET.	Sci. China Inf. Sci.	2022	DBLP DOI BibTeX RDF
15	Arvind Thakur, Rishikesh Pandey, Shireesh Kumar Rai	A High-Order Temperature-Compensated Subthreshold Voltage Reference Using Channel Length Modulation Compensation Technique.	Wirel. Pers. Commun.	2022	DBLP DOI BibTeX RDF
15	Shelja Kaushal, Ashwani K. Rana	Analytical model of subthreshold drain current for nanoscale negative capacitance junctionless FinFET.	Microelectron. J.	2022	DBLP DOI BibTeX RDF
15	Shalini Chaudhary, Basudha Dewan, Chitrakant Sahu, Menka Yadav	Steep-subthreshold slope dual gate negative capacitance junction less FET with dead channel: TCAD approach for digital/ RF applications.	Microelectron. J.	2022	DBLP DOI BibTeX RDF
15	Ajit Kumar, Pramod Kumar Tiwari, J. N. Roy	Subthreshold model of asymmetric GAA junctionless FETs with scaled equivalent oxide thickness.	Microelectron. J.	2022	DBLP DOI BibTeX RDF
15	Rodrigo Felipe De Oliveira Pena, Horacio G. Rotstein	The voltage and spiking responses of subthreshold resonant neurons to structured and fluctuating inputs: persistence and loss of resonance and variability.	Biol. Cybern.	2022	DBLP DOI BibTeX RDF
15	Shuzheng Mu, Pak Kwong Chan	Design of Precision-Aware Subthreshold-Based MOSFET Voltage Reference.	Sensors	2022	DBLP DOI BibTeX RDF
15	Gaudencio Paz-Martínez, Ignacio Iñiguez-de-la-Torre, Héctor Sánchez-Martín, José Antonio Novoa-López, Virginie Hoel, Yvon Cordier, Javier Mateos, Tomás González	Temperature and Gate-Length Dependence of Subthreshold RF Detection in GaN HEMTs.	Sensors	2022	DBLP DOI BibTeX RDF
15	Yuanfeng Xie, Gang Li, Pengjun Wang, Ziyu Zhou	A compact weak PUF circuit based on MOSFET subthreshold leakage current.	IEICE Electron. Express	2022	DBLP DOI BibTeX RDF
15	Huan Ma, Dafu Zhang, Dewei Sun, Hongbo Wang, Jianzhong Yang	Gray and white matter structural examination for diagnosis of major depressive disorder and subthreshold depression in adolescents and young adults: a preliminary radiomics analysis.	BMC Medical Imaging	2022	DBLP DOI BibTeX RDF
15	Massimo Vatalaro, Raffaele De Rose, Marco Lanuzza, Felice Crupi	Stability-Area Trade-off in Static CMOS PUF Based on 4T Subthreshold Voltage Divider.	ICECS 2022	2022	DBLP DOI BibTeX RDF
15	Jagan K. Balasubramanian, Rahul Kumar Ray, Manivannan Muniyandi	Effect of Subthreshold Vibration on the Perception of Electrovibration.	HAID	2022	DBLP DOI BibTeX RDF
15	Chung-En Tsai, Chun-Yi Cheng, Bo-Wei Huang, Hsin-Cheng Lin, Tao Chou, Chien-Te Tu, Yi-Chun Liu, Sun-Rong Jan, Yu-Rui Chen, Wan-Hsuan Hsieh, Kung-Ying Chiu, Shee-Jier Chueh, Chee Wee Liu	Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets Using Ultrathin Bodies.	VLSI Technology and Circuits	2022	DBLP DOI BibTeX RDF
15	Karthi Srinivasan, Glenn E. R. Cowan	Subthreshold CMOS Implementation of the Izhikevich Neuron Model.	ISCAS	2022	DBLP DOI BibTeX RDF
15	Loïc Massin, Fabrice Seguin, Vincent Nourrit, Emmanuel Daniel, Camilla Kärnfelt	A 0.35-μm subthreshold CMOS ASIC for a Smart Contact Lens Eye-Tracker.	ISCAS	2022	DBLP DOI BibTeX RDF
15	Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas	A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation.	IJCNN	2022	DBLP DOI BibTeX RDF
15	Chang Liu, Yiming Liu, Song Wei, Yi Zhao	The Effect of Sampling Interval and Various Difference Approximation Methods on Extracting the Subthreshold Swing in InGaZnO Thin Film Transistor.	IEEE Access	2021	DBLP DOI BibTeX RDF
15	Mamidala Karthik Ram, Neha Tiwari, Dawit Burusie Abdi, Sneh Saurabh	Effect of Drain Induced Barrier Enhancement on Subthreshold Swing and OFF-State Current of Short Channel MOSFETs: A TCAD Study.	IEEE Access	2021	DBLP DOI BibTeX RDF
15	Kamlesh Singh, Barry de Bruin, Hailong Jiao, Jos Huisken, Henk Corporaal, José Pineda de Gyvez	Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation.	IEEE Trans. Very Large Scale Integr. Syst.	2021	DBLP DOI BibTeX RDF
15	Turki Alnuayri, S. Saqib Khursheed, Antonio Leonel Hernández Martínez, Daniele Rossi 0001	Differential Aging Sensor Using Subthreshold Leakage Current to Detect Recycled ICs.	IEEE Trans. Very Large Scale Integr. Syst.	2021	DBLP DOI BibTeX RDF
15	Selvakumar Rajendran, Arvind Chakrapani	A 16 ns, 28 fJ Wide-Range Subthreshold Level Converter Using Low-Voltage Current Mirror.	Circuits Syst. Signal Process.	2021	DBLP DOI BibTeX RDF
15	Rahul Kumar Ray, Payal Patel, Manivannan Muniyandi	Reduction of electrotactile perception threshold using subthreshold vibrotactile stimuli.	Displays	2021	DBLP DOI BibTeX RDF
15	Harekrishna Kumar, V. K. Tomar	Design of Low Power with Expanded Noise Margin Subthreshold 12T SRAM Cell for Ultra-Low Power Devices.	J. Circuits Syst. Comput.	2021	DBLP DOI BibTeX RDF
15	Arvind Thakur, Rishikesh Pandey, Shireesh Kumar Rai	A Low Supply Voltage, Low Line Sensitivity and High PSRR Subthreshold CMOS Voltage Reference.	J. Circuits Syst. Comput.	2021	DBLP DOI BibTeX RDF
15	Lazhar Fekih-Ahmed	A Constructive Methodology of Analog Synthesis of Nonlinear Functions in Subthreshold CMOS.	J. Circuits Syst. Comput.	2021	DBLP DOI BibTeX RDF
15	Jingjing Guo, Peng Cao 0002, Mengxiao Li, Yu Gong, Zhiyuan Liu 0011, Geng Bai, Jun Yang 0006	Semi-Analytical Path Delay Variation Model With Adjacent Gates Decorrelation for Subthreshold Circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2021	DBLP DOI BibTeX RDF
15	Quanzhen Duan, Chenxi Lin, Peiju Liu, S. Huang, Zhen Meng	A 2.1 ppm/°C, 0.55-2.4 V, 5.6 nW, 235 mV, CMOS-only subthreshold voltage reference.	Microelectron. J.	2021	DBLP DOI BibTeX RDF
15	Zhentao Xu, Zhi Lin	Low-power current reference with temperature compensation by subthreshold leakage current.	Microelectron. J.	2021	DBLP DOI BibTeX RDF
15	Sougata Ghosh, Vijaya Bhadauria	An ultra-low-power bulk-driven subthreshold super class-AB rail-to-rail CMOS OTA with enhanced small and large signal performance suitable for large capacitive loads.	Microelectron. J.	2021	DBLP DOI BibTeX RDF
15	Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon	A Novel High-Gain Amplifier Circuit Using Super-Steep-Subthreshold-Slope Field-Effect Transistors.	VLSI-SoC	2021	DBLP DOI BibTeX RDF
15	Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon	A First Approach in Using Super-Steep-Subthreshold-Slope Field-Effect Transistors in Ultra-Low Power Analog Design.	VLSI-SoC (Selected Papers)	2021	DBLP DOI BibTeX RDF
15	Chaitanya Goswami, Pulkit Grover	HingePlace: Focused transcranial electrical current stimulation that allows subthreshold fields outside the stimulation target.	EMBC	2021	DBLP DOI BibTeX RDF
15	Rahul Kumar Ray, M. Manivannan 0001	Spatial Summation of Electro-Tactile Displays at Subthreshold.	IHIET (Strasbourg)	2021	DBLP DOI BibTeX RDF
15	Haoyu Hu, Chenchang Zhan, Lidan Wang	A 1.1-V 26.2-ppm/°C Sub-Bandgap Voltage Reference with 6.5-nW Power Consumption Composed of Subthreshold CMOSs and Single BJT.	ICTA	2021	DBLP DOI BibTeX RDF
15	Zhenhao Li, Chenchang Zhan, Lidan Wang	An Ultra-low Power Consumption Dual-Output Subthreshold CMOS Voltage Reference.	ICTA	2021	DBLP DOI BibTeX RDF
15	Christophe Loyez, Kevin Carpentier, Ilias Sourikopoulos, François Danneville	Subthreshold neuromorphic devices for Spiking Neural Networks applied to embedded A.I.	NEWCAS	2021	DBLP DOI BibTeX RDF
15	Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet	Subthreshold Power PC and Nand Race-Free Flip-Flops in Frequency Divider Applications.	NorCAS	2021	DBLP DOI BibTeX RDF
15	David Zagouri, Joseph Shor	A Subthreshold Voltage Reference with Coarse- Fine Voltage Trimming.	ISCAS	2021	DBLP DOI BibTeX RDF
15	Yingxin Chen, Kai Xiao, Haihua Wang, Jing Wan	The Impact of Incident Wavelength and Incident Intensity on Light-modulated Subthreshold Swing Effect.	ASICON	2021	DBLP DOI BibTeX RDF
15	Jinliang Han, Yongzhong Wen, Yuejun Zhang, Pengjun Wang, Huihong Zhang	A 65nm Reliable Near-Subthreshold Standard Cells Design Using Schmitt Trigger.	ASICON	2021	DBLP DOI BibTeX RDF
15	Shigeo Sato, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto, Yoshihiko Horio, Yasushi Yuminaka, Jordi Madrenas	A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model.	ICANN (5)	2021	DBLP DOI BibTeX RDF
15	Roberto Andrino Robles, Tomochika Harada	A Low Power 0.6V Filter-less AD-PLL with a Fast Locking Algorithm in the Subthreshold Region.	ISPACS	2021	DBLP DOI BibTeX RDF
15	Keun-Mok Kim, Hyun-Gi Seok, Jeong-Il Seo, Kyung-Sik Choi, Sang-Gug Lee 0001	0.6 V 8.1/0.2µW Ultra-Low-Power Logarithmic Power Detectors Employing Subthreshold MOS Transistors.	A-SSCC	2021	DBLP DOI BibTeX RDF
15	Nack-Hyeon Keum, Seong-Kwan Hong, Oh-Kyong Kwon	An AMOLED Pixel Circuit With a Compensating Scheme for Variations in Subthreshold Slope and Threshold Voltage of Driving TFTs.	IEEE J. Solid State Circuits	2020	DBLP DOI BibTeX RDF
15	Min Pan, Lili Pang 0002, Jiaye Xie, Yufei Han, Qiqing Xu	A 0.6V 44.6 ppm/ºC subthreshold CMOS voltage reference with wide temperature range and inherent leakage compensation.	Integr.	2020	DBLP DOI BibTeX RDF
15	Pratosh Kumar Pal, Rajendra Kumar Nagaria	A Sub-1 V nanopower subthreshold current and voltage reference using current subtraction technique and cascoded active load.	Integr.	2020	DBLP DOI BibTeX RDF
15	Niraj Kumar Singh, Monika Kumari, Manodipan Sahoo	A Compact Short-Channel Analytical Drain Current Model of Asymmetric Dual-Gate TMD FET in Subthreshold Region Including Fringing Field Effects.	IEEE Access	2020	DBLP DOI BibTeX RDF
15	Xingyuan Tong, Andi Yang, Siwan Dong	A 17.6-nW 35.7-ppm/°C Temperature Coefficient All-SVT-MOSFET Subthreshold Voltage Reference in Standard 0.18-μm N-Well CMOS.	IEEE Access	2020	DBLP DOI BibTeX RDF
15	Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo	A Subthreshold Cross-Coupled Hybrid Charge Pump for 50-mV Cold-Start.	IEEE Access	2020	DBLP DOI BibTeX RDF
15	G. Kalpana, Raja Krishnamoorthy, P. T. Kalaivaani	Design and implementation of low-power CMOS biosignal amplifier for active electrode in biomedical application using subthreshold biasing strategy.	Int. J. Wavelets Multiresolution Inf. Process.	2020	DBLP DOI BibTeX RDF
15	Alexis Moscoso, David Rey-Bretal, Jesús Silva-Rodríguez, José M. Aldrey, Julia Cortés, Juan Pías-Peleteiro, Álvaro Ruibal, Pablo Aguiar 0001	White matter hyperintensities are associated with subthreshold amyloid accumulation.	NeuroImage	2020	DBLP DOI BibTeX RDF
15	Joaquín J. Torres, Fabiano Baroni, Roberto Latorre, Pablo Varona	Temporal discrimination from the interaction between dynamic synapses and intrinsic subthreshold oscillations.	Neurocomputing	2020	DBLP DOI BibTeX RDF
15	Anala M. Reddy, B. P. Harish	Process-induced variability modeling of subthreshold leakage power considering device stacking.	Int. J. Circuit Theory Appl.	2020	DBLP DOI BibTeX RDF
15	Arvind Thakur, Rishikesh Pandey, Shireesh Kumar Rai	Low temperature coefficient and low line sensitivity subthreshold curvature-compensated voltage reference.	Int. J. Circuit Theory Appl.	2020	DBLP DOI BibTeX RDF
15	Yang Zhao, Qianqian Huang, Rui Huang 0008	A novel tunnel FET design through hybrid modulation with optimized subthreshold characteristics and high drive capability.	Sci. China Inf. Sci.	2020	DBLP DOI BibTeX RDF
15	Jie Lin, Lidan Wang, Yan Lu 0002, Chenchang Zhan	A Nano-Watt Dual-Output Subthreshold CMOS Voltage Reference.	IEEE Open J. Circuits Syst.	2020	DBLP DOI BibTeX RDF
15	Prakhar Sharma, Shourya Gupta, Kirti Gupta, Neeta Pandey	A low power subthreshold Schmitt Trigger based 12T SRAM bit cell with process-variation-tolerant write-ability.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
15	Jinrui Liao, Yanhan Zeng, Jintao Li, Jingci Yang, Hong-Zhou Tan	A 3.9 ppm/○C, 31.5 ppm/V ultra-low-power subthreshold CMOS-only voltage reference.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
15	Sumukh Nitundil, Nihal Singh, Rushabha Balaji, Pankaj Arora	Design and Comparative Analysis of a Two-Stage Ultra-Low-Power Subthreshold Operational Amplifier in 180nm, 90nm, and 45nm technology.	CoRR	2020	DBLP BibTeX RDF
15	Maria Masoliver, Cristina Masoller	Neuronal Transmission of Subthreshold Periodic Stimuli Via Symbolic Spike Patterns.	Entropy	2020	DBLP DOI BibTeX RDF
15	Takayuki Mori, Jiro Ida, Hiroki Endo	Transient Characteristics on Super-Steep Subthreshold Slope "PN-Body Tied SOI-FET" - Simulation and Pulse Measurement -.	IEICE Trans. Electron.	2020	DBLP DOI BibTeX RDF
15	Ulises A. Aregueta-Robles, Ya Lang Enke, Paul M. Carter, Rylie A. Green, Laura A. Poole-Warren	Subthreshold Electrical Stimulation for Controlling Protein-Mediated Impedance Increases in Platinum Cochlear Electrode.	IEEE Trans. Biomed. Eng.	2020	DBLP DOI BibTeX RDF
15	Haoyu Zhuang, Xiaodan Xi, Nan Sun 0001, Michael Orshansky	A Strong Subthreshold Current Array PUF Resilient to Machine Learning Attacks.	IEEE Trans. Circuits Syst. I Regul. Pap.	2020	DBLP DOI BibTeX RDF
15	Yuwei Wang, Quan Sun, Hongrui Luo, Xiaofei Wang, Ruizhi Zhang 0002, Hong Zhang 0009	A 48 pW, 0.34 V, 0.019%/V Line Sensitivity Self-Biased Subthreshold Voltage Reference With DIBL Effect Compensation.	IEEE Trans. Circuits Syst. I Regul. Pap.	2020	DBLP DOI BibTeX RDF
15	Abilash Venkatesh, Aishwarya Bahudhanam Venkatasubramaniyan, Xiaodan Xi, Arindam Sanyal	0.3 pJ/Bit Machine Learning Resistant Strong PUF Using Subthreshold Voltage Divider Array.	IEEE Trans. Circuits Syst. II Express Briefs	2020	DBLP DOI BibTeX RDF
15	Gabor Csipkes, Doris Csipkes, Robert Groza	A Programmable Subthreshold Capacitance Scaler for Medical Signal Conditioning.	AQTR	2020	DBLP DOI BibTeX RDF
15	Margherita Ronchini, Milad Zamani, Hooman Farkhani, Farshad Moradi	Tunable Voltage-Mode Subthreshold CMOS Neuron.	ISVLSI	2020	DBLP DOI BibTeX RDF
15	J. Ramírez Sánchez, A. Medina Vazquez, Ivan R. Padilla-Cantoya	Reduced Low-Voltage Electromyographic Signal Acquisition System Using Subthreshold Technique.	CCE	2020	DBLP DOI BibTeX RDF
15	Matthias Eberlein, Harald Pretl	Subthreshold-Hybrid Solutions for Thermal Sensor and Reference Circuits in Advanced CMOS.	VLSI-SOC	2020	DBLP DOI BibTeX RDF
15	Sherif M. Sharroush	An MTCMOS Subthreshold-Leakage Reduction Algorithm.	NILES	2020	DBLP DOI BibTeX RDF
15	Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet	Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders.	NorCAS	2020	DBLP DOI BibTeX RDF
15	Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet	Comparative Study of Single, Regular and Flip Well Subthreshold SRAMs in 22 nm FDSOI Technology.	NorCAS	2020	DBLP DOI BibTeX RDF
15	Roberto Andrino Robles, Tomochika Harada	A 0.6V Programmable Frequency Divider and Digitally Controlled Oscillator for use in a Digital PLL in the Subthreshold Region.	ICECS	2020	DBLP DOI BibTeX RDF
15	Roman Trobec, Maria Lindén, M. Sinkovec	Impact of Subthreshold Transcutaneous Auricular Vagus Nerve Stimulation on the Heart Rate Variability and Atrial Arrhythmias.	MIPRO	2020	DBLP DOI BibTeX RDF
15	Zhengyu Chen 0002, Sihua Fu, Qiankai Cao, Jie Gu 0001	A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip Training for Low Power Edge Devices.	VLSI Circuits	2020	DBLP DOI BibTeX RDF
15	Chaiyanut Aueamnuay, Ajmal Vadakkan Kayyil, Jialin Liu 0005, Narayana Bhagirath Thota, David J. Allstot	gm/ID Design Considerations for Subthreshold-Based CMOS Two-Stage Operational Amplifiers.	ISCAS	2020	DBLP DOI BibTeX RDF
15	Jingjing Guo, Peng Cao 0002, Mengxiao Li, Zhiyuan Liu 0011, Jun Yang 0006	Statistical Timing Model for Subthreshold Circuit with Correlated Variation Consideration.	ISCAS	2020	DBLP DOI BibTeX RDF