Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Joyati Mondal, Bappaditya Mondal, Dipak Kumar Kole, Hafizur Rahaman 0001, Debesh K. Das |
Boolean Difference Technique for Detecting All Missing Gate Faults in Reversible Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 95-98, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Dusan N. Grujic, Mihajlo Bozovic, Milan Savic |
BSIM4 to PSP Model Conversion for Passive Mixer IM3 Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 137-142, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Tobias Koal, Stefan Scharoba, Heinrich Theodor Vierhaus |
Combining Correction of Delay Faults and Transient Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 99-102, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | I-Che Chen, John P. Hayes |
Low-Area and High-Speed Approximate Matrix-Vector Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 23-28, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Peter Malík |
High Throughput Floating-Point Dividers Implemented in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 291-294, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ondrej Novák, Jiri Jenícek, Martin Rozkovec |
LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 9-14, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Hong-Yi Huang, Jen-Chieh Liu, Pei-Ying Lee, Kun-Yuan Chen, Jin-Sheng Chen, Kuo-Hsing Cheng, Tzuen-Hsi Huang, Ching-Hsing Luo, Jin-Chern Chiou |
PVT Insensitive High-Resolution Time to Digital Converter for Intraocular Pressure Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 125-128, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Milan Babic, Milos Krstic |
A Coarse Model for Estimation of Switching Noise Coupling in Lightly Doped Substrates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 217-222, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Hong-Yi Huang, Gene Fe P. Palencia, Da-Kai Chen, Wei-Hsuan Huang |
Triangular Modulation Using Switched-Capacitor Scheme for Spread-Spectrum Clocking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 87-90, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Dominik Macko, Katarína Jelemenská, Pavel Cicák |
Power-Management Specification in SystemC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 259-262, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Artjom Jasnetski, Jaan Raik, Anton Tsertov, Raimund Ubar |
New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 251-254, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Martin Krcma, Jan Kastil, Zdenek Kotásek |
Mapping Trained Neural Networks to FPNNs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 157-160, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Nebojsa Pjevalica, Milos Nikolic 0004, Ivan Kastelan |
Analog Circuitry for BLDC Motor Magnetic Saturation Diagnostic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 287-290, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Thomas Hollstein, Siavoosh Payandeh Azad, Thilo Kogge, Haoyuan Ying, Klaus Hofmann |
NoCDepend: A Flexible and Scalable Dependability Technique for 3D Networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 75-78, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Lukás Nagy, Viera Stopjaková, Alexander Satka |
Design of In AlN/GaN Heterostructure-Based Logic Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 83-86, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Andrzej Grodzicki, Witold A. Pleskacz |
A Low Ripple Current Mode Voltage Doubler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 63-68, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Jakub Podivinsky, Marcela Simková, Ondrej Cekan, Zdenek Kotásek |
FPGA Prototyping and Accelerated Verification of ASIPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 145-148, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ioana Mot, Oana Boncalo, Alexandru Amaricai |
Performance Enhancement of Serial Based FPGA Probabilistic Fault Emulation Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 149-152, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Hans G. Kerkhoff, Hassan Ebrahimi |
Intermittent Resistive Faults in Digital CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 211-216, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Shuichi Sato, Satoshi Ohtake |
A Delay Measurement Mechanism for Asynchronous Circuits of Bundled-Data Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 243-248, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Vasileios Gerakis, Fontounasios Christos, Alkis A. Hatzopoulos |
Modeling the Coupling through Substrate for Frequencies up to 100GHz. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 165-168, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Stefan Kristofík, Marcel Baláz, Mária Fischerová |
Generic Self Repair Architecture with On-Line Fault Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 279-282, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mikhail Glukhikh, Mikhail J. Moiseev |
Fast Simulation of SystemC Synthesizable Subset. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 103-106, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Zoran Stamenkovic, Witold A. Pleskacz, Jaan Raik, Heinrich Theodor Vierhaus (eds.) |
18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![IEEE Computer Society, 978-1-4799-6779-7 The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
1 | Yo-Hao Tu, Kuo-Hsing Cheng, Yian-An Lin, Hong-Yi Huang |
A Synchronous Mirror Delay with Duty-Cycle Tunable Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 79-82, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Xiao Yang, Hongbo Zhu, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada |
An Asynchronous Projection and Summation Circuit for In-Pixel Processing in Single Photon Avalanche Diode Sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 131-136, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sneana Stefanovski, Milka M. Potrebic, Dejan Toic, Zoran Stamenkovic |
A Novel Compact Dual-Band Bandpass Waveguide Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 51-56, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Arman Allahyari-Abhari, Mathias Soeken, Rolf Drechsler |
Requirement Phrasing Assistance Using Automatic Quality Assessment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 183-188, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Miroslav Siebert, Elena Gramatová |
Parameterized Critical Path Selection for Delay Fault Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 153-156, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Lukasz Lopacinski, Jörg Nolte, Steffen Büchner 0002, Marcin Brzozowski, Rolf Kraemer |
Design and Implementation of an Adaptive Algorithm for Hybrid Automatic Repeat Request. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 263-266, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Nikolay N. Prokopenko, Nikolay V. Butyrlagin, Sergei G. Krutchinsky, Evgeniy A. Zhebrun, Alexey E. Titov |
Microwave Selective Amplifiers with High Asymptotic Attenuation in the Range of Subresonance Frequencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 283-286, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Niels Thole, Heinz Riener, Görschwin Fey |
Equivalence Checking on System Level Using a Priori Knowledge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 177-182, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Vladimir Petrovic, Milos Krstic |
Design Flow for Radhard TMR Flip-Flops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 203-208, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko |
Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB Implementation of Incompletely Specified Boolean Function of the Corresponding Sub-Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 267-270, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Nils Przigoda, Robert Wille, Rolf Drechsler |
Contradiction Analysis for Inconsistent Formal Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 171-176, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Rados Dabic, Sasa Jednak, Ilija Adzic, Dusko Stanic, Aleksandar Mijatovic, Stanislav Vuckovic |
Direct Test Methodology for HDL Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 115-118, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Muhammed Ceylan Morgül, Mustafa Altun |
Synthesis and Optimization of Switching Nanoarrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 161-164, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková |
Fully Differential Difference Amplifier for Low-Noise Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 57-62, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Tetsuya Matsumura, Aoi Kurokawa, Kousuke Imamura, Yoshio Matsuda |
A Design for the 178-MHz WXGA 30-fps Optical Flow Processor Based on the HOE Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 31-36, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Goran Panic, Zoran Stamenkovic |
Activity Profiling and Power Estimation for Embedded Wireless Sensor Node Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 231-236, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Krzysztof Marcinek, Maciej Plasota, Andrzej Wielgus, Witold A. Pleskacz |
Implementation of the ADELITE Microcontroller for Biomedical Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 271-274, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Kishore K. Duganapalli, Ajoy Kumar Palit, Walter Anheier |
TPG for Crosstalk Faults between On-Chip Aggressor and Victim Using Genetic Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 3-8, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Maciej Moskala, Patryk Kloczko, Marek Cieplucha, Witold A. Pleskacz |
UVM-based Verification of Bluetooth Low Energy Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 123-124, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Syed Saif Abrar, Maksim Jenihhin, Jaan Raik |
SystemC-Based Loose Models for Simulation Speed-Up by Abstraction of RTL IP Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 71-74, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Spyridon Nikolaidis 0001 |
Modeling CMOS Gates Using Equivalent Inverters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 119-122, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Woo-Rham Bae, Deog-Kyoon Jeong, Byoung-Joo Yoo |
A design of an area-efficient 10-GHz phase-locked loop for source-synchronous, multi-channel links in 90-nm CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 55-58, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Viktor Pus, Lukas Kekely, Jan Korenek |
Design methodology of configurable high performance packet parser for FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 189-194, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Tetsuya Matsumura, Naoya Okada, Yoshifumi Kawamura, Koji Nii, Kazutami Arimoto, Hiroshi Makino, Yoshio Matsuda |
The LSI implementation of a memory based field programmable device for MCU peripherals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 183-188, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Grzegorz Pastuszak |
FPGA architectures of the quantization and the dequantization for video encoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 290-293, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Omar Abdelmalek, David Hély, Vincent Beroulle |
Emulation based fault injection on UHF RFID transponder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 254-257, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Jing Ning, Klaus Hofmann |
A 120V high voltage DAC array for a tunable antenna in communication system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 65-70, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Salma Hesham, Mohamed A. Abd El Ghany, Klaus Hofmann |
High throughput architecture for the Advanced Encryption Standard Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 167-170, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Raimund Ubar, Dmitri Mironov |
Lower bounds of the size of Shared Structurally Synthesized BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 77-82, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard 0001, P. Debaud, S. Guilhot |
Test and diagnosis of power switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 213-218, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Panagiotis Chaourani, Spyridon Nikolaidis 0001 |
A unified CMOS inverter model for planar and FinFET nanoscale technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 242-245, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Piotr Maj |
Mismatch effects and their correction in large area ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 238-241, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Alberto Bosio, Luigi Dilillo, Patrick Girard 0001, Aida Todri-Sanial, Arnaud Virazel, S. Bernabovi, Paolo Bernardi |
An intra-cell defect grading tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 298-301, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Hafiz ul Asad, Kevin D. Jones, Frédéric Surre |
Verifying robust frequency domain properties of non linear oscillators using SMT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 306-309, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Dominik Macko, Katarína Jelemenská |
Self-managing power management unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 159-162, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Albert Au, Artur Pogiel, Janusz Rajski, Piotr Sydow, Jerzy Tyszer, Justyna Zawada |
Quality assurance in memory built-in self-test tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 39-44, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Milan Dvorak, Jan Korenek |
Low latency book handling in FPGA for high frequency trading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 175-178, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Stefano Pettazzi, Andrew Plews, Anatoly Rudenko, Ahmed Nejim |
Development of 3D space partitioning and design rule check for smart system solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 14, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Petr Fiser, Jan Schmidt, Jiri Balcarek |
Sources of bias in EDA tools and its influence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 258-261, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Andrzej Abramowski, Grzegorz Pastuszak |
A double-path intra prediction architecture for the hardware H.265/HEVC encoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 27-32, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Andrzej Wielgus |
Heuristic algorithm of two-level minimization of fuzzy logic functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 302-305, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel |
Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 207-212, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Lukas Miculka, Zdenek Kotásek |
Generic partial dynamic reconfiguration controller for transient and permanent fault mitigation in fault tolerant systems implemented into FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 171-174, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | A. Mehdaoui, J. Pagazani, G. Schropfer, Gaëlle Lissorgues |
SiP design flow and 3D DRC for MEMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 12-13, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Pawel Dabal, Ryszard Pelka |
A study on fast pipelined pseudo-random number generator based on chaotic logistic map. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 195-200, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Juraj Brenkus, Viera Stopjaková, Daniel Arbet, Gábor Gyepes, Libor Majer |
A novel impedance calculation method and its time efficiency evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 99-103, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Jürgen Maier 0002, Andreas Steininger |
Online test vector insertion: A concurrent built-in self-testing (CBIST) approach for asynchronous logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 33-38, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Parit Kanjanavirojkul, Nguyen Ngoc Mai Khanh, Toru Nakura, Kunihiro Asada |
Burst-pulse Generator based on transmission line toward sub-MMW. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 59-64, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Nam-Khanh Dang, Xuan-Tu Tran, Alain Merirot |
An efficient hardware architecture for inter-prediction in H.264/AVC encoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 294-297, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Domenico Bertoncelli, Pasquale Caianiello |
Customer return detection with features selection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 268-269, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Tomasz Garbolino |
Designing of Test Pattern Generators for stimulation of crosstalk faults in bus-type connections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 270-273, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Steffen Ostendorff, Jorge H. Meza Escobar, Heinz-Dietrich Wuttke, Thomas Sasse, Sebastian Richter |
Modeling timing constraints for automatic generation of embedded test instruments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 201-206, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Andrzej Grodzicki, Witold A. Pleskacz |
Multistage low ripple charge pump. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 93-98, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Marco Gaudesi, S. Saleem, Ernesto Sánchez 0001, Matteo Sonza Reorda, E. Tanowe |
On the in-field test of Branch Prediction Units using the correlated predictor mechanism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 286-289, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Tomás Závodník, Lukas Kekely, Viktor Pus |
CRC based hashing in FPGA using DSP blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 179-182, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Martin Krammer, Michael Karner, Anton Fuchs |
System design for enhanced forward-engineering possibilities of safety critical embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 234-237, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Panagiotis Sismanoglou, Dimitris Nikolos |
Test data compression based on reuse and bit-flipping of parts of dictionary entries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 110-115, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Yo-Hao Tu, Kuo-Hsing Cheng, Chih-Hsun Hsu, Hong-Yi Huang |
A low supply voltage synchronous mirror delay with quadrature phase output. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 163-166, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Vlastimil Kosar, Jan Korenek |
On NFA-split architecture optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 274-277, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | |
17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![IEEE Computer Society, 978-1-4799-4560-3 The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
1 | Ronaldo Rodrigues Ferreira, Thomas Klotz, Thilo Vörtler, Jean da Rolt, Gabriel L. Nazar, Álvaro Freitas Moreira, Luigi Carro, Karsten Einwich |
Reliable execution of statechart-generated correct embedded software under soft errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 147-152, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Pavel Fiala, Richard Linhart |
Efficient VHDL implementation of symbol synchronization for software radio based on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 318-321, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Mikolaj Roszkowski, Grzegorz Pastuszak |
FPGA design of the computation unit for the semi-global stereo matching algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 230-233, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Lufei Shen, Ferdinand Keil, Klaus Hofmann |
Stabilization methods for integrated high voltage charge pumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 226-229, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Andrej Kincel, Marcel Baláz |
Case study: BISR for a processor multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 314-317, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Tariq Bashir Ahmad, Maciej J. Ciesielski |
Fast time-parallel C-based event-driven RTL simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 71-76, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Harish Balasubramaniam, Klaus Hofmann |
Analysis of current conveyor non-idealities for implementation as integrator in delta sigma modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 89-92, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Marcel Baláz, Stefan Kristofík, Mária Fischerová |
Generic built-in self-repair architectures for SoC logic cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 45-50, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Peter Malík |
Dedicated hardware architecture for object tracking preprocessing implemented in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 250-253, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta 0001, Hafizur Rahaman 0001, Rolf Drechsler |
Optimizing DD-based synthesis of reversible circuits using negative control lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 129-134, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Vasileios Gerakis, Christina Avdikou, Alexandros Liolios, Alkis A. Hatzopoulos |
Modeling and analysis of cracked through silicon via (TSV) interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 310-313, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Jan Malburg, Niklas Krafczyk, Görschwin Fey |
Automatically connecting hardware blocks via light-weight matching techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 21-26, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Lukas Kekely, Martin Zádník, Jirí Matousek 0002, Jan Korenek |
Fast lookup for dynamic packet filtering in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 219-222, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Pranab Roy, Hafizur Rahaman 0001, Parthasarathi Dasgupta |
A layout based customized testing technique for total microfluidic operations in digital microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 122-128, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Kevin Ngari Muriithi, Toru Nakura, Kunihiro Asada |
Numerical and theoretical analysis on voltage and time domain dynamic range of scaled CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 282-285, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
Online testing of many-core systems in the Dark Silicon era. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 141-146, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|