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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 210 occurrences of 148 keywords
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Results
Found 3186 publication records. Showing 3186 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Adriaan Peetermans, Milos Grujic, Vladimir Rozic, Ingrid Verbauwhede |
A Self-Calibrating True Random Number Generator.  |
FPL  |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantina Koliogeorgi, Nils Voss, Sotiria Fytraki, Sotirios Xydis, Georgi Gaydadjiev, Dimitrios Soudris |
Dataflow Acceleration of Smith-Waterman with Traceback for High Throughput Next Generation Sequencing. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Di Wu 0013, Yu Zhang, Xijie Jia, Lu Tian, Tianping Li, Lingzhi Sui, Dongliang Xie, Yi Shan |
A High-Performance CNN Processor Based on FPGA for MobileNets. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Adriaan Peetermans, Vladimir Rozic, Ingrid Verbauwhede |
A Highly-Portable True Random Number Generator Based on Coherent Sampling. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Lucas Kuhring, Zsolt István |
Storing Parquet Tile by Tile: Application-Aware Storage with Deduplication. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Rui Ma, Derek Chiou, Jia-Ching Hsu, Tian Tan 0007, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu |
Specializing FGPU for Persistent Deep Learning. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicholas V. Giamblanco, Jason Helge Anderson |
A Dynamic Memory Allocation Library for High-Level Synthesis. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ibrahim Ahmed 0001, Linda L. Shen, Vaughn Betz |
Becoming More Tolerant: Designing FPGAs for Variable Supply Voltage. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shuanglong Liu, Wayne Luk |
Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shengwen Liang, Ying Wang 0001, Cheng Liu 0008, Huawei Li 0001, Xiaowei Li 0001 |
InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefan Nikolic 0001, Grace Zgheib, Paolo Ienne |
Finding a Needle in the Haystack of Hardened Interconnect Patterns. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Abeer Alhyari, Ahmed Shamli, Ziad Abuwaimer, Shawki Areibi, Gary Gréwal |
A Deep Learning Framework to Predict Routability for FPGA Circuit Placement. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Bruno da Silva 0001, Laurent Segers, An Braeken, Abdellah Touhafi |
Demonstration of a Multimode SoC FPGA-Based Acoustic Camera. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Marie Nguyen, Robert Tamburo, Srinivasa G. Narasimhan, James C. Hoe |
Quantifying the Benefits of Dynamic Partial Reconfiguration for Embedded Vision Applications. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Lester Kalms, Maximilian Hajduk, Diana Göhringer |
Efficient Pattern Recognition Algorithm Including a Fast Retina Keypoint FPGA Implementation. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Lenos Ioannou, Suhaib A. Fahmy |
Neural Network Overlay Using FPGA DSP Blocks. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan |
FPGA Accelerated FPGA Placement. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Preußer, Alexander Weiss |
The CEDARtools Platform - Massive External Memory with High Bandwidth and Low Latency Under Fine-Granular Random Access Patterns. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | George Provelengios, Daniel E. Holcomb, Russell Tessier |
Characterizing Power Distribution Attacks in Multi-User FPGA Environments. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Seungwon Min, Sitao Huang, Mohamed El-Hadedy 0001, Jinjun Xiong, Deming Chen, Wen-Mei Hwu |
Analysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Grigorios Chrysos 0001, Odysseas Papapetrou, Dionisios N. Pnevmatikatos, Apostolos Dollas, Minos N. Garofalakis |
Data Stream Statistics Over Sliding Windows: How to Summarize 150 Million Updates Per Second on a Single Node. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Xinyu Chen 0001, Ronak Bajaj, Yao Chen 0008, Jiong He, Bingsheng He, Weng-Fai Wong, Deming Chen |
On-The-Fly Parallel Data Shuffling for Graph Processing on OpenCL-Based FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Maclellan, Lewis D. McLaughlin, Louise Crockett, Robert W. Stewart |
FPGA Accelerated Deep Learning Radio Modulation Classification Using MATLAB System Objects & PYNQ. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Langhammer, Bogdan Pasca 0001, Gregg Baeckler, Sergey Gribok |
Extracting INT8 Multipliers from INT18 Multipliers. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthew Naylor, Simon W. Moore, David B. Thomas |
Tinsel: A Manythread Overlay for FPGA Clusters. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikolaos Kyparissas, Apostolos Dollas |
An FPGA-Based Architecture to Simulate Cellular Automata with Large Neighborhoods in Real Time. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Roberto Sierra, Filippo Mangani, Carlos Carreras, Gabriel Caffarena |
High-Performance Decoding of Variable-Length Memory Data Packets for FPGA Stream Processing. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Glenn G. Ko, Yuji Chai, Rob A. Rutenbar, David Brooks 0001, Gu-Yeon Wei |
Accelerating Bayesian Inference on Structured Graphs Using Parallel Gibbs Sampling. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Baudouin Chauviere, Pierre-Emmanuel Gaillardon |
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yohann Uguen, Luc Forget, Florent de Dinechin |
Evaluating the Hardware Cost of the Posit Number System. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hossein Omidian, Guy G. F. Lemieux |
Low-Level Loop Analysis and Pipelining of Applications Mapped to Xilinx FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuchen Ren, Zhijian Liao, Xiaozhong Shi, Jinyu Xie, Yunhui Qiu, Hankun Lv, Wenbo Yin, Lingli Wang, Bowei Yu, Hua Chen, Xianjun He |
A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Akira Jinguji, Youki Sada, Hiroki Nakahara |
Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kazuei Hironaka, Kensuke Iizuka, Akram Ben Ahmed, M. M. Imdad Ullah, Yugo Yamauchi, Yuxi Sun 0001, Miho Yamakura, Aoi Hiruma, Hideharu Amano |
Demonstration of Flow-in-Cloud: A Multi-FPGA System. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroki Nakahara, Youki Sada, Masayuki Shimoda, Kouki Sayama, Akira Jinguji, Shimpei Sato |
FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Cretaro |
A Distributed Model of Computation for Reconfigurable Devices Based on a Streaming Architecture. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Leo Liu, Nachiket Kapre |
Timing-Aware Routing in the RapidWright Framework. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Xibo Sun, Hao Zhou 0008, Lingli Wang |
Bent Routing Pattern for FPGA. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Masayuki Shimoda, Youki Sada, Ryosuke Kuramochi, Hiroki Nakahara |
An FPGA Implementation of Real-Time Object Detection with a Thermal Camera. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mario Ruiz, David Sidler, Gustavo Sutter, Gustavo Alonso, Sergio López-Buedo |
Limago: An FPGA-Based Open-Source 100 GbE TCP/IP Stack. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yasuhiro Nitta, Sou Tamura, Hideki Takase |
ZytleBot: FPGA Integrated Development Platform for ROS Based Autonomous Mobile Robot. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ricardo Tapiador-Morales, Antonio Rios-Navarro, Juan Pedro Dominguez-Morales, Daniel Gutierrez-Galan, Alejandro Linares-Barranco |
Spiking Row-by-Row FPGA Multi-Kernel and Multi-Layer Convolution Processor. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantinos Maragos 0001, Endri Taka, George Lentaris, Ioannis Stratakos, Dimitrios Soudris |
Analysis of Performance Variation in 16nm FinFET FPGA Devices. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Rachit Rajat, Hanqing Zeng, Viktor K. Prasanna |
A Flexible Design Automation Tool for Accelerating Quantized Spectral CNNs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shreyas Kolala Venkataramanaiah, Yufei Ma 0002, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao 0001, Jae-sun Seo |
Automatic Compiler Based FPGA Accelerator for CNN Training. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Gagandeep Singh 0002, Dionysios Diamantopoulos, Christoph Hagleitner, Sander Stuijk, Henk Corporaal |
NARMADA: Near-Memory Horizontal Diffusion Accelerator for Scalable Stencil Computations. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Farnoud Farahmand, Duc Tri Nguyen, Viet Ba Dang, Ahmed Ferozpuri, Kris Gaj |
Software/Hardware Codesign of the Post Quantum Cryptography Algorithm NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level Design Methodologies. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kosuke Tatsumura, Alexander Dixon, Hayato Goto |
FPGA-Based Simulated Bifurcation Machine. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Petros Toupas, Andreas Brokalakis, Ioannis Papaefstathiou |
Accelerating Physics Engine Components with Embedded FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Lenos Ioannou, Suhaib A. Fahmy |
Network Intrusion Detection Using Neural Networks on FPGA SoCs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Burkhard Ringlein, François Abel, Alexander Ditter, Beat Weiss, Christoph Hagleitner, Dietmar Fey |
System Architecture for Network-Attached FPGAs in the Cloud using Partial Reconfiguration. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Victor Arribas |
Beyond the Limits: SHA-3 in Just 49 Slices. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu |
Reducing Dynamic Power in Streaming CNN Hardware Accelerators by Exploiting Computational Redundancies. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilias Giechaskiel, Kasper Bonne Rasmussen, Jakub Szefer |
Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ananda Samajdar, Tushar Garg, Tushar Krishna, Nachiket Kapre |
Scaling the Cascades: Interconnect-Aware FPGA Implementation of Machine Learning Problems. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Johan Peltenburg, Jeroen van Straten, Lars Wijtemans, Lars van Leeuwen, Zaid Al-Ars, H. Peter Hofstee |
Fletcher: A Framework to Efficiently Integrate FPGA Accelerators with Apache Arrow. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mikhail Asiatici, Paolo Ienne |
DynaBurst: Dynamically Assemblying DRAM Bursts over a Multitude of Random Accesses. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Younmin Bae, Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Hyesoon Kim |
Capella: Customizing Perception for Edge Devices by Efficiently Allocating FPGAs to DNNs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mrunal Patel, Shenghsun Cho, Michael Ferdman, Peter A. Milder |
Runtime-Programmable Pipelines for Model Checkers on FPGAs. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Li, Erwei Wang, Shane T. Fleming, David B. Thomas, Peter Y. K. Cheung |
Accelerating Position-Aware Top-k ListNet for Ranking Under Custom Precision Regimes. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoyu Yu, Jianlin Gao, Yuwei Wang, Jie Miao, Ephrem Wu, Heng Zhang, Yu Meng, Bo Zhang, Biao Min, Dewei Chen |
A Data-Center FPGA Acceleration Platform for Convolutional Neural Networks. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hosein Mohammadi Makrani, Farnoud Farahmand, Hossein Sayadi, Sara Bondi, Sai Manoj Pudukotai Dinakarrao, Houman Homayoun, Setareh Rafatirad |
Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Philippos Papaphilippou, Holger Pirk, Wayne Luk |
Accelerating the Merge Phase of Sort-Merge Join. |
FPL |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Guo, Hong Ma, Ruizhi Chen, Pin Li, Shaolin Xie, Donglin Wang |
FBNA: A Fully Binarized Neural Network Accelerator. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Shanker Shreejith, Ryan A. Cooke, Suhaib A. Fahmy |
A Smart Network Interface Approach for Distributed Applications on Xilinx Zynq SoCs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Anuj Vaishnav, Khoa Dang Pham, Dirk Koch, James Garside |
Resource Elastic Virtualization for FPGAs Using OpenCL. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Cheng Luo, Yuhua Wang, Wei Cao 0002, Philip H. W. Leong, Lingli Wang |
RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Tong Geng, Tianqi Wang, Ahmed Sanaullah, Chen Yang 0010, Rushi Patel, Martin C. Herbordt |
A Framework for Acceleration of CNN Training on Deeply-Pipelined FPGA Clusters with Work and Weight Load Balancing. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Behzad Salami 0001, Osman S. Unsal, Adrián Cristal |
Fault Characterization Through FPGA Undervolting. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Dani Maarouf, Abeer Alhyari, Ziad Abuowaimer, Timothy Martin, Andrew David Gunter, Gary Gréwal, Shawki Areibi, Anthony Vannelli |
Machine-Learning Based Congestion Estimation for Modern FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sam Amiri, Mohammad Hosseinabady, Andrés Rodríguez 0001, Rafael Asenjo, Angeles G. Navarro, José L. Núñez-Yáñez |
Workload Partitioning Strategy for Improved Parallelism on FPGA-CPU Heterogeneous Chips. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Henri Fraisse, Dinesh Gaitonde |
A SAT-based Timing Driven Place and Route Flow for Critical Soft IP. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Jia Liu, Qiang Liu |
Resource Reduction of BFGS Quasi-Newton Implementation on FPGA Using Fixed-Point Matrix Updating. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankit Wagle, Jinghua Yang, Aykut Dengi, Sarma B. K. Vrudhula |
FPGAs with Reconfigurable Threshold Logic Gates for Improved Performance, Power and Area. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev |
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Thiem Van Chu, Kenji Kise |
An Effective Architecture for Trace-Driven Emulation of Networks-on-Chip on FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingqing Xiong, Anthony Skjellum, Martin C. Herbordt |
Accelerating MPI Message Matching through FPGA Offload. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Stylianos I. Venieris, Christos-Savvas Bouganis |
f-CNNx: A Toolflow for Mapping Multiple Convolutional Neural Networks on FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonathan Déchelotte, Russell Tessier, Dominique Dallet, Jérémie Crenne |
Lynq: A Lightweight Software Layer for Rapid SoC FPGA Prototyping. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Julian Faraone, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong, David Boland |
Customizing Low-Precision Deep Neural Networks for FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Jan Kühn, Yiannos Manoli |
An Application-Specific Field-Programmable Tree Ensemble Architecture. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Frank Callaly |
viciLogic2.0 Online Learning and Prototyping Using PYNQ. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuegong Zhou, Lingli Wang, Peiyi Zhao, Alan Mishchenko |
Fast Adjustable NPN Classification using Generalized Symmetries. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz |
Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ibrahim Ahmed 0001, Shuze Zhao, James Meijers, Olivier Trescases, Vaughn Betz |
Automatic BRAM Testing for Robust Dynamic Voltage Scaling for FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ameer M. S. Abdelhadi, Guy G. F. Lemieux, Lesley Shannon |
Modular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable Memories. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Takuya Kojima, Hideharu Amano |
A Configuration Data Multicasting Method for Coarse-Grained Reconfigurable Architectures. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Zsolt István, Gustavo Alonso, Ankit Singla |
Providing Multi-tenant Services with FPGAs: Case Study on a Key-Value Store. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch 0001 |
ILP-Based Modulo Scheduling and Binding for Register Minimization. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Georgios Chatzianastasiou, George A. Constantinides |
An Efficient FPGA-based Axis-Aligned Box Tool for Embedded Computer Graphics. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott |
FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreea-Ingrid Cross, Liucheng Guo, Wayne Luk, Mark Salmon |
CRRS: Custom Regression and Regularisation Solver for Large-Scale Linear Systems. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi Shan |
ADAS and Video Surveillance Analytics System Using Deep Learning Algorithms on FPGA. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Dustin Richmond, Michael Barrow, Ryan Kastner |
Everyone's a Critic: A Tool for Exploring RISC-V Projects. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Alonso, Mario Ruiz, Angel Lopez Garcia-Arias, Gustavo Sutter, Jorge E. López de Vergara |
Submicrosecond Latency Video Compression in a Low-End FPGA-based System-on-Chip. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk |
Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Yao Liu 0006, Ray C. C. Cheung, Hei Wong |
Lightweight Secure Processor Prototype on FPGA. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara |
Demonstration of Object Detection for Event-Driven Cameras on FPGAs and GPUs. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic |
DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Chirag Ravishankar, Dinesh Gaitonde, Trevor Bauer |
Placement Strategies for 2.5D FPGA Fabric Architectures. |
FPL |
2018 |
DBLP DOI BibTeX RDF |
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