Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Kwen-Siong Chong, Joseph S. Chang, Idongesit E. Ebong, Yalcin Yilmaz, Pinaki Mazumder |
Comparison of FFT/IFFT Designs Utilizing Different Low Power Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 116-119, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Vishal Shrivastav, Satya Gautam Vadlamudi, P. P. Chakrabarti 0001, Dipankar Das 0002, Purnendu Sinha |
Finding Critical Components in Embedded Control Systems Sensitive to Quality-Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 167-171, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Mamata Dalui, Biplab K. Sikdar |
A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 216-220, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Rohith G. 0001, Ajayan K. K. |
Fractional Interpretation of Anomalous Diffusion and Semiconductor Equations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 231-235, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Laxmikandan Thangavelu, Ramakrishna P. V. |
Design Space Exploration and Synthesis of CMOS Low Noise Amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 38-42, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | D. Michael Miller, Zahra Sasanian |
Recent Developments on Mapping Reversible Circuits to Quantum Gate Libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 17-22, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Sudip Roy 0001, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty |
Low-Cost Dilution Engine for Sample Preparation in Digital Microfluidic Biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 203-207, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Bibhash Sen, Manojit Dutta, Debajyoty Banik, Dipak K. Singh, Biplab K. Sikdar |
Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 241-245, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Tapas Kumar Maiti, Subhadip Kundu, Arpita Dutta, Santanu Chattopadhyay |
Confidence Based Power Aware Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 62-66, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Subhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar |
Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 130-134, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Brijesh Kumar, Brajesh Kumar Kaushik, Yuvraj Singh Negi |
Analysis of Contact Resistance Effect on Performance of Organic Thin Film Transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 198-202, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Deep Gupta, R. S. Anand, Barjeev Tyagi |
Enhancement of Medical Ultrasound Images Using Multiscale Discrete Shearlet Transform Based Thresholding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 286-290, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Xingxing Jin, Seok-Bum Ko |
GPU-based Parallel Implementation of SAR Imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 125-129, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Michael Kirkedal Thomsen, Holger Bock Axelsen, Robert Glück |
Cleaning Up: Garbage-Free Reversible Circuits by Design Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 6-10, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Atin Mukherjee 0001, Anindya Sundar Dhar |
Design of a Self-Reconfigurable Adder for Fault-Tolerant VLSI Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 92-96, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Pranab Roy, Moudud Sohid, Sudipta Chakraborty, Hafizur Rahaman 0001, Parthasarathi Dasgupta |
System on Biochips: A New Design for Integration of Multiple DMFBs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 256-260, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Hemant Agrawal, Yashpal Dutta, Sandeep Malik |
Performance Analysis of Offloading IPsec Processing to Hardware Based Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 291-294, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Kamalika Datta, Indranil Sengupta 0001, Hafizur Rahaman 0001 |
Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 226-230, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Vikas Mahor, Akanksha Chouhan, Manisha Pattanaik |
A Process Variation Tolerant Low Contention Keeper Design for Wide Fan-In Dynamic OR Gate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 151-153, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Parthajit Roy, J. K. Mandal 0001 |
A Delaunay Triangulation Preprocessing Based Fuzzy-Encroachment Graph Clustering for Large Scale GIS Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 300-305, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Mousumi Saha, Souvik Das, Biplab K. Sikdar |
High Speed Hardware for March C¯. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 145-147, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Jamil Galadanci, Rishad A. Shafik, Jimson Mathew, Amit Acharyya, Dhiraj K. Pradhan |
A Closed-Loop Control Strategy for Glucose Control in Artificial Pancreas Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 295-299, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Soumyasree Bera, Arun Kumar Singh, Samarendra Nath Sur, Debasish Bhaskar, Rabindranath Bera |
Improvement in Target Detectability Using Spread Spectrum Radar in Dispersive Channel Condition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 264-266, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Sukanta Bhattacharjee, Ansuman Banerjee, Bhargab B. Bhattacharya |
Multiple Dilution Sample Preparation Using Digital Microfluidic Biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 188-192, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | J. Selvakumar, Vidhyacharan Bhaskar, S. Narendran |
FPGA Based Efficient Fast FIR Algorithm for Higher Order Digital FIR Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 43-47, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Ashish Gupta, Gaurav Verma |
Bridging Validation and Automatic Test Equipment (ATE) Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 148-150, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Satarupa Bal, Anup Anurag, B. Chitti Babu |
An Improved Soft Switching DC-DC Converter for Low Power PV Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 276-280, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Manodipan Sahoo, Prasun Ghosal, Hafizur Rahaman 0001 |
Efficient and Compact Electrical Modeling of Multi Walled Carbon Nanotube Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 236-240, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Poornima Mittal, Yuvraj Singh Negi, R. K. Singh |
Analysis of Top and Bottom Contact Organic Transistor Performance for Different Technology Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 261-263, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Surajit Kumar Roy, Sobitri Chatterjee, Chandan Giri |
Identifying Faulty TSVs in 3D Stacked IC during Pre-bond Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 162-166, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | R. Rajendran, P. V. Ramakrishna |
A Design of 6-bit 125-MS/s SAR ADC in 0.13-µm MM/RF CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 23-27, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | K. C. Cinnati Loi, Seok-Bum Ko |
Improvements for High Performance Elliptic Curve Cryptosystem Processor over GF(2^163). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 140-144, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | S. Sivanantham, K. Sarathkumar, Jincy P. Manuel, Partha Sharathi Mallick, J. Raja Paul Perinbam |
CSP-Filling: A New X-Filling Technique to Reduce Capture and Shift Power in Test Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 135-139, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Rajdeep Mukherjee, Priyankar Ghosh, N. Sravan Kumar, Pallab Dasgupta, Ajit Pal |
Multi-objective Low-Power CDFG Scheduling Using Fine-Grained DVS Architecture in Distributed Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 267-271, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Soumya Maity, Padmalochan Bera, S. K. Ghosh |
Policy Based ACL Configuration Synthesis in Enterprise Networks: A Formal Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 314-318, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Gunda Suman, B. V. S. Pavan Kumar, M. Sagar Kumar, B. Chitti Babu, K. R. Subhashini |
Modeling, Analysis and Design of Synchronous Buck Converter Using State Space Averaging Technique for PV Energy System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 281-285, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Anwesha Banerjee, Shounak Datta, Pratyusha Das, Amit Konar, D. N. Tibarewala, Ramadoss Janarthanan |
Electrooculogram Based Online Control Signal Generation for Wheelchair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 251-255, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Syed Ershad Ahmed, Sibi Abraham, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
A Modified Twin Precision Multiplier with 2D Bypassing Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 102-106, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | R. Uma, Jebashini Ponnian |
Systolic FIR Filter Design with Various Parallel Prefix Adders in FPGA: Performance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 111-115, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | S. Rekha, Laxminidhi Tonse |
Effect of Finite Gain and Bandwidth of Feed-Forward Compensated OTA on Active-RC Integrators: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 48-51, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Gayadhar Panda, Santanu Kumar Dash 0002, Nirjharini Sahoo |
Analysis and Operation of FPGA-based Hybrid Active Power Filter for Harmonic Elimination in a Distribution System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 77-81, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Utpal Nandi, J. K. Mandal 0001 |
Fractal Image Compression Using Fast Context Independent HV Partitioning Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 306-308, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Kunal Banerjee 0001, Chandan Karfa, Dipankar Sarkar 0001, Chittaranjan Mandal 0001 |
A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 67-71, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Deepak Chauhan, Sharad Kumar, Manoj Sharma |
Post Silicon Validation of Digital Radio Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 87-91, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Prasun Ghosal, Tuhin Subhra Das |
SD2D: A Novel Routing Architecture for Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 221-225, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Raju Hazari, Kamalika Bhattacharjee, Sukanta Das |
Design of Hardware for Deterministic Nagel-Schreckenberg Traffic Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 154-156, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | |
International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012 ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![IEEE, 978-1-4673-4704-4 The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
1 | Naushad Alam, Bulusu Anand, Sudeb Dasgupta |
The Impact of Process-Induced Mechanical Stress in Narrow Width Devices and Circuit Design Issues. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 213-215, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Sandip Ghosh, Prokash Ghosh, Sourav Roy |
Dynamic Sharing of On-Chip Scratchpad Memory on Embedded Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 120-124, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Fateme Naderpour, Seok-Bum Ko |
Improved Design of High-Radix Signed-Digit Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 107-110, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Pradip Kumar Sahu, Ashish Sharma, Santanu Chattopadhyay |
Application Mapping Onto Mesh-of-Tree Based Network-on-Chip Using Discrete Particle Swarm Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 172-176, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | I. Hiteshwar Rao, Nafisa Ali Amir, Haresh Dagale, Joy Kuri |
e-SURAKSHAK: A Cyber-Physical Healthcare System with Service Oriented Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 177-182, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | K. Swaminathan, G. Lakshminarayanan, Seok-Bum Ko |
High Speed Generic Network Interface for Network on Chip Using Ping Pong Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 72-76, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Vasantha M. H., Tonse Laxminidhi |
0.5 V, Low Power, 1 MHz Low Pass Filter in 0.18 µm CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 33-37, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | C. V. Niras, Vinu Thomas |
Systolic Variable Length Architecture for Discrete Fourier Transform in Long Term Evolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 52-55, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Sumeet Agrawal, Pinal Engineer, Rajbabu Velmurugan, Sachin B. Patkar |
FPGA Implementation of Particle Filter Based Object Tracking in Video. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 82-86, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Santhosh Keshavarapu, Saumya Jain, Manisha Pattanaik |
A New Assist Technique to Enhance the Read and Write Margins of Low Voltage SRAM Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 97-101, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Bimal Kumar Meher, Pramod Kumar Meher |
A New Look-Up Table Approach for High-Speed Finite Field Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 51-55, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Oleg Garitselov, Saraju P. Mohanty, Elias Kougianos, Priyadarsan Patra |
Bee Colony Inspired Metamodeling Based Fast Optimization of a Nano-CMOS PLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 6-11, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Madhumita Sengupta, J. K. Mandal 0001 |
Image Authentication Using Hough Transform Generated Self Signature in DCT Based Frequency Domain (IAHTSSDCT). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 324-328, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Satyajeet Nimgaonkar, Mahadevan Gomathisankaran |
Energy Efficient Memory Authentication Mechanism in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 248-253, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | |
International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011 ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![IEEE Computer Society, 978-1-4577-1880-9 The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP BibTeX RDF |
|
1 | Pratibha Sawhney, G. Ganesh, A. K. Bhattacharjee |
Automatic Construction of Runtime Monitors for FPGA Based Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 164-169, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Wei Jhih Wang, Chang Hong Lin |
An Improved BitMask Based Code Compression Algorithm for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 152-157, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Karthik K. P., P. Rangababu 0001, Samrat L. Sabat, Jagannath Nayak |
System on Chip Implementation of Adaptive Moving Average Based Multiple-Model Kalman Filter for Denoising Fiber Optic Gyroscope Signal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 170-175, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 100-105, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Bibhash Sen, Divyam Saran, Mousumi Saha, Biplab K. Sikdar |
Synthesis of Reversible Universal Logic around QCA with Online Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 236-241, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Yalcin Yilmaz, Pinaki Mazumder |
Threshold Read Method for Multi-bit Memristive Crossbar Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 217-222, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | J. K. Mandal 0001, Somnath Mukhopadhyay |
A Novel Variable Mask Median Filter for Removal of Random Valued Impulses in Digital Images (VMM). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 302-306, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | George Rosario Dhinesh, George Rosario Jagadeesh, Thambipillai Srikanthan |
A Low-Complexity Speaker-and-Word Recognition Application for Resource-Constrained Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 335-340, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Pranab Roy, Hafizur Rahaman 0001, Rupam Bhattacharya, Parthasarathi Dasgupta |
A Best Path Selection Based Parallel Router for DMFBs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 176-181, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Prabir Saha, Arindam Banerjee 0003, Partha Bhattacharyya, Anup Dandapat |
Vedic Divider: Novel Architecture (ASIC) for High Speed VLSI Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 67-71, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Manoj Kumar Meena, Rohit Khanna, Dipankar |
Nonlinear Inductance Measurement Using an Energy Storage Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 30-33, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
A Multiple-Bandwidth 10-bit SAR Analog to Digital Converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 24-29, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Toshanlal Meenpal, Anup K. Bhattacharjee |
High Capacity Reversible Data Hiding Using IWT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 352-357, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Manish Baphna, Anchal Jain, Ashish Mathur |
A Method to Reuse RTL Verification Tests to Validate Cycle Accurate Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 94-99, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | T. C. Lad, Anand D. Darji, S. N. Merchant, Arun N. Chandorkar |
VLSI Implementation of Wavelet Based Robust Image Watermarking Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 56-61, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Dipak Kumar Kole, Hafizur Rahaman 0001, Debesh K. Das, Bhargab B. Bhattacharya |
Derivation of Automatic Test Set for Detection of Missing Gate Faults in Reversible Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 200-205, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Aminul Islam 0002, Mohd. Ajmal Kafeel, Ale Imran, Mohd. Hasan |
Low Active Power High Speed Cache Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 254-259, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Shravan Kudikala, Samrat L. Sabat, Siba K. Udgata |
Performance Study of Harmony Search Algorithm for Analog Circuit Sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 12-17, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Zubair Akhter, Nagendra Prasad Pathak |
Concurrent Dual Band Transmitter for 2.4/5.2GHz Wireless LAN Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 1-5, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Surajit Kumar Roy, Chandan Giri, Arnab Chakraborty, Subhro Mukherjee, Debesh K. Das, Hafizur Rahaman 0001 |
Optimizing Test Architecture for TSV Based 3D Stacked ICs Using Hard SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 230-235, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | S. D. Pable, Mohd. Hasan, Mohd. Ajmal Kafeel |
Performance Analysis of Ultra Low-Power Mixed CNT Interconnects for Scaled Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 285-289, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | S. Srinivasan 0001, V. Kamakoti 0001, A. Bhattacharya |
Towards Quick Solutions for Generalized Placement Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 106-111, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Alok Baluni, Farhad Merchant, S. K. Nandy 0001, Srinivasan Balakrishnan |
A Fully Pipelined Modular Multiple Precision Floating Point Multiplier with Vector Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 45-50, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Manisha Pattanaik, Shashank Parashar, Chaudhry Indra Kumar, Akanksha Chouhan, Vikas Mahor |
A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 118-123, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Amrita Som, Amlan Chakrabarti |
A New BSQDD Approach for Synthesis of Quantum Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 212-216, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Surajit Kumar Roy, Chandan Giri, Sourav Ghosh, Hafizur Rahaman 0001 |
Optimization of Test Wrapper for TSV Based 3D SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 188-193, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Nachiketa Das, Pranab Roy, Hafizur Rahaman 0001 |
Runtime Congestion and Crosstalk Aware Router for FPGA Using Jbits3.0 for Partial Reconfigurable Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 146-151, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Uttam Kr. Mondal, J. K. Mandal 0001 |
A Message Embedded Authentication of Songs to Verify Intellectual Property Right (MEAS). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 313-317, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Ashok Kumar Suhag, Vivek Shrivastava |
Delay Testable Enhanced Scan Flip-Flop: DFT for High Fault Coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 129-133, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | J. K. Mandal 0001, Subhankar Ghatak |
A Novel Technique for Secret Communication through Optimal Shares Using Visual Cryptography (SCOSVC). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 329-334, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Hirak Patangia, Sri Nikhil Gupta Gourisetti |
A Harmonically Superior Switching Modulator with Wide Baseband and Real-Time Tunability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 18-23, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Maghsoudloo, Hamid R. Zarandi, Navid Khoshavi |
Low-Cost Software-Implemented Error Detection Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 318-323, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | K. Sajeesh, Hemangee K. Kapoor |
An Authenticated Encryption Based Security Framework for NoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 134-139, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Jayashree Vaddin, Shaila Subbaraman |
DCSFPSS Assisted Morphological Approach for Grey Twill Fabric Defect Detection and Defect Area Measurement for Fabric Grading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 290-295, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Suresh Kumar Varanasi, Satyam Mandavilli |
Process Variation Tolerant SRAM Cell Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 82-87, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Debaprasad Das, Hafizur Rahaman 0001 |
Crosstalk and Gate Oxide Reliability Analysis in Graphene Nanoribbon Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 182-187, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Luo Sun, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty |
Statistical Blockade Method for Fast Robustness Estimation and Compensation of Nano-CMOS Arithmetic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 194-199, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Parthajit Roy, J. K. Mandal 0001 |
A Novel Fuzzy-GIS Model Based on Delaunay Triangulation to Forecast Facility Locations (FGISFFL). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011, pp. 341-346, 2011, IEEE Computer Society, 978-1-4577-1880-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|