Search results for "Intel"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
16	Lal George, Matthias Blume	Taming the IXP network processor.	PLDI	2003	DBLP DOI BibTeX RDF	Intel IXA, bank assignment, programming languages, code generation, register allocation, integer linear programming, network processors
16	Jiwei Lu, Howard Chen 0002, Rao Fu, Wei-Chung Hsu, Bobbie Othmer, Pen-Chung Yew, Dong-yuan Chen	The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System.	MICRO	2003	DBLP DOI BibTeX RDF	Linux, Intel
16	Nasser Elmasri, Herbert H. J. Hum, Guang R. Gao	The Threaded Communication Library: Preliminary Experiences on a Multiprocessor with Dual-Processor Nodes.	International Conference on Supercomputing	1995	DBLP DOI BibTeX RDF	Tcl, Intel i860
16	Eileen Tien Lin, Edward Omiecinski, Sudhakar Yalamanchili	Large Join Optimization on a Hypercube Multiprocessor.	IEEE Trans. Knowl. Data Eng.	1994	DBLP DOI BibTeX RDF	large join optimization, parallel large join plan, initial solution, iterative local-improvement method, Intel iPSC/2 hypercube machine, performance, computational complexity, parallel programming, query processing, relational database, heuristics, simulated annealing, optimisation, iterative methods, hypercube networks, relational algebra, heuristic programming, NP-hard problem, hypercube multiprocessor, problem complexity, inherent parallelism, large join queries
16	Philip Heidelberger, David M. Nicol	Conservative Parallel Simulation of Continuous Time Markov Chains Using Uniformization.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	queueing networkmodels, conservative parallelsimulation algorithm, Intel iPSC/2 hypercube, Markovprocesses, parallel algorithms, parallel algorithms, discrete event simulation, queueing theory, communications systems, distributed computing systems, uniformization, continuous time Markov chains
16	David H. Bailey	RISC microprocessors and scientific computing.	SC	1993	DBLP DOI BibTeX RDF	RISC, Intel i860
16	François Bodin, Peter H. Beckman, Dennis Gannon, Shelby X. Yang, S. Kesavan, Allen D. Malony, Bernd Mohr	Implementing a parallel C++ runtime system for scalable parallel systems.	SC	1993	DBLP DOI BibTeX RDF	C++, Intel i860
16	Hong Q. Ding	Monte Carlo simulations of Quantum systems on massively parallel computers.	SC	1993	DBLP DOI BibTeX RDF	Intel i860
16	A. M. Finn, M. F. Griffin, W. C. McClurg	Modeling and simulation of an i860-based multiprocessor.	Annual Simulation Symposium	1991	DBLP DOI BibTeX RDF	Intel i860
16	Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy 0001, Vijay Balasubramanian, Jacob A. Abraham	Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF	Intel iPSC hypercube, fault tolerance, parallel architectures, fault tolerant computing, fast Fourier transform, multiprocessing systems, error detection, matrix multiplication, Gaussian elimination, multiprocessor architecture, hypercube multiprocessor, faulty processors
16	Brian R. Nickerson	Graph Coloring Register Allocation for Processors with Multi-Register Operands.	PLDI	1990	DBLP DOI BibTeX RDF	Intel 80960
16	Mark A. Yoder, Leah H. Jamieson	Simulation of a Word Recognition System on Two Parallel Architectures.	IEEE Trans. Computers	1989	DBLP DOI BibTeX RDF	word recognition system, VLSI processor array, 8-MHz MC68000, 12-MHz Intel 8051, simulations, parallel algorithms, parallel algorithms, parallel architectures, parallel architectures, speech recognition, SIMD, digital simulation
16	Thomas L. Adams, Richard E. Zimmerman	An Analysis of 8086 Instruction Set Usage in MS DOS Programs.	ASPLOS	1989	DBLP DOI BibTeX RDF	Intel 8086, MS-DOS
16	Takashi Nanya, Toshiaki Kawamura	Error/Secure/Propagating Concept and its Application to the Design of Strongly Fault-Secure Processors.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	error-secure interfaces, totally self-checking systems, Intel 8080, strongly fault-secure processors, error-propagating interfaces, fault tolerant computing, computer architecture, automatic testing, microprocessor chips, digital system, computer interfaces, 8 bit
16	Goh Wee Leng	An Expert Autonomous Vacuum Cleaner Robot.	IEA/AIE (Vol. 1)	1988	DBLP DOI BibTeX RDF	Intel 8086, Prolog
13	Shan Shan Huang, Todd Jeffrey Green, Boon Thau Loo	Datalog and emerging applications: an interactive tutorial.	SIGMOD Conference	2011	DBLP DOI BibTeX RDF
13	Ramesh Illikkal, Vineet Chadha, Andrew Herdrich, Ravi R. Iyer 0001, Donald Newell	PIRATE: QoS and performance management in CMP architectures.	SIGMETRICS Perform. Evaluation Rev.	2010	DBLP DOI BibTeX RDF
13	Byung-Gon Chun, Gianluca Iannaccone, Giuseppe Iannaccone, Randy H. Katz, Gunho Lee, Luca Niccolini	An energy case for hybrid datacenters.	ACM SIGOPS Oper. Syst. Rev.	2010	DBLP DOI BibTeX RDF
13	Alexander Heinecke, Carsten Trinitis, Josef Weidendorfer	Porting existing cache-oblivious linear algebra HPC modules to larrabee architecture.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	accelerator space-filling curve, openmp, matrix multiplication, cache-oblivious, lu decomposition, manycore
13	Surendra Byna, Jiayuan Meng, Anand Raghunathan, Srimat T. Chakradhar, Srihari Cadambi	Best-effort semantic document search on GPUs.	GPGPU	2010	DBLP DOI BibTeX RDF	best-effort computing, dependency relaxation, supervised semantic indexing, GPGPU, CUDA, document search
13	Sung-Boem Park, Anne Bracy, Hong Wang 0003, Subhasish Mitra	BLoG: post-silicon bug localization in processors using bug localization graphs.	DAC	2010	DBLP DOI BibTeX RDF	IFRA, BLoG, silicon debug, post-silicon validation
13	Gadi Singer, Rajesh Galivanche, Srinivas Patil, Mike Tripp	The Challenges of Nanotechnology and Gigacomplexity.	IEEE Des. Test Comput.	2009	DBLP DOI BibTeX RDF
13	Asim Kadav, Michael M. Swift	Live migration of direct-access devices.	ACM SIGOPS Oper. Syst. Rev.	2009	DBLP DOI BibTeX RDF
13	Stanislav Bratanov, Roman Belenov, Nikita Manovich	Virtual machines: a whole new world for performance analysis.	ACM SIGOPS Oper. Syst. Rev.	2009	DBLP DOI BibTeX RDF
13	Nikola Knezevic, Simon Schubert, Dejan Kostic	Towards a cost-effective networking testbed.	ACM SIGOPS Oper. Syst. Rev.	2009	DBLP DOI BibTeX RDF
13	Micah Dowty, Jeremy Sugerman	GPU virtualization on VMware's hosted I/O architecture.	ACM SIGOPS Oper. Syst. Rev.	2009	DBLP DOI BibTeX RDF
13	Michael Brown, Cyrus Bazeghi, Matthew R. Guthaus, Jose Renau	Measuring and modeling variabilityusing low-cost FPGAs.	FPGA	2009	DBLP DOI BibTeX RDF	variability
13	Rui Yang 0005, Jie Cai, Alistair P. Rendell, V. Ganesh	Use of Cluster OpenMP with the Gaussian Quantum Chemistry Code: A Preliminary Performance Analysis.	IWOMP	2009	DBLP DOI BibTeX RDF	Cluster OpenMP, quantum chemistry code, performance
13	Pavan Yalamanchili, Sumod K. Mohan, Tarek M. Taha	Implementing a hierarchical Bayesian visual cortex model on multi-core processors.	ACM Southeast Regional Conference	2009	DBLP DOI BibTeX RDF	performance, measurement, experimentation
13	Darshan Desai, Gerolf Hoflehner, Arun Kejariwal, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum, Cameron McNairy	Performance Characterization of Itanium® 2-Based Montecito Processor.	SPEC Benchmark Workshop	2009	DBLP DOI BibTeX RDF
13	Hikmet Dursun, Ken-ichi Nomura, Liu Peng, Richard Seymour, Weiqiang Wang, Rajiv K. Kalia, Aiichiro Nakano, Priya Vashishta	A Multilevel Parallelization Framework for High-Order Stencil Computations.	Euro-Par	2009	DBLP DOI BibTeX RDF	single instruction multiple data parallelism, spatial decomposition, message passing, multithreading, Stencil computation
13	Arzhan Kinzhalin, Rodolfo Kohn, David N. Lombard, Ricardo Morin	Enabling the autonomic data center with a smart bare-metal server platform.	ICAC	2009	DBLP DOI BibTeX RDF	asset inventory, autonomic data center, bare metal, manageability standards, pre-boot environment, discovery, provisioning
13	Gregory M. Striemer, Ali Akoglu	Sequence alignment with GPU: Performance and design challenges.	IPDPS	2009	DBLP DOI BibTeX RDF
13	Yoshiyuki Yamashita, Masato Tsuru	Implementing Fast Packet Filters by Software Pipelining on x86 Processors.	APPT	2009	DBLP DOI BibTeX RDF
13	Georgios Tournavitis, Zheng Wang 0001, Björn Franke, Michael F. P. O'Boyle	Towards a holistic approach to auto-parallelization: integrating profile-driven parallelism detection and machine-learning based mapping.	PLDI	2009	DBLP DOI BibTeX RDF	auto-parallelization, machine-learning based parallelism mapping, profile-driven parallelism detection, openmp
13	Alexandru Nicolau, Guangqiang Li, Alexander V. Veidenbaum, Arun Kejariwal	Synchronization optimizations for efficient execution on multi-cores.	ICS	2009	DBLP DOI BibTeX RDF	compilers, synchronization, multithreading, code motion
13	Vipin Sachdeva, Douglas M. Freimuth, Chris Mueller	Evaluating the Jaccard-Tanimoto Index on Multi-core Architectures.	ICCS (1)	2009	DBLP DOI BibTeX RDF
13	John W. O'Leary, Bratin Saha, Mark R. Tuttle	Model Checking Transactional Memory with Spin.	ICDCS	2009	DBLP DOI BibTeX RDF
13	Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez	Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves.	CANS	2009	DBLP DOI BibTeX RDF	supersingular curve, multi-core, Tate pairing, finite field arithmetic, ? T pairing
13	Anna Inn-Tung Chen, Ming-Shing Chen, Tien-Ren Chen, Chen-Mou Cheng, Jintai Ding, Eric Li-Hsiang Kuo, Frost Yu-Shuang Lee, Bo-Yin Yang	SSE Implementation of Multivariate PKCs on Modern x86 CPUs.	CHES	2009	DBLP DOI BibTeX RDF	multivariate public key cryptosystem (MPKC), ?IC, vector instructions, SSSE3, Wiedemann, TTS, rainbow, SSE2
13	Aleksandar Dragojevic, Yang Ni, Ali-Reza Adl-Tabatabai	Optimizing transactions for captured memory.	SPAA	2009	DBLP DOI BibTeX RDF	software transactional memory, runtime optimizations
13	Markus Püschel	Automatic synthesis of high performance mathematical programs.	ISSAC	2009	DBLP DOI BibTeX RDF	parallelization, domain-specific language, automation, vectorization, high performance, fourier transform, matrix algebra, rewriting, program generation
13	Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev, Stamatis Vassiliadis	Test Set Development for Cache Memory in Modern Microprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
13	Fadi N. Sibai	Evaluating the performance of single and multiple core processors with PCMARK®05 and benchmark analysis.	SIGMETRICS Perform. Evaluation Rev.	2008	DBLP DOI BibTeX RDF	performance benchmark, single and dual core processors, workload characterization
13	Wessam Hassanein, Layali K. Rashid, Moustafa A. Hammad	Analyzing the Effects of Hyperthreading on the Performance of Data Management Systems.	Int. J. Parallel Program.	2008	DBLP DOI BibTeX RDF	Hyper-threaded architectures, Performance, Databases, Simultaneous multithreading, Data management systems
13	Sachin S. Sapatnekar	Adapting to the times [review of Adaptive Techniques for Dynamic Processor Optimization: Theory and Practice (Wang, A. and Naffziger, S., Eds.; 2008)].	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
13	Stéphane Zuckerman, Marc Pérache, William Jalby	Fine Tuning Matrix Multiplications on Multicore.	HiPC	2008	DBLP DOI BibTeX RDF	multicore, cache coherency, BLAS
13	Juan Carlos Pichel, David E. Singh, Jesús Carretero 0001	Reordering Algorithms for Increasing Locality on Multicore Processors.	HPCC	2008	DBLP DOI BibTeX RDF
13	N. Fujimoto	Faster matrix-vector multiplication on GeForce 8800GTX.	IPDPS	2008	DBLP DOI BibTeX RDF
13	Samuel Williams 0001, Jonathan Carter, Leonid Oliker, John Shalf, Katherine A. Yelick	Lattice Boltzmann simulation optimization on leading multicore platforms.	IPDPS	2008	DBLP DOI BibTeX RDF
13	Junho Ahn, Jung-Hi Min, Hojung Cha, Rhan Ha	A Power Management mechanism for Handheld Systems having a Multimedia Accelerator.	PerCom	2008	DBLP DOI BibTeX RDF	handheld systems, multimedia accelerator, power management, CPU
13	Amith R. Mamidala, Rahul Kumar, Debraj De, Dhabaleswar K. Panda 0001	MPI Collectives on Modern Multicore Clusters: Performance Optimizations and Communication Characteristics.	CCGRID	2008	DBLP DOI BibTeX RDF	MPI Collectives, Multicore
13	Daria Loi	Of participation in industry: a hybridized possibility?	PDC	2008	DBLP BibTeX RDF	hybrid participatory tools, user experience, case study
13	Anna Slobodová	Formal Verification of Hardware Support for Advanced Encryption Standard.	FMCAD	2008	DBLP DOI BibTeX RDF
13	Jia Zou 0001, Zhiyong Liang, Yiqi Dai	Scalability Evaluation and Optimization of Multi-Core SIP Proxy Server.	ICPP	2008	DBLP DOI BibTeX RDF
13	Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Cache-aware iteration space partitioning.	PPoPP	2008	DBLP DOI BibTeX RDF	load balancing, caches
13	Haipeng Cheng, Zheng Chen, Bei Hua, Xinan Tang	Scalable packet classification using interpreting: a cross-platform multi-core solution.	PPoPP	2008	DBLP DOI BibTeX RDF	architecture, multithreading, network processor, packet classification, thread-level parallelism, embedded system design
13	Fariaz Karim	A peer-to-peer approach to providing QoS monitoring for web service activities.	Middleware (Companion)	2008	DBLP DOI BibTeX RDF	QoS, web service, middleware, P2P
13	Stuart A. Golden, Steve S. Bateman	Sensor Measurements for Wi-Fi Location with Emphasis on Time-of-Arrival Ranging.	IEEE Trans. Mob. Comput.	2007	DBLP DOI BibTeX RDF	WLAN, GPS, indoor location, time of arrival
13	Wei Zhong, Gulsah Altun, Xinmin Tian, Robert W. Harrison, Phang C. Tai, Yi Pan 0001	Parallel protein secondary structure prediction schemes using Pthread and OpenMP over hyper-threading technology.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	DBNN (Denoeux Belief Neural Network), MPI (Message Passing Interface), Hyper-threading, BLOSUM62 matrix, Hydrophobicity matrix, PSSM (Position Specific Scoring Matrix), Neural networks, Parallel architecture, OpenMP, Speedup, Pthread, Protein secondary structure prediction
13	Qiang Zhu 0008, Aviral Shrivastava, Nikil D. Dutt	Interactive presentation: Functional and timing validation of partially bypassed processor pipelines.	DATE	2007	DBLP DOI BibTeX RDF
13	Md. Mafijul Islam	On the Limitations of Compilers to Exploit Thread-Level Parallelism in Embedded Applications.	ACIS-ICIS	2007	DBLP DOI BibTeX RDF
13	Amit Kumar 0008, Ram Huggahalli	Impact of Cache Coherence Protocols on the Processing of Network Traffic.	MICRO	2007	DBLP DOI BibTeX RDF
13	Steve Pawlowski	Petascale Computing Research Challenges - A Manycore Perspective.	HPCA	2007	DBLP DOI BibTeX RDF
13	Larry Meadows	OpenMP 3.0 - A Preview of the Upcoming Standard.	HPCC	2007	DBLP DOI BibTeX RDF
13	Chun Chen 0002, Jaewook Shin, Shiva Kintali, Jacqueline Chame, Mary W. Hall	Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study.	IPDPS	2007	DBLP DOI BibTeX RDF
13	Michael Bader, Robert Franz, Stephan Günther, Alexander Heinecke	Hardware-Oriented Implementation of Cache Oblivious Matrix Operations Based on Space-Filling Curves.	PPAM	2007	DBLP DOI BibTeX RDF
13	T. K. S. Lakshmi Priya, V. Hari Prasad, D. Kannan, L. Karthik Singaram, G. Madhan, R. Meenakshi Sundaram, R. M. Prasad, Ranjani Parthasarathi	Evaluating the Network Processor Architecture for Application-Awareness.	COMSWARE	2007	DBLP DOI BibTeX RDF
13	Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau	Retargetable pipeline hazard detection for partially bypassed processors.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
13	Erik A. Hendriks, Ronald G. Minnich	How to build a fast and reliable 1024 node cluster with only one disk.	J. Supercomput.	2006	DBLP DOI BibTeX RDF
13	Batya Friedman, Ian E. Smith, Peter H. Kahn Jr., Sunny Consolvo, Jaina Selawski	Development of a Privacy Addendum for Open Source Licenses: Value Sensitive Design in Industry.	UbiComp	2006	DBLP DOI BibTeX RDF
13	Sanghyun Park, Eugene Earlie, Aviral Shrivastava, Alex Nicolau, Nikil D. Dutt, Yunheung Paek	Automatic generation of operation tables for fast exploration of bypasses in embedded processors.	DATE	2006	DBLP DOI BibTeX RDF
13	Sanjay Rungta, Alex Rentzis, Jeff Sedayao, Robert Adams, Paul Brett	Monitoring Internet Connectivity using PlanetLab.	NOMS	2006	DBLP DOI BibTeX RDF
13	Ken Kennedy	Software Challenges for Multicore Computing.	HiPC	2006	DBLP DOI BibTeX RDF
13	Jack Liu, Youfeng Wu	Performance Characterization of the 64-bit x86 Architecture from Compiler Optimizations' Perspective.	CC	2006	DBLP DOI BibTeX RDF
13	Moti Klein, Adar Kalir	A full factory transient simulation model for the analysis of expected performance in a transition period.	WSC	2006	DBLP DOI BibTeX RDF
13	Subhash Saini, Robert Ciotti, Brian T. N. Gunney, Thomas E. Spelce, Alice E. Koniges, Don Dossa, Panagiotis A. Adamidis, Rolf Rabenseifner, Sunil R. Tiyyagura, Matthias S. Müller, Rod Fatoohi	Performance evaluation of supercomputers using HPCC and IMB benchmarks.	IPDPS	2006	DBLP DOI BibTeX RDF
13	Anna Slobodová	Challenges for Formal Verification in Industrial Setting.	FMICS/PDMC	2006	DBLP DOI BibTeX RDF
13	Pawel Gepner, Michal Filip Kowalik	Multi-Core Processors: New Way to Achieve High System Performance.	PARELEC	2006	DBLP DOI BibTeX RDF
13	Damian Dechev, Peter Pirkelbauer, Bjarne Stroustrup	Lock-Free Dynamically Resizable Arrays.	OPODIS	2006	DBLP DOI BibTeX RDF	real-time systems, concurrency, C++, vector, lock-free, STL
13	Wessam Hassanein, Moustafa A. Hammad, Layali K. Rashid	Characterizing the Performance of Data Management Systems on Hyper-Threaded Architectures.	SBAC-PAD	2006	DBLP DOI BibTeX RDF
13	Chester Rebeiro, A. David Selvakumar, A. S. L. Devi	Bitslice Implementation of AES.	CANS	2006	DBLP DOI BibTeX RDF
13	Leendert van Doorn	Hardware virtualization trends.	VEE	2006	DBLP DOI BibTeX RDF
13	Bob Ward	Computer Society Connection.	Computer	2005	DBLP DOI BibTeX RDF	membership news, IEEE Computer Society
13	Ben Wun, Jeremy Buhler, Patrick Crowley	Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor.	IEEE PACT	2005	DBLP DOI BibTeX RDF
13	S. Govind, R. Govindarajan	Performance Modeling and Architecture Exploration of Network Processors.	QEST	2005	DBLP DOI BibTeX RDF
13	Alexandros Stamatakis, Michael Ott 0001, Thomas Ludwig 0002	RAxML-OMP: An Efficient Program for Phylogenetic Inference on SMPs.	PaCT	2005	DBLP DOI BibTeX RDF
13	Franz Franchetti, Yevgen Voronenko, Markus Püschel	Formal loop merging for signal transforms.	PLDI	2005	DBLP DOI BibTeX RDF	linear signal transform, domain-specific language, DFT, discrete Fourier transform, loop optimization, automatic performance tuning
13	Thomas H. Dunigan, Jeffrey S. Vetter, Patrick H. Worley	Performance Evaluation of the SGI Altix 3700.	ICPP	2005	DBLP DOI BibTeX RDF
13	Meng-Shiou Wu, Ricky A. Kendall, Kyle Wright	Optimizing Collective Communications on SMP Clusters.	ICPP	2005	DBLP DOI BibTeX RDF
13	Leonid Oliker, Jonathan Carter, Michael F. Wehner, Andrew Canning, Stéphane Ethier, Arthur A. Mirin, David Parks, Patrick H. Worley, Shigemune Kitawaki, Yoshinori Tsuda	Leading Computational Methods on Scalar and Vector HEC Platforms.	SC	2005	DBLP DOI BibTeX RDF
13	Long Li, Bo Huang 0002, Jinquan Dai, Luddy Harrison	Automatic multithreading and multiprocessing of C programs for IXP.	PPoPP	2005	DBLP DOI BibTeX RDF	network processor, multi-threading, critical section, code motion, multi-processing
13	Ron Brightwell, Trammell Hudson, Kevin T. Pedretti, Rolf Riesen, Keith D. Underwood	Implementation and Performance of Portals 3.3 on the Cray XT3.	CLUSTER	2005	DBLP DOI BibTeX RDF
13	G. Alan Creak	Parsing by numbers and asparagus.	ACM SIGPLAN Notices	2004	DBLP DOI BibTeX RDF
13	T. M. Mak, Mike Tripp, Anne Meixner	Testing Gbps Interfaces without a Gigahertz Tester.	IEEE Des. Test Comput.	2004	DBLP DOI BibTeX RDF
13	Sebastian Winkel	Exploring the Performance Potential of Itanium® Processors with ILP-based Scheduling.	CGO	2004	DBLP DOI BibTeX RDF
13	Stefan Kral, Franz Franchetti, Juergen Lorenz, Christoph W. Ueberhuber, Peter Wurzinger	FFT Compiler Techniques.	CC	2004	DBLP DOI BibTeX RDF
13	Rong Xu, Zhiyuan Li 0001	Using cache mapping to improve memory performance handheld devices.	ISPASS	2004	DBLP DOI BibTeX RDF
13	Jesse Zhixi Fang	A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To?	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
13	Justin J. Song, Eric Q. Li, Wei Hu 0002, Steven Ge, Chunrong Lai, Yimin Zhang 0002, Xuegong Zhang, Wenguang Chen, Weimin Zheng	Parallelization of Bayesian Network based SNPs Pattern Analysis and Performance Characterization on SMP/HT.	ICPADS	2004	DBLP DOI BibTeX RDF