Search results for "MOS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
17	Nate Kushman, Srikanth Kandula, Dina Katabi	Can you hear me now?!: it must be BGP.	Comput. Commun. Rev.	2007	DBLP DOI BibTeX RDF	burst losses, VoIP, BGP, MOS, PESQ
17	Kay Suenaga, Rodrigo Picos, Sebastià A. Bota, Miquel Roca 0001, Eugeni Isern 0001, Eugenio García	A Module for BiST of CMOS RF Receivers.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	RF-IC, Test, Built-in-self-test, MOS, Mixers
17	Amjad M. Daoud	Perfect hash functions for large dictionaries.	CIMS	2007	DBLP DOI BibTeX RDF	indexing, random graphs, MOS, perfect hashing, acyclic
17	Jagadeesh Balam, Jerry D. Gibson	Multiple descriptions and path diversity using the AMR-WB speech codec for voice communication over MANETs.	IWCMC	2006	DBLP DOI BibTeX RDF	AMR-WB, WPESQ, voice quality indicator, mobile ad-hoc networks, 802.11, MOS, voice communications, path diversity, multiple descriptions
17	Johnny Matta, Christine Pépin, Khosrow Lashkari, Ravi Jain	A source and channel rate adaptation algorithm for AMR in VoIP using the Emodel.	NOSSDAV	2003	DBLP DOI BibTeX RDF	emodel, QoS, VoIP, forward error correction, MOS, AMR
17	Jose Joskowicz, José Carlos López-Ardao	Enhancements to the opinion model for video-telephony applications.	LANC	2009	DBLP DOI BibTeX RDF	VoIP network design, video perceptual quality, video signal processing, video codecs
17	Cosmin Popa	Improved Accuracy Pseudo-Exponential Function Generator With Applications in Analog Signal Processing.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
17	Jörgen Gustafsson, Gunnar Heikkilä, Martin Pettersson	Measuring multimedia quality in mobile networks with an objective parametric model.	ICIP	2008	DBLP DOI BibTeX RDF
17	Shayma Alkobaisi, Petr Vojtechovský, Wan D. Bae, Seon Ho Kim, Scott T. Leutenegger	The Truncated Tornado in TMBB: A Spatiotemporal Uncertainty Model for Moving Objects.	DEXA	2008	DBLP DOI BibTeX RDF
17	Jens Berger, Arpad Hellenbart, Benjamin Weiss 0001, Sebastian Möller 0001, Jörgen Gustafsson, Gunnar Heikkilä	Estimation of 'quality per call' in modelled telephone conversations.	ICASSP	2008	DBLP DOI BibTeX RDF
17	John Fitzpatrick, Seán Murphy, Mohammed Atiquzzaman, John Murphy 0001	ECHO: A Quality of Service Based Endpoint Centric Handover Scheme for VoIP.	WCNC	2008	DBLP DOI BibTeX RDF
17	Antonio LaTorre, José María Peña Sánchez, Víctor Robles, Santiago Muelas	Using multiple offspring sampling to guide genetic algorithms to solve permutation problems.	GECCO	2008	DBLP DOI BibTeX RDF	hybrid evolutionary methods, multiple offspring sampling, genetic algorithms, traveling salesman problem, permutation problems
17	Naeem Khalid, Hafiz Farooq Ahmad, Hiroki Suguri	Software Agents Mediated Interoperability among Heterogeneous Semantic Services.	IAT	2008	DBLP DOI BibTeX RDF
17	Melanie Grah, Peter J. Radcliffe	Dynamic QoS and Network Control for Commercial VoIP Systems in Future Heterogeneous Networks.	ISM	2008	DBLP DOI BibTeX RDF
17	Antonio Jesús Torralba Silgado, Juan Antonio Gómez Galán, Clara Isabel Luján-Martínez, Ramón González Carvajal, Jaime Ramírez-Angulo, Antonio J. López-Martín	Comparison of programmable linear resistors based on quasi-floating gate MOSFETs.	ISCAS	2008	DBLP DOI BibTeX RDF
17	Hongwu Yang, Weitong Guo, Qingqing Liang	A Speaking Rate Adjustable Digital Speech Repeater for Listening Comprehension in Second-Language Learning.	CSSE (5)	2008	DBLP DOI BibTeX RDF
17	Andrea Calimera, Enrico Macii, Massimo Poncino, R. Iris Bahar	Temperature-insensitive synthesis using multi-vt libraries.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	multi-threshold voltage, temperature-aware, logic synthesis
17	Wonsuk Choi, Dongwoo Lee, Jongwhoa Na	Applicability of No-Hands Computer Input Devices for the Certificates for Microsoft Office Software.	ICCHP	2008	DBLP DOI BibTeX RDF	no-hands mouse, employment problem, benchmark
17	Dong-Shong Liang, Kwang-Jow Gan	New D-Type Flip-Flop Design Using Negative Differential Resistance Circuits.	DELTA	2008	DBLP DOI BibTeX RDF	negative differential resistance(NDR), monostable-bistable transition logic elements(MOBILE)
17	Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei	A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts.	VLSI Design	2008	DBLP DOI BibTeX RDF
17	Kostas Pentikousis, Esa Piri, Jarno Pinola, Frerk Fitzek, Tuomas Nissilä, Ilkka Harjula	Empirical evaluation of VoIP aggregation over a fixed WiMAX testbed.	TRIDENTCOM	2008	DBLP DOI BibTeX RDF	G.723.1, VoIP aggregation, WiMAX testbeds, VoIP, WiMAX, network measurements, IEEE 802.16
17	Jay B. Brockman, Sheng Li 0007, Peter M. Kogge, Amit Kashyap, Mohammad M. Mojarradi	Design of a mask-programmable memory/multiplier array using G4-FET technology.	DAC	2008	DBLP DOI BibTeX RDF	G4-FET, gate array
17	Fabrice Guigues, Edith Kussener, Benjamin Duval, Hervé Barthélemy	Moderate Inversion: Highlights for Low Voltage Design.	PATMOS	2007	DBLP DOI BibTeX RDF
17	Cosmin Popa	Low-Voltage Low-Power Curvature-Corrected Voltage Reference Circuit Using DTMOSTs.	PATMOS	2007	DBLP DOI BibTeX RDF
17	Tao Wan, Karine Zeitouni, Xiaofeng Meng 0001	An OLAP system for network-constrained moving objects.	SAC	2007	DBLP DOI BibTeX RDF	spatiotemporal indexing, query optimization, OLAP, moving object databases, aggregate queries
17	Paul Kucher, Shantanu Chakrabartty	An Energy-Scalable Margin Propagation-Based Analog VLSI Support Vector Machine.	ISCAS	2007	DBLP DOI BibTeX RDF
17	Asad Awan, Suresh Jagannathan, Ananth Grama	Macroprogramming heterogeneous sensor networks using cosmos.	EuroSys	2007	DBLP DOI BibTeX RDF	wireless sensor networks, heterogeneous networks, dataflow, macroprogramming
17	Jaijeet S. Roychowdhury, Robert C. Melville	Delivering global DC convergence for large mixed-signal circuits via homotopy/continuation methods.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
17	Yousuke Hashimoto, Yutaka Ishibashi	Influences of network latency on interactivity in networked rock-paper-scissors.	NETGAMES	2006	DBLP DOI BibTeX RDF	rock-paper-scissors, interactivity, video, voice, network latency
17	Shoaib Khan, Svetoslav Duhovnikov, Eckehard G. Steinbach, Marco Sgroi, Wolfgang Kellerer	Application-driven cross-layer optimization for mobile multimedia communication using a common application layer quality metric.	IWCMC	2006	DBLP DOI BibTeX RDF	multi-user resource allocation, wireless multimedia communication, mean opinion score, cross-layer optimization
17	Chune Zhang, Zhengding Qiu, Dongmei Sun, Jie Wu 0010	Euclidean Quality Assessment for Binary Images.	ICPR (2)	2006	DBLP DOI BibTeX RDF
17	Sanghwa Yuh, Jungyun Seo	Multilingual Machine Translation of Closed Captions for Digital Television with Dynamic Dictionary Adaptation.	ICCPOL	2006	DBLP DOI BibTeX RDF	Multilingual Machine Translation, Dynamic Dictionary Adaptation, Named Entity Alignment, Dynamic Domain Identification, Closed Caption
17	Z. Wang, Hüseyin Serif Savci, Numan Sadi Dogan	1-V ultra-low-power CMOS LC VCO for UHF quadrature signal generation.	ISCAS	2006	DBLP DOI BibTeX RDF
17	Hamid Charkhkar, Alireza Asadi, Reza Lotfi	A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter.	ISCAS	2006	DBLP DOI BibTeX RDF
17	Shantanu Chakrabartty	CMOS analog iterative decoders using margin propagation circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
17	Trung-Kien Nguyen, Sang-Gug Lee 0001	Low-voltage, low-power CMOS operation transconductance amplifier with rail-to-rail differential input range.	ISCAS	2006	DBLP DOI BibTeX RDF
17	Baris Koc, Adil Koukab, Günhan Dündar	Phase noise in bipolar and CMOS VCO's - an analytical comparison.	ISCAS	2006	DBLP DOI BibTeX RDF
17	Chunyan Wang 0004	Implementation of space-efficient voltage-insensitive capacitances in integrated circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
17	F. C. Castaldo, C. A. Reis Filho	Transversal noise current in split-drain transistors.	ISCAS	2006	DBLP DOI BibTeX RDF
17	José Luis Rosselló, Sebastià A. Bota, Vicent Canals, Ivan de Paúl, Jaume Segura 0001	A Fully CMOS Low-Cost Chaotic Neural Network.	IJCNN	2006	DBLP DOI BibTeX RDF
17	Dimiter Alexandrov, Rozalina Dimitrrova, K. Scott Butcher, Marie Wintrebert-Fouquet, Richard Perks	Field Effect Transistor on Hetero-Structure GaN/InxGa1-xN.	CCECE	2006	DBLP DOI BibTeX RDF
17	Dong-Shong Liang, Cheng-Chi Tai, Kwang-Jow Gan, Cher-Shiung Tsai, Yaw-Hwang Chen	Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process.	APCCAS	2006	DBLP DOI BibTeX RDF
17	Yuhua Cheng, Xiaobo Wu, Xiaolang Yan	Translinear Loop Principle and Identification of the Translinear Loops.	APCCAS	2006	DBLP DOI BibTeX RDF
17	Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy	0.8 V GPS band CMOS VCO with 29% Tuning Range.	APCCAS	2006	DBLP DOI BibTeX RDF
17	Kun-Yi Lin, Ro-Min Weng	A Low-power Tunable Bandpass Amplifier for RF Applications.	APCCAS	2006	DBLP DOI BibTeX RDF
17	Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy	Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System.	APCCAS	2006	DBLP DOI BibTeX RDF
17	Toshiyuki Yoshida, Takamichi Miyata	Adaptive frame interval control and its quality estimation.	ICIP (2)	2005	DBLP DOI BibTeX RDF
17	Lin Jia, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do	A novel methodology for the design of LC tank VCO with low phase noise.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
17	Lu Liu, Zhihua Wang 0001, Guolin Li	Calculation of intermodulation distortion in CMOS transconductance stage.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
17	Mohammad M. Ahmadi, Graham A. Jullien	A new CMOS charge pump for low voltage applications.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
17	Amir Fijany, Farrokh Vatan, Mohammad M. Mojarradi, Nikzad Benny Toomarian, Benjamin J. Blalock, Kerem Akarvardar, Sorin Cristoloveanu, Pierre Gentil	The G4-FET: a universal and programmable logic gate.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	G4-FET, programmable gate, universal logic gate, full adder
17	Walid Elgharbawy, Magdy A. Bayoumi	New Bulk Dynamic Threshold NMOS Schemes for Low-Energy Subthreshold Domino-Like Circui.	ISVLSI	2004	DBLP DOI BibTeX RDF
17	Ferdinando Bedeschi, Edoardo Bonizzoni, Andrea Fantini, Claudio Resta, Guido Torelli	A low-power low-voltage MOSFET-only voltage reference.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
17	Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda	A Charge Correction Cell for FGMOS-Based Circuits.	SBCCI	2003	DBLP DOI BibTeX RDF	FGMOS analog circuits, Floating gate charge correction
17	D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel	SOI Transistor Model for Fast Transient Simulation.	ICCAD	2003	DBLP DOI BibTeX RDF
17	Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal, Chad Lackey	Low-voltage closed-loop amplifier circuits based on quasi-floating gate transistors.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
17	Antonio Buonomo, Alessandro Lo Schiavo	Determining the oscillation of differential VCOs.	ISCAS (3)	2003	DBLP DOI BibTeX RDF
17	Nabil J. Sarhan, Chita R. Das	An Integrated Resource Sharing Policy for Multimedia Storage Servers Based on Network-Attached Disks.	ICDCS	2003	DBLP DOI BibTeX RDF
17	Rafik S. Guindi, Farid N. Najm	Design Techniques for Gate-Leakage Reduction in CMOS Circuits.	ISQED	2003	DBLP DOI BibTeX RDF
17	João P. B. Botelho, Leonardo Bruno de Sá, Pedro F. Vieira, Antonio Carneiro de Mesquita Filho	An Experiment on Nonlinear Synthesis Using Evolutionary Techniques Based only on CMOS Transistors.	Evolvable Hardware	2003	DBLP DOI BibTeX RDF
17	Xiaofang Gao, Juin J. Liou, Joe Bernier, Gregg D. Croft, Adelmo Ortiz-Conde	Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
17	Darius Jakonis, Christer Svensson	A 1 GHz linearized CMOS track-and-hold circuit.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
17	Yigang He, Jinguang Jiang, Yichuang Sun	CMOS R-MOSFET-C fourth-order Bessel filter with accurate group delay.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
17	Reid R. Harrison	A wide-linear-range subthreshold CMOS transconductor employing the back-gate effect.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
17	Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera	A micropower log domain FGMOS filter.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
17	Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, Philippe Renaud, C. Hibert, Philippe Flückiger, G. A. Racine	Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture.	ISQED	2002	DBLP DOI BibTeX RDF
17	Pradip Mandal, V. Visvanathan	CMOS op-amp sizing using a geometric programming formulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
17	A. B. M. Harun-ur Rashid, Mazuhidul Karim, Syed Mahfuzul Aziz	Testing complementary pass-transistor logic circuits.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
17	Bertram Emil Shi	CNN models of current mode neuromorphic networks.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
17	Kazuo Aoyama, Hiroshi Sawada, Akira Nagoya, Kazuo Nakajima	A Threshold Logic-Based Reconfigurable Logic Element with a New Programming Technology.	FPL	2000	DBLP DOI BibTeX RDF
17	Makoto Syuto, Jing Shen, Koichi Tanno, Okihiko Ishizuka	Multi-Input Variable-Threshold Circuits for Multi-Valued Logic Functions.	ISMVL	2000	DBLP DOI BibTeX RDF
17	Shunichi Kaeriyama, Takahiro Hanyu, Michitaka Kameyama	Arithmetic-Oriented Multiple-Valued Logic-in-Memory VLSI Based on Current-Mode Logic.	ISMVL	2000	DBLP DOI BibTeX RDF
17	Hendrawan Soeleman, Kaushik Roy 0001, Bipul Chandra Paul	Robust ultra-low power sub-threshold DTMOS logic.	ISLPED	2000	DBLP DOI BibTeX RDF
17	Carl James Debono, Franco Maloberti, Joseph Micallef	A low-voltage CMOS multiplier for RF applications (poster session).	ISLPED	2000	DBLP DOI BibTeX RDF	CMOS, low-voltage, RF, analog multiplier
17	Thomas Enderes, Swee Chern Khoo, Clare A. Somerville, Kostas Samaras	Impact of statistical multiplexing on voice quality in cellular networks.	MSWiM	2000	DBLP DOI BibTeX RDF	TDMA
17	Kamran Eshraghian	Deep Submicron USLI Design Paradigm: Who is Writing the Future?	ISQED	2000	DBLP DOI BibTeX RDF
17	Feng Zhou, Zhijun Huang, Jiarong Tong, Pushan Tang	An Analytical Delay Model for SRAM-Based FPGA Interconnections.	ASP-DAC	1999	DBLP DOI BibTeX RDF
17	Soliman A. Mahmoud, Ahmed M. Soliman	The current-feedback differential difference amplifier: new CMOS realization with rail to rail class-AB output stage.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
17	Paul E. Hasler, Bradley A. Minch, Chris Diorio	Adaptive Circuits Using pFET Floating-Gate Devices.	ARVLSI	1999	DBLP DOI BibTeX RDF
17	Richard Plasun, Michael Stockinger, Siegfried Selberherr	Integrated optimization capabilities in the VISTA technology CAD framework.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
17	Kohei Iseda, Takafumi Chujo, T. Suzuki	CORBA-based network operation system architecture.	NOMS	1998	DBLP DOI BibTeX RDF
17	S. M. Aziz, Joarder Kamruzzaman	Fault Characterization of Low Capacitance Full-Swing BiCMOS Logic Circuits.	Asian Test Symposium	1998	DBLP DOI BibTeX RDF
17	Srinivasan Venkatraman, Srikanth Natarajan, K. Radhakrishna Rao	A Low Power Video Frequency Continuous Time Filter.	VLSI Design	1998	DBLP DOI BibTeX RDF
17	Abhijit Dharchoudhury, Sung-Mo Kang, Hungse Cha, Janak H. Patel	Fast timing simulation of transient faults in digital circuits.	ICCAD	1994	DBLP DOI BibTeX RDF
17	Sreejit Chakravarty, Xin He, S. S. Ravi	Minimum area layout of series-parallel transistor networks is NP-hard.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
17	Todd Heywood, Arif Ghafoor, Jim K. Chan	Deterministic simulation of PRAMs on hypercube networks without look-up tables.	SPDP	1990	DBLP DOI BibTeX RDF
17	Shiuh-Wuu Lee	Universality of mobility-gate field characteristics of electrons in the inversion charge layer and its application in MOSFET modeling.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
17	Janusz A. Brzozowski, Carl-Johan H. Seger	A unified framework for race analysis of asynchronous networks.	J. ACM	1989	DBLP DOI BibTeX RDF
17	Shiuh-Wuu Lee, Robert C. Rennick	A compact IGFET model-ASIM.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
17	Laxmi N. Bhuyan	Introduction to session R2 (session overiew): advanced computer architectures.	ACM Conference on Computer Science	1985	DBLP DOI BibTeX RDF
17	Anthony F. Hutchings, Richard J. Bonneau, William M. Fisher	Integrated VLSI CAD systems at Digital Equipment Corporation.	DAC	1985	DBLP DOI BibTeX RDF
17	Randal E. Bryant, Michael Dd. Schuster	Performance evaluation of FMOSSIM, a concurrent switch-level fault simulator.	DAC	1985	DBLP DOI BibTeX RDF
16	Greg James, Barry Silverman, Brian Silverman	Visualizing a classic CPU in action: the 6502.	SIGGRAPH Talks	2010	DBLP DOI BibTeX RDF	MOS 6502, simulation, visualization, microprocessor, integrated circuit, computer history
16	Sepideh Ghanavati, Daniel Amyot, Alberto Siena, Angelo Susi, Anna Perini	Towards a Framework for Business Process Compliance.	EDOCW	2010	DBLP DOI BibTeX RDF	legal modeling, N`{o}mos, business processes, Goal modeling, User Requirements Notation
16	P. Balasubramaniam 0001, A. Vincent Antony Kumar	Solution of matrix Riccati differential equation for nonlinear singular system using genetic programming.	Genet. Program. Evolvable Mach.	2009	DBLP DOI BibTeX RDF	AMS (MOS) Subject Classifications 49J15, 92D10
16	T. P. Ma	Novel electrical characterization for advanced CMOS gate dielectrics.	Sci. China Ser. F Inf. Sci.	2008	DBLP DOI BibTeX RDF	MOS device, gate dielectrics, electrical characterization, IETS, PASHEI
16	Yukiya Miura, Jiro Kato	Adaptive Fault Diagnosis of Analog Circuits by Operation-Region Model and X - Y Zoning Method.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	MOS transistors, Fault diagnosis, Analog circuits, Adaptive test
16	Zhaosheng Feng, David Yang Gao	A nonconvex dissipative system and its applications (II).	J. Glob. Optim.	2008	DBLP DOI BibTeX RDF	AMS (MOS) subject classification 34C05, 34C14, 34C20, 35B40
16	Zhaosheng Feng	A nonconvex dissipative system and its applications (I).	J. Glob. Optim.	2008	DBLP DOI BibTeX RDF	AMS (MOS) Subject Classification 34C05, 34C14, 34C20, 35B40
16	David L. Russell	The Betti reciprocity principle and the normal boundary component control problem for linear elastic systems.	J. Glob. Optim.	2008	DBLP DOI BibTeX RDF	AMS-MOS Classifications 74B05, 74G10, 74G75, 93C55