Search results for "NoCs"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
33	Martin Schoeberl, Florian Brandner, Jens Sparsø, Evangelia Kasapaki	A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems.	NOCS	2012	DBLP DOI BibTeX RDF
33	Masoumeh Ebrahimi, Masoud Daneshtalab, Fahimeh Farahnakian, Juha Plosila, Pasi Liljeberg, Maurizio Palesi, Hannu Tenhunen	HARAQ: Congestion-Aware Learning Model for Highly Adaptive Routing Algorithm in On-Chip Networks.	NOCS	2012	DBLP DOI BibTeX RDF
33	Pierre Schamberger, Zhonghai Lu, Xianyang Jiang, Meikang Qiu	Modeling and Power Evaluation of On-Chip Router Components in Spintronics.	NOCS	2012	DBLP DOI BibTeX RDF
33	Yao Wang 0008, G. Edward Suh	Efficient Timing Channel Protection for On-Chip Networks.	NOCS	2012	DBLP DOI BibTeX RDF
33	Pablo Abad Fidalgo, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, José-Ángel Gregorio	TOPAZ: An Open-Source Interconnection Network Simulator for Chip Multiprocessors and Supercomputers.	NOCS	2012	DBLP DOI BibTeX RDF
33	Mario Lodde, José Flich, Manuel E. Acacio	Heterogeneous NoC Design for Efficient Broadcast-based Coherence Protocol Support.	NOCS	2012	DBLP DOI BibTeX RDF
33	Nikita Nikitin, Javier de San Pedro, Josep Carmona 0001, Jordi Cortadella	Analytical Performance Modeling of Hierarchical Interconnect Fabrics.	NOCS	2012	DBLP DOI BibTeX RDF
33	Radu Marculescu, Michael Kishinevsky, Ran Ginosar, Karam S. Chatha (eds.)	NOCS 2011, Fifth ACM/IEEE International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, May 1-4, 2011	NOCS	2011	DBLP DOI BibTeX RDF
33	Radu David, Paul Bogdan, Radu Marculescu, Ümit Y. Ogras	Dynamic power management of voltage-frequency island partitioned Networks-on-Chip using Intel's Single-chip Cloud Computer.	NOCS	2011	DBLP DOI BibTeX RDF
33	James W. Hanlon	The XMOS XK-XMP-64 development board.	NOCS	2011	DBLP DOI BibTeX RDF
33	Daniel Gebhardt, JunBok You, Kenneth S. Stevens	Link pipelining strategies for an application-specific asynchronous NoC.	NOCS	2011	DBLP DOI BibTeX RDF
33	Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, Omer Khan, Srinivas Devadas	Deadlock-free fine-grained thread migration.	NOCS	2011	DBLP DOI BibTeX RDF
33	Guopeng Wei, Paul Bogdan, Radu Marculescu	A software framework for trace analysis targeting multicore platforms design.	NOCS	2011	DBLP DOI BibTeX RDF
33	Qiaoyan Yu, Meilin Zhang, Paul Ampadu	A comprehensive Networks-on-Chip simulator for error control explorations.	NOCS	2011	DBLP DOI BibTeX RDF
33	Tom English, Emanuel M. Popovici	Interconnect Physical Analyser (IPAA) applied to the design of scalable Network-on-Chip interconnect for Cryptographic accelerators.	NOCS	2011	DBLP DOI BibTeX RDF
33	Amlan Ganguly, Paul Wettin, Kevin Chang 0002, Partha Pratim Pande	Complex network inspired fault-tolerant NoC architectures with wireless links.	NOCS	2011	DBLP DOI BibTeX RDF
33	Ahmed Abousamra, Rami G. Melhem, Alex K. Jones	Two-hop Free-space based optical interconnects for chip multiprocessors.	NOCS	2011	DBLP DOI BibTeX RDF
33	Dan Zhao 0001, Yi Wang 0007, Jian Li 0059, Takamaro Kikkawa	Design of multi-channel wireless NoC to improve on-chip communication capacity!	NOCS	2011	DBLP DOI BibTeX RDF
33	Amlan Ganguly, Partha Kundu, Pradip Bose	Curbing energy cravings in networks: A cross-sectional view across the micro-macro boundary.	NOCS	2011	DBLP DOI BibTeX RDF
33	Amir-Mohammad Rahmani, Pasi Liljeberg, Khalid Latif 0002, Juha Plosila, Kameswar Rao Vaddina, Hannu Tenhunen	Congestion aware, fault tolerant, and thermally efficient inter-layer communication scheme for hybrid NoC-bus 3D architectures.	NOCS	2011	DBLP DOI BibTeX RDF
33	Michael Papamichael, James C. Hoe, Onur Mutlu	FIST: A fast, lightweight, FPGA-friendly packet latency estimator for NoC modeling in full-system simulations.	NOCS	2011	DBLP DOI BibTeX RDF
33	Yu-Hsiang Kao, H. Jonathan Chao	BLOCON: A Bufferless Photonic Clos network-on-chip architecture.	NOCS	2011	DBLP DOI BibTeX RDF
33	Gennette Gill, Sumedh S. Attarde, Geoffray Lacourba, Steven M. Nowick	A low-latency adaptive asynchronous interconnection network using bi-modal router nodes.	NOCS	2011	DBLP DOI BibTeX RDF
33	Somayyeh Koohi, Meisam Abdollahi, Shaahin Hessabi	All-optical wavelength-routed NoC based on a novel hierarchical topology.	NOCS	2011	DBLP DOI BibTeX RDF
33	Zhonghai Lu	Cross clock-domain TDM virtual circuits for networks on chips.	NOCS	2011	DBLP DOI BibTeX RDF
33	Fabien Clermidy, Nicolas Cassiau, N. Coste, Denis Dutoit, M. Fantini, Dimitri Ktenas, Romain Lemaire, L. Stefanizzi	Reconfiguration of a 3GPP-LTE telecommunication application on a 22-core NoC-based system-on-chip.	NOCS	2011	DBLP DOI BibTeX RDF
33	Onur Derin, Deniz Kabakci, Leandro Fiorin	Online task remapping strategies for fault-tolerant Network-on-Chip multiprocessors.	NOCS	2011	DBLP DOI BibTeX RDF
33	Nithin Michael, Milen Nikolov, Ao Tang, G. Edward Suh, Christopher Batten	Analysis of application-aware on-chip routing under traffic uncertainty.	NOCS	2011	DBLP DOI BibTeX RDF
33	Christof Teuscher, Cristian Grecu, Ting Lu, Ron Weiss	Challenges and promises of nano and bio communication networks.	NOCS	2011	DBLP DOI BibTeX RDF
33	Hyungjun Kim, Pritha Ghoshal, Boris Grot, Paul V. Gratz, Daniel A. Jiménez	Reducing network-on-chip energy consumption through spatial locality speculation.	NOCS	2011	DBLP DOI BibTeX RDF
33	Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos	VLSI micro-architectures for high-radix crossbar schedulers.	NOCS	2011	DBLP DOI BibTeX RDF
33	José Cano 0001, José Flich, José Duato, Marcello Coppola, Riccardo Locatelli	Efficient routing implementation in complex systems-on-chip.	NOCS	2011	DBLP DOI BibTeX RDF
33	Andreas Weichslgartner, Stefan Wildermann, Jürgen Teich	Dynamic decentralized mapping of tree-structured applications on NoC architectures.	NOCS	2011	DBLP DOI BibTeX RDF
33	Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen	Exploring partitioning methods for 3D Networks-on-Chip utilizing adaptive routing model.	NOCS	2011	DBLP DOI BibTeX RDF
33	Christopher Nitta, Kevin Macdonald, Matthew K. Farrens, Venkatesh Akella	Inferring packet dependencies to improve trace based simulation of on-chip networks.	NOCS	2011	DBLP DOI BibTeX RDF
33	Hiroki Matsutani, Yasuhiro Take, Daisuke Sasaki, Masayuki Kimura, Yuki Ono, Yukinori Nishiyama, Michihiro Koibuchi, Tadahiro Kuroda, Hideharu Amano	A vertical bubble flow network using inductive-coupling for 3-D CMPs.	NOCS	2011	DBLP DOI BibTeX RDF
33	Arpit Joshi, Madhu Mutyam	Prevention flow-control for low latency torus networks-on-chip.	NOCS	2011	DBLP DOI BibTeX RDF
33	Florentine Dubois, José Cano 0001, Marcello Coppola, José Flich, Frédéric Pétrot	Spidergon STNoC design flow.	NOCS	2011	DBLP DOI BibTeX RDF
33	Cristinel Ababei, Hamed Sajjadi Kia, Om Prakash Yadav, Jingcao Hu	Energy and reliability oriented mapping for regular Networks-on-Chip.	NOCS	2011	DBLP DOI BibTeX RDF
33	Danyao Wang, Natalie D. Enright Jerger, J. Gregory Steffan	DART: A programmable architecture for NoC simulation on FPGAs.	NOCS	2011	DBLP DOI BibTeX RDF
33	Matt Grange, Roshan Weerasekera, Dinesh Pamunuwa, Axel Jantsch, Awet Yemane Weldezion	Optimal network architectures for minimizing average distance in k-ary n-dimensional mesh networks.	NOCS	2011	DBLP DOI BibTeX RDF
33	Yaniv Ben-Itzhak, Israel Cidon, Avinoam Kolodny	Delay analysis of wormhole based heterogeneous NoC.	NOCS	2011	DBLP DOI BibTeX RDF
33	Qiaoyan Yu, Meilin Zhang, Paul Ampadu	Exploiting inherent information redundancy to manage transient errors in NoC routing arbitration.	NOCS	2011	DBLP DOI BibTeX RDF
33	Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini	A distributed and topology-agnostic approach for on-line NoC testing.	NOCS	2011	DBLP DOI BibTeX RDF
33	Freek Verbeek, Julien Schmaltz	Automatic verification for deadlock in networks-on-chips with adaptive routing and wormhole switching.	NOCS	2011	DBLP DOI BibTeX RDF
33	Najla Alfaraj, Junjie Zhang 0001, Yang Xu 0010, H. Jonathan Chao	HOPE: Hotspot congestion control for Clos network on chip.	NOCS	2011	DBLP DOI BibTeX RDF
33		NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010	NOCS	2010	DBLP BibTeX RDF
33	Samuel Rodrigo, José Flich, Antoni Roca 0001, Simone Medardoni, Davide Bertozzi, Jesús Camacho Villanueva, Federico Silla, José Duato	Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing.	NOCS	2010	DBLP DOI BibTeX RDF	Fault-tolerance, Routing, Networks-on-chip
33	Paul Vincent Mejia, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella	Performance Evaluation of a Multicore System with Optically Connected Memory Modules.	NOCS	2010	DBLP DOI BibTeX RDF	OC-DIMM, DWDM, Performance Evaluation, DRAM, Optics
33	David Wolpert 0001, Bo Fu, Paul Ampadu	Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design.	NOCS	2010	DBLP DOI BibTeX RDF	delay borrowing, energy-efficient, interconnect, Temperature, low voltage
33	Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano	Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs.	NOCS	2010	DBLP DOI BibTeX RDF	low power, Network-on-Chip, router, power gating
33	Alexandre Guerre, Nicolas Ventroux, Raphaël David, Alain Mérigot	Hierarchical Network-on-Chip for Embedded Many-Core Architectures.	NOCS	2010	DBLP DOI BibTeX RDF	hierarchical network on chip, area efficiency
33	Chih-Hao Chao, Kai-Yuan Jheng, Hao-Yu Wang, Jia-Cheng Wu, An-Yeu Wu	Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems.	NOCS	2010	DBLP DOI BibTeX RDF	run-time thermal management, 3D NoC, routing, 3D IC, traffic-aware, throttling, thermal-aware
33	Keren Bergman	Photonic Chip-Scale Interconnection Networks for Performance-Energy Optimized Computing.	NOCS	2010	DBLP DOI BibTeX RDF
33	Yu-Hsiang Kao, Najla Alfaraj, Ming Yang, H. Jonathan Chao	Design of High-Radix Clos Network-on-Chip.	NOCS	2010	DBLP DOI BibTeX RDF
33	Mohamad Sawan	Low-Power Bioelectronics for Massively Parallel Neuromonitoring.	NOCS	2010	DBLP DOI BibTeX RDF
33	Paul Bogdan, Miray Kas, Radu Marculescu, Onur Mutlu	QuaLe: A Quantum-Leap Inspired Model for Non-stationary Analysis of NoC Traffic in Chip Multi-processors.	NOCS	2010	DBLP DOI BibTeX RDF	Self-Similar Stochastic Processes, Multi-fractal Analysis, Networks-on-Chip, Chip Multi-Processors
33	Yvain Thonnart, Romain Lemaire, Fabien Clermidy	Distributed Sequencing for Resource Sharing in Multi-applicative Heterogeneous NoC Platforms.	NOCS	2010	DBLP DOI BibTeX RDF	Distributed Systems, Networks-on-Chip
33	Michael N. Horak, Steven M. Nowick, Matthew Carlberg, Uzi Vishkin	A Low-Overhead Asynchronous Interconnection Network for GALS Chip Multiprocessors.	NOCS	2010	DBLP DOI BibTeX RDF
33	Dmitri Vainbrand, Ran Ginosar	Network-on-Chip Architectures for Neural Networks.	NOCS	2010	DBLP DOI BibTeX RDF	Neural Network, Network-on-Chip
33	Dongki Kim, Sungjoo Yoo, Sunggu Lee	A Network Congestion-Aware Memory Controller.	NOCS	2010	DBLP DOI BibTeX RDF	memory access scheduling, network-on-chip, Memory, congestion
33	Francisco Gilabert Villamón, María Engracia Gómez, Simone Medardoni, Davide Bertozzi	Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip.	NOCS	2010	DBLP DOI BibTeX RDF
33	Alessandro Cremonesi	Semiconductor Industry: Perspective, Evolution and Challenges.	NOCS	2010	DBLP DOI BibTeX RDF
33	Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras	Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing.	NOCS	2010	DBLP DOI BibTeX RDF
33	Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin 0001, Li-Shiuan Peh	Design of a High-Throughput Distributed Shared-Buffer NoC Router.	NOCS	2010	DBLP DOI BibTeX RDF	Router micro-architecture, On-chip interconnection networks
33	Francesca Palumbo, Danilo Pani, Alessandro Pilia, Luigi Raffo	Impact of Half-Duplex and Full-Duplex DMA Implementations on NoC Performance.	NOCS	2010	DBLP DOI BibTeX RDF	full-duplex DMA, half-duplex DMA, hybrid switching NoC, DMA performance bias, deadlock prevention
33	Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen	A Low-Latency and Memory-Efficient On-chip Network.	NOCS	2010	DBLP DOI BibTeX RDF
33	Qiaoyan Yu, Paul Ampadu	Transient and Permanent Error Co-management Method for Reliable Networks-on-Chip.	NOCS	2010	DBLP DOI BibTeX RDF	permanent error, splitting transmission, spare wire, reliability, Network-on-chip, transient error
33	George Michelogiannakis, Daniel Sánchez 0003, William J. Dally, Christos Kozyrakis	Evaluating Bufferless Flow Control for On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	Networks, Flow control, Buffers, Multiprocessor interconnection
33	Jonas Diemer, Rolf Ernst	Back Suction: Service Guarantees for Latency-Sensitive On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	Latency-Sensitive, Quality of Service, QoS, Real-Time, NoC, Manycore
33	Young Hoon Kang, Taek-Jun Kwon, Jeffrey T. Draper	Fault-Tolerant Flow Control in On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	fault-tolerant router, soft-error handling, networks-on-chip
33	Andreas Lankes, Thomas Wild, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig	Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	message dependent deadlocks, strict ordering, Network-on-chip, deadlock avoidance, deadlock recovery
33	Randy Wayne Morris Jr., Avinash Karanth Kodi	Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores.	NOCS	2010	DBLP DOI BibTeX RDF	Network-on-Chip, Interconnects, Low-Power architecture, Optoelectronic
33	Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos	A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area.	NOCS	2010	DBLP DOI BibTeX RDF
33		Third International Symposium on Networks-on-Chips, NOCS 2009, May 10-13 2009, La Jolla, CA, USA. Proceedings	NOCS	2009	DBLP BibTeX RDF
33	Robin Emery, Alexandre Yakovlev, E. Graeme Chester	Connection-centric network for spiking neural networks.	NOCS	2009	DBLP DOI BibTeX RDF
33	Bo Fu, David Wolpert 0001, Paul Ampadu	Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links.	NOCS	2009	DBLP DOI BibTeX RDF
33	Nicola Concer, Luciano Bononi, Michael Soulie, Riccardo Locatelli, Luca P. Carloni	CTC: An end-to-end flow control protocol for multi-core systems-on-chip.	NOCS	2009	DBLP DOI BibTeX RDF
33	Somayyeh Koohi, Shaahin Hessabi	Contention-free on-chip routing of optical packets.	NOCS	2009	DBLP DOI BibTeX RDF
33	Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanovic, Vladimir Stojanovic	Silicon-photonic clos networks for global on-chip communication.	NOCS	2009	DBLP DOI BibTeX RDF
33	Henrique C. Freitas, Marco A. Z. Alves, Lucas Mello Schnorr, Philippe Olivier Alexandre Navaux	Performance Evaluation of NoC Architectures for Parallel Workloads.	NOCS	2009	DBLP DOI BibTeX RDF
33	Andrew A. Chien	NoC's at the center of chip architecture: Urgent needs (today) and what they must become (future).	NOCS	2009	DBLP DOI BibTeX RDF
33	Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet	Estimating reliability and throughput of source-synchronous wave-pipelined interconnect.	NOCS	2009	DBLP DOI BibTeX RDF
33	Lei Wang 0041, Yuho Jin, Hyungjun Kim, Eun Jung Kim 0001	Recursive partitioning multicast: A bandwidth-efficient routing for Networks-on-Chip.	NOCS	2009	DBLP DOI BibTeX RDF
33	Yue Qian, Zhonghai Lu, Wenhua Dou	Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip.	NOCS	2009	DBLP DOI BibTeX RDF
33	Anh Thien Tran, Dean Truong, Bevan M. Baas	A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network.	NOCS	2009	DBLP DOI BibTeX RDF
33	Ran Manevich, Isask'har Walter, Israel Cidon, Avinoam Kolodny	Best of both worlds: A bus enhanced NoC (BENoC).	NOCS	2009	DBLP DOI BibTeX RDF
33	Gilbert Hendry, Shoaib Kamil 0001, Aleksandr Biberman, Johnnie Chan, Benjamin G. Lee, Marghoob Mohiyuddin, Ankit Jain, Keren Bergman, Luca P. Carloni, John Kubiatowicz, Leonid Oliker, John Shalf	Analysis of photonic networks for a chip multiprocessor using scientific applications.	NOCS	2009	DBLP DOI BibTeX RDF
33	Rudy Beraha, Isask'har Walter, Israel Cidon, Avinoam Kolodny	The design of a latency constrained, power optimized NoC for a 4G SoC.	NOCS	2009	DBLP DOI BibTeX RDF
33	Ying-Cherng Lan, Shih-Hsin Lo, Yueh-Chi Lin, Yu Hen Hu, Sao-Jie Chen	BiNoC: A bidirectional NoC architecture with dynamic self-reconfigurable channel.	NOCS	2009	DBLP DOI BibTeX RDF
33	Prabhat Kumar 0002, Yan Pan, John Kim, Gokhan Memik, Alok N. Choudhary	Exploring concentration and channel slicing in on-chip network router.	NOCS	2009	DBLP DOI BibTeX RDF
33	Luca P. Carloni, Partha Pande 0001, Yuan Xie 0001	Networks-on-chip in emerging interconnect paradigms: Advantages and challenges.	NOCS	2009	DBLP DOI BibTeX RDF
33	Daniel Gebhardt, Kenneth S. Stevens	Power reduction through physical placement of asynchronous routers.	NOCS	2009	DBLP DOI BibTeX RDF
33	Pavel Ghosh, Arunabha Sen, Alexander Hall	Energy efficient application mapping to NoC processing elements operating at multiple voltage levels.	NOCS	2009	DBLP DOI BibTeX RDF
33	Keun Sup Shim, Myong Hyon Cho, Michel A. Kinsy, Tina Wen, Mieszko Lis, G. Edward Suh, Srinivas Devadas	Static virtual channel allocation in oblivious routing.	NOCS	2009	DBLP DOI BibTeX RDF
33	Avinash Karanth Kodi, Randy Morris, Ahmed Louri, Xiang Zhang	On-Chip photonic interconnects for scalable multi-core architectures.	NOCS	2009	DBLP DOI BibTeX RDF
33	Guilherme Montez Guindani, Cezar Reinbrecht, Thiago R. da Rosa, Fernando Moraes 0001	Increasing NoC power estimation accuracy through a rate-based model.	NOCS	2009	DBLP DOI BibTeX RDF
33	Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuwa, Zhonghai Lu, Axel Jantsch, Roshan Weerasekera, Hannu Tenhunen	Scalability of network-on-chip communication architecture for 3-D meshes.	NOCS	2009	DBLP DOI BibTeX RDF
33	Fabien Clermidy, Romain Lemaire, Yvain Thonnart, Pascal Vivet	A Communication and configuration controller for NoC based reconfigurable data flow architecture.	NOCS	2009	DBLP DOI BibTeX RDF
33	Wei Song 0002, Doug A. Edwards, José Luis Núñez-Yáñez, Sohini Dasgupta	Adaptive stochastic routing in fault-tolerant on-chip networks.	NOCS	2009	DBLP DOI BibTeX RDF