Search results for "TMR"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
20	Tomohiro Yoneda, Takashi Suzuoka, Yoshihiro Tohma	Interrupt handling in the loosely synchronized TMR system.	Syst. Comput. Jpn.	1985	DBLP DOI BibTeX RDF
20	G. Pulkkis, P. Poyhonen	Performance Modeling of a Class of Asynchronous TMR Processor Systems.	ICDCS	1981	DBLP BibTeX RDF
14	Ci Lei, Dinesh Pamunuwa, Steven Bailey, Colin Lambert	Designing Reliable Digital Molecular Electronic Circuits.	NanoNet	2009	DBLP DOI BibTeX RDF	nanotechnology, circuit simulation, molecular electronics
14	Mohammad-Hamed Razmkhah, Seyed Ghassem Miremadi, Alireza Ejlali	A Micro-FT-UART for Safety-Critical SoC-Based Applications.	ARES	2009	DBLP DOI BibTeX RDF
14	Joseph Sloan, Rakesh Kumar 0002	Towards scalable reliability frameworks for error prone CMPs.	CASES	2009	DBLP DOI BibTeX RDF	dynamic constitution, in-network fault tolerance
14	Yasser Sedaghat, Seyed Ghassem Miremadi	Investigation and Reduction of Fault Sensitivity in the FlexRay Communication Controller Registers.	SAFECOMP	2008	DBLP DOI BibTeX RDF	Flex- Ray protocol, Fault injection, Distributed embedded systems, Safety-critical applications
14	Shruti R. Patil, Xiaofeng Yao, Hao Meng, Jianping Wang, David J. Lilja	Design of a spintronic arithmetic and logic unit using magnetic tunnel junctions.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	alu design, magnetic tunnel junction, spintronic alu design, spintronics
14	Saeed Safari	Co-evolutionary reliability-oriented high-level synthesis.	ISCAS	2008	DBLP DOI BibTeX RDF
14	Avijit Dutta, Abhijit Jas	Combinational Logic Circuit Protection Using Customized Error Detecting and Correcting Codes.	ISQED	2008	DBLP DOI BibTeX RDF	EDAC, adhoc code, customizable codes, ECC
14	Rui Gong, Kui Dai, Zhiying Wang 0003	Transient Fault Tolerance on Chip Multiprocessor Based on Dual and Triple Core Redundancy.	PRDC	2008	DBLP DOI BibTeX RDF
14	Hüseyin Aysan, Sasikumar Punnekkat, Radu Dobrin	VTV - A Voting Strategy for Real-Time Systems.	PRDC	2008	DBLP DOI BibTeX RDF
14	Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman 0001, Dhiraj K. Pradhan	Single Error Correcting Finite Field Multipliers Over GF(2m).	VLSI Design	2008	DBLP DOI BibTeX RDF	Galois Field Multiplier, VLSI, Cryptography, Error Correcting Codes
14	David Roberts, Nam Sung Kim, Trevor N. Mudge	On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology.	DSD	2007	DBLP DOI BibTeX RDF
14	Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan	Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs.	IPDPS	2007	DBLP DOI BibTeX RDF
14	Smita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes	Enhancing design robustness with reliability-aware resynthesis and logic simulation.	ICCAD	2007	DBLP DOI BibTeX RDF
14	Tetsuya Uemura, Takao Marukame, Ken-ichi Matsuda, Masafumi Yamamoto	Four-State Magnetic Random Access Memory and Ternary Content Addressable Memory Using CoFe-Based Magnetic Tunnel Junctions.	ISMVL	2007	DBLP DOI BibTeX RDF
14	Haruhiko Kaneko, Eiji Fujiwara	Reconstruction of Erasure Correcting Codes for Dependable Distributed Storage System without Spare Disks.	DFT	2007	DBLP DOI BibTeX RDF
14	Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew	SEU-Mitigation Placement and Routing Algorithms and Their Impact in SRAM-Based FPGAs.	ISQED	2007	DBLP DOI BibTeX RDF
14	Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura	Autonomous-repair cell for fault tolerant dynamic-reconfigurable devices.	FPGA	2006	DBLP DOI BibTeX RDF
14	Fred A. Bower, Derek Hower, Mahmut Yilmaz, Daniel J. Sorin, Sule Ozev	Applying architectural vulnerability Analysis to hard faults in the microprocessor.	SIGMETRICS/Performance	2006	DBLP DOI BibTeX RDF	hard-fault tolerance, reliability, computer architecture
14	Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001	Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates.	SBCCI	2006	DBLP DOI BibTeX RDF	fault-tolerant microprocessor, soft errors, single event upsets, single event transients
14	T. S. Ganesh, Viswanathan Subramanian, Arun K. Somani	SEU Mitigation Techniques for Microprocessor Control Logic.	EDCC	2006	DBLP DOI BibTeX RDF
14	Michel Pignol	DMT and DT2: Two Fault-Tolerant Architectures developed by CNES for COTs-based Spacecraft Supercomputers.	IOLTS	2006	DBLP DOI BibTeX RDF
14	T. M. Mak, Subhasish Mitra	Should Logic SER be Solved at the Circuit Level?	IOLTS	2006	DBLP DOI BibTeX RDF
14	Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001	Design of a Robust 8-Bit Microprocessor to Soft Errors.	IOLTS	2006	DBLP DOI BibTeX RDF
14	J.-M. George	Spin polarized transport effects in III-V semiconductor heterostructures.	ICMENS	2005	DBLP DOI BibTeX RDF
14	Krzysztof Sapiecha, Grzegorz Lukawski	Fault-Tolerant Protocols for Scalable Distributed Data Structures.	PPAM	2005	DBLP DOI BibTeX RDF
14	Debayan Bhaduri, Sandeep K. Shukla	NANOLAB: A Tool for Evaluating Reliability of Defect-Tolerant Nano Architectures.	ISVLSI	2004	DBLP DOI BibTeX RDF
14	Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis 0001	Designing and testing fault-tolerant techniques for SRAM-based FPGAs.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	fault-tolerance, FPGA
14	Miguel Garvie, Adrian Thompson	Scrubbing Away Transients and Jiggling Around the Permanent: Long Survival of FPGA Systems Through Evolutionary Self-Repair.	IOLTS	2004	DBLP DOI BibTeX RDF
14	Hermann Kopetz	An Integrated Architecture for Dependable Embedded Systems.	SRDS	2004	DBLP DOI BibTeX RDF
14	Sérgio Murilo Maciel Fernandes, Paulo Romero Martins Maciel	Reliability Evaluation for Dependable Embedded System Specifications: An Approach Based on DSPN.	MEMOCODE	2003	DBLP DOI BibTeX RDF
14	Antonio Camurri, Barbara Mazzarino, Matteo Ricchetti, Renee Timmers, Gualtiero Volpe	Multimodal Analysis of Expressive Gesture in Music and Dance Performances.	Gesture Workshop	2003	DBLP DOI BibTeX RDF
14	Yi Zhao, Sujit Dey	Separate Dual-Transistor Registers - A Circuit Solution for On-line Testing of Transient Error in UDSM-IC.	IOLTS	2003	DBLP DOI BibTeX RDF
14	Meng Lu, Yvon Savaria, Bing Qiu 0003, Jacques Taillefer	IEEE 1149.1 Based Defect and Fault Tolerant Scan Chain for Wafer Scale Integration.	DFT	2003	DBLP DOI BibTeX RDF
14	Kartik Mohanram, Nur A. Touba	Partial Error Masking to Reduce Soft Error Failure Rate in Logic Circuits.	DFT	2003	DBLP DOI BibTeX RDF
14	Jiri Gaisler	A Portable and Fault-Tolerant Microprocessor Based on the SPARC V8 Architecture.	DSN	2002	DBLP DOI BibTeX RDF
14	Chun-Yuan Lin, Yeh-Ching Chung, Jen-Shiuh Liu	Efficient Data Compression Methods for Multi-Dimensional Sparse Array Operations.	CW	2002	DBLP DOI BibTeX RDF	Data compression scheme, Sparse array operation, Multi-dimensional sparse array, Karnaugh Map
14	Zbigniew Kalbarczyk, Ravishankar K. Iyer, Saurabh Bagchi, Keith Whisnant	Chameleon: A Software Infrastructure for Adaptive Fault Tolerance.	IEEE Trans. Parallel Distributed Syst.	1999	DBLP DOI BibTeX RDF	Adaptive fault tolerance, high availability networked computing, extendible modular architecture, COTS, software-implemented fault tolerance
14	Stefanos D. Kollias, Frédéric Piat	Principled Hybrid Systems: Theory and Applications (Physta).	ICMCS, Vol. 2	1999	DBLP DOI BibTeX RDF	Emotion analysis, HCI, Multimedia, Hybrid systems, Rule extraction
14	Gholamreza Latif Shabgahi, Stuart Bennett	Adaptive Majority Voter: A Novel Voting Algorithm for Real-Time Fault-Tolerant Control Systems.	EUROMICRO	1999	DBLP DOI BibTeX RDF
14	Jianhui Jiang, Hongbao Shi, Yinghua Min, Xiaodong Zhao	A Novel NMR Structure with Concurrent Error Location Capabilities.	PRDC	1999	DBLP DOI BibTeX RDF
14	Jien-Chung Lo	Highly Reliable Systems with Differential Built-In Current Sensors.	DFT	1998	DBLP DOI BibTeX RDF	reliability, concurrent error detection, supplying current monitoring
14	Minoru Uehara	Fault tolerant computing in computational field model.	ECBS	1997	DBLP DOI BibTeX RDF	computational field model, triple module redundancy, resource allocation, fault tolerant computing, fault tolerant computing, system performance, large scale distributed systems, shared virtual space