Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
14 | Rubén Garvi, Javier Granizo, Angel Salvador, Luis Hernández 0003 |
A 55nm CMOS Linearized Oscillator for Audio VCO-ADCs achieving 78dBA of SNDR with $153\mu \mathrm{W}$. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS 2022 ![In: 29th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2022, Glasgow, United Kingdom, October 24-26, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-8823-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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14 | Pitchayapatchaya Srikram, Prasoon Ambalathankandy, Yuri Kanazawa, Masato Motomura, Masayuki Ikebe |
Ring-VCO-based ReLU activation function with linearity improvement for pulsed neuron circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS 2022 ![In: 29th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2022, Glasgow, United Kingdom, October 24-26, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-8823-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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14 | Mingkang Zhang, Zihao Zhu, Yueduo Liu, Zehao Zhang, Rongxin Bao, Jiahui Lin, Haovu Zhuang, Jiaxin Liu, Xiong Zhou, Shiheng Yang, Qiang Li 0021 |
A 4.2-to-5.6 GHz Transformer-Based PMOS-only Stacked-gm VCO in 28-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022, Xi'an, China, October 28-30, 2022, pp. 36-37, 2022, IEEE, 978-1-6654-9269-0. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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14 | Ming-An Chung, Pin-Rui Huang, Yue-Fang Kuo |
Low-Power 14GHz LC-VCO in 180nm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICKII ![In: 5th IEEE International Conference on Knowledge Innovation and Invention, ICKII 2022, Hualien, Taiwan, July 22-24, 2022, pp. 60-62, 2022, IEEE, 978-1-6654-7929-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Agata Iesurum, Davide Manente, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua |
A 24 GHz Quadrature VCO Based on Coupled PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset in 28 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 48th IEEE European Solid State Circuits Conference, ESSCIRC 2022, Milan, Italy, September 19-22, 2022, pp. 385-388, 2022, IEEE, 978-1-6654-8494-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yingjie Chen, Marino De Jesus Guzman, Beomsoo Park, Nima Maghari |
A Direct Sensor Readout Circuit Using VCO-Driven Chopping with 42dB SNR at 800µVpp Input. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 48th IEEE European Solid State Circuits Conference, ESSCIRC 2022, Milan, Italy, September 19-22, 2022, pp. 441-444, 2022, IEEE, 978-1-6654-8494-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Tarek Elrifai, Ayman Sakr, Hadi Lotfi, Mohamed Atef Hassan, Klaus Lips, Jens Anders |
A 7 GHz VCO-based EPR spectrometer incorporating a UWB data link. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 20th IEEE Interregional NEWCAS Conference, NEWCAS 2022, Quebec City, QC, Canada, June 19-22, 2022, pp. 280-284, 2022, IEEE, 978-1-6654-0105-0. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Chien-Liang Chen, Tsung-Hsien Lin |
An Open-loop VCO-based ADC with Quasi-Chopping and Non-linearity Cancellation for Bio-Sensor Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BioCAS ![In: IEEE Biomedical Circuits and Systems Conference, BioCAS 2022, Taipei, Taiwan, October 13-15, 2022, pp. 317-320, 2022, IEEE, 978-1-6654-6917-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yangtao Dong, Chirn Chye Boon, Kaituo Yang, Zhe Liu 0038 |
A 2-GHz Dual-Path Sub-Sampling PLL with Ring VCO Phase Noise Suppression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2022, Newport Beach, CA, USA, April 24-27, 2022, pp. 1-2, 2022, IEEE, 978-1-6654-0756-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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14 | Ruichang Ma, Haikun Jia, Wei Deng 0001, Zhihua Wang 0001, Baoyong Chi |
A 12.5-to-15.4GHz, -118.9dBc/Hz PN at 1MHz offset, and 191.0dBc/Hz FoM VCO with Common-Mode Resonance Expansion and Simultaneous Differential 2ND-Harmonic Output using a Single Three-Coil Transformer in 65nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2022, Newport Beach, CA, USA, April 24-27, 2022, pp. 1-2, 2022, IEEE, 978-1-6654-0756-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yahia Z. M. Ibrahim, Mohamed A. Y. Abdalla, Ahmed N. Mohieldin |
A 197 FoMT VCO with 34% Tuning Range for 5G Applications in 45nm SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RWS ![In: 2022 IEEE Radio and Wireless Symposium, RWS 2022, Las Vegas, NV, USA, January 16-19, 2022, pp. 108-110, 2022, IEEE, 978-1-6654-3462-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Alessandro Franceschin, Domenico Riccardi, Andrea Mazzanti |
Series-Resonance BiCMOS VCO with Phase Noise of -138dBc/Hz at 1MHz Offset from 10GHz and -190dBc/Hz FoM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 1-3, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Jiang Gong, Bishnu Patra, Luc Enthoven, Job van Staveren, Fabio Sebastiano, Masoud Babaie |
A 0.049mm2 7.1-to-16.8GHz Dual-Core Triple-Mode VCO Achieving 200dB FoMA in 22nm FinFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 1-3, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yatao Peng, Andrea Ruffino, Jad Benserhir, Edoardo Charbon |
A Cryogenic SiGe BiCMOS Hybrid Class B/C Mode-Switching VCO Achieving 201dBc/Hz Figure-of-Merit and 4.2GHz Frequency Tuning Range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 364-366, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Corentin Pochet, Drew A. Hall |
A 4.4μW 2.5kHz-BW 92.1dB-SNDR 3rd-Order VCO-Based ADC With Pseudo Virtual Ground Feedforward Linearization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 408-410, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Jonas Borgmans, Pieter Rombouts |
Noise Optimization of a Resistively-Driven Ring Oscillator for VCO-Based ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 775-779, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yuri Lu, Chunqi Shi, Jinge Li, Runxi Zhang, Hao Deng 0003, Jinghong Chen |
A 23.4-27.6 GHz "Zig-Zag" VCO with Continuous Frequency Switching for FMCW Radars. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 3355-3358, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yi-Ting Hsieh, Shih-Shuo Chang, Hao-Yun Lee, Ju-Yi Chen, Shuenn-Yuh Lee |
A VCO-Based 2nd-Order Continuous Time Sigma-Delta Modulator for Current-Sensing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 2576-2579, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Rizwan Shaik Peerla, Purushothama Chary, Ashudeb Dutta, Bibhu Datta Sahoo 0002 |
A Dual VCO Based L5/S Band PLL with Extended Range Divider for IRNSS Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 1699-1703, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Zhongyuan Fang, Kai Tang 0002, Yanshu Guo, Wensong Wang, Yuanjin Zheng |
An Adaptable Mixer-Enabled VCO-Based Edge Sensing Platform for Agile Pulse Monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 297-300, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Chaoyang Xing, Yi Zhong, Jin Shao, Pengpeng Chen, Lu Jie, Nan Sun 0001 |
A Second-Order VCO-Based ΔΣ ADC with Fully Digital Feedback Summation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 3215-3218, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Victor Medina, Rubén Garvi, Eric Gutierrez, Luis Hernández 0003 |
A maximally-digital VCO-ADC with inherent mixing input capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 1-5, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | David Dolt, Quintin Livingston, Tong Liu, Ankur Kumar, Samuel Palermo |
SEE Sensitivity of a 16GHz LC-Tank VCO in a 22nm FinFET Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 254-257, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Leidy Mabel Alvero-Gonzalez, Eric Gutierrez |
Nyquist VCO-based ADC with Programmable Pulse Shaping Filter for Mitigation of Blockers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 1323-1327, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Jiannan Huang, Patrick P. Mercier |
A 112-dB SFDR 89-dB SNDR VCO-Based Sensor Front-End Enabled by Background-Calibrated Differential Pulse Code Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(4), pp. 1046-1057, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Jiannan Huang, Patrick P. Mercier |
A 178.9-dB FoM 128-dB SFDR VCO-Based AFE for ExG Readouts With a Calibration-Free Differential Pulse Code Modulation Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(11), pp. 3236-3246, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Abhishek Mukherjee, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun 0001 |
A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(2), pp. 476-487, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Wanghua Wu, Chih-Wei Yao, Chengkai Guo, Pei-Yuan Chiang, Lei Chen, Pak-Kim Lau, Zhanjun Bai, Sang Won Son, Thomas Byunghak Cho |
A 14-nm Ultra-Low Jitter Fractional-N PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(12), pp. 3756-3767, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Xiaolong Liu, Yue Chao, Howard C. Luong |
A 59-to-276-GHz CMOS Signal Generator Using Varactor-Less VCO and Dual-Mode ILFD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(8), pp. 2324-2334, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Seyeon Yoo, Seojin Choi, Yongsun Lee, Taeho Seong, Younghyun Lim, Jaehyouk Choi |
A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(1), pp. 298-309, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Omar El-Aassar, Gabriel M. Rebeiz |
Octave-Tuning Dual-Core Folded VCO Leveraging a Triple-Mode Switch-Less Tertiary Magnetic Loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(5), pp. 1475-1486, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Wei Zou, Daming Ren, Xuecheng Zou |
A 0.20-2.43 GHz fractional-N frequency synthesizer with optimized VCO and reduced current mismatch CP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Frontiers Inf. Technol. Electron. Eng. ![In: Frontiers Inf. Technol. Electron. Eng. 22(2), pp. 251-261, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Serge R. Mghabghab, Jeffrey A. Nanzer |
Impact of VCO and PLL Phase Noise on Distributed Beamforming Arrays With Periodic Synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 56578-56588, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Yao Li, Bo Zhou 0004, Zuhang Wang |
A Wideband Fast Start-Up Multi-Core VCO With Auto-Frequency Control in 0.18 μm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 149807-149813, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Dang-An Nguyen, Chulhun Seo |
A Novel Varactorless Tuning Technique for Clapp VCO Design Using Tunable Negative Capacitor to Increase Frequency-Tuning Range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 99562-99570, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Kentaro Yoshioka |
VCO-Based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 29(12), pp. 2143-2152, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Islam Mansour, Marwa Mansour, Mohamed Aboualalaa, Ahmed Allam, Adel B. Abdel-Rahman, Ramesh K. Pokharel, Mohammed Abo-Zahhad |
A Multiband VCO Using a Switched Series Resonance for Fine Frequency Tuning Sensitivity and Phase Noise Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 29(12), pp. 2163-2171, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Neelakantan Narasimman, Tony Tae-Hyoung Kim |
An Ultra-Low-Voltage VCO-Based ΔΣ Modulator Using Self-compensated Current Reference for Variation Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 40(3), pp. 1089-1110, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Zunsong Yang, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins |
A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(6), pp. 2307-2316, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Jing Li 0022, Yuyu Lin, Ning Ning 0002, Qi Yu 0002 |
A +0.44°C/-0.4°C Inaccuracy Temperature Sensor With Multi-Threshold MOSFET-Based Sensing Element and CMOS Thyristor-Based VCO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(3), pp. 1102-1113, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Jonas Borgmans, Robbe Riem, Pieter Rombouts |
The Analog Behavior of Pseudo Digital Ring Oscillators Used in VCO ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(7), pp. 2827-2840, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Shiheng Yang, Jun Yin 0001, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li 0021, Rui Paulo Martins |
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(9), pp. 3108-3112, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Carlos Perez, Andrés Quintero, Pedro Amaral, Andreas Wiesbauer, Luis Hernández 0003 |
A 73dB-A Audio VCO-ADC Based on a Maximum Length Sequence Generator in 130nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(10), pp. 3194-3198, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Nusrat Jahan, Adel Barakat, Ramesh K. Pokharel |
Design of Low Phase Noise VCO Considering C/L Ratio of LC Resonator in 0.18-μm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(12), pp. 3513-3517, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yanquan Luo, Maurits Ortmanns |
Input Referred Noise of VCO-Based Comparators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(1), pp. 82-86, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Lalit Mohan Dani, Neeraj Mishra, Anand Bulusu |
An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10), pp. 2117-2127, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Mohammad Khaleqi Qaleh Jooq, Ali Bozorgmehr, Sattar Mirzakuchaki |
A low-power delay stage ring VCO based on wrap-gate CNTFET technology for X-band satellite communication applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 49(1), pp. 142-158, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Corentin Pochet, Jiannan Huang, Patrick P. Mercier, Drew A. Hall |
A 174.7-dB FoM, 2nd-Order VCO-Based ExG-to-Digital Front-End Using a Multi-Phase Gated-Inverted-Ring Oscillator Quantizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Biomed. Circuits Syst. ![In: IEEE Trans. Biomed. Circuits Syst. 15(6), pp. 1283-1294, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Nitin Kumar, Manoj Kumar 0005 |
Low power CMOS differential ring VCO designs using dual delay stages in 0.13 μm technology for wireless applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 111, pp. 105025, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Jue Wang, Xu Cheng 0002, Jun Han 0003, Xiaoyang Zeng |
Synthesizable lead-lag quantization technique for digital VCO-based ΔΣ ADC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 110, pp. 105007, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Francisco Javier del Pino Suárez, Sunil Lalchand Khemchandani |
A New Current-Shaping Technique Based on a Feedback Injection Mechanism to Reduce VCO Phase Noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 21(19), pp. 6583, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Fanyang Li, Tao Yin, Haigang Yang |
A Bond-Wire Drift Offset Minimized Capacitance-to-Digital Interface for MEMS Accelerometer with Gain-Enhanced VCO-Based Quantization and Nested Digital Chopping Feedback Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 21(14), pp. 4627, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Peng Li, Tian Tian, Yilin Pu, Huiqun Huang, Bin Wu 0006, Tianchun Ye 0001 |
A 5.67-8.75GHz LC VCO with small gain variation for 2.4GHz-band WLAN applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 18(23), pp. 20210387, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Wen-Cheng Lai |
Circuits Design Low-Phase Noise Colpitts VCO with Gm-Boosting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE-TW ![In: IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2021, Penghu, Taiwan, September 15-17, 2021, pp. 1-2, 2021, IEEE, 978-1-6654-3328-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yuekang Guo, Qiang Pan, Xiaoming Liu 0008, Jing Jin 0005 |
A Center Frequency Calibration Technique for Ring VCO Exploiting Delay-1 Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021, pp. 708-711, 2021, IEEE, 978-1-6654-2461-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Qiang Pan, Yuekang Guo, Jing Jin 0005, Jianjun Zhou |
A Linearization Technique for Ring VCO Exploiting Bulk-Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021, pp. 737-740, 2021, IEEE, 978-1-6654-2461-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yanlin He, Yuekang Guo, Jing Jin 0005, Jianjun Zhou |
A Latency-Optimized Lookup Table for Nonlinearity Calibration in VCO-Based Sigma-Delta ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021, pp. 941-944, 2021, IEEE, 978-1-6654-2461-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Rajath Bindiganavile, Armin Tajalli |
A Controllable KVCO Ring VCO Topology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021, pp. 732-736, 2021, IEEE, 978-1-6654-2461-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Mohamed Atef Hassan, Tarek Elrifai, Ayman Sakr, Michal Kern, Klaus Lips, Jens Anders |
A 14-channel 7 GHz VCO-based EPR-on-a-chip sensor with rapid scan capabilities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SENSORS ![In: 2021 IEEE Sensors, Sydney, Australia, October 31 - Nov. 3, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-9501-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Takamoto Watanabe |
All-Digital VCO-ADC TAD Confirming Scaling and Stochastic Effects Using 16-nm FinFET CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021, Dubai, United Arab Emirates, November 28 - Dec. 1, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-8281-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Takamoto Watanabe |
All-Digital VCO-ADC TAD Using 4CKES-Type in 16-nm FinFET CMOS for Technology Scaling With Stochastic-ADC Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021, Dubai, United Arab Emirates, November 28 - Dec. 1, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-8281-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Xin Xin 0005, Yuanhao Hu, Xingyuan Tong |
A 10-bit SAR ADC with adaptive VCO-based comparator for sensor chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021, pp. 218-219, 2021, IEEE, 978-1-6654-1745-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Qianshui Yu, Chuankai Wang, Zijing Yuan, Xu Liu 0002, Peiyuan Wan, Zhijie Chen |
A 1.65 mW 2.8 GHz Dual-Loops Class-C VCO Achieving 189 dBc/Hz FoM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021, pp. 33-34, 2021, IEEE, 978-1-6654-1745-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Surajit Kumar Nath, Junghwan Yoo, Jae-Sung Rieh, Daekeun Yoon |
A 253-280 GHz Wide Tuning Range VCO with -3.5 dBm Peak Output Power in 40-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 299-302, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Shuxin Ming, Jin Zhou 0001 |
A 19 GHz Circular-Geometry Quad-Core Tail-Filtering Class-F VCO with -115 dBc/Hz Phase Noise at 1 MHz Offset in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 303-306, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Sriram Balamurali, Giovanni Mangraviti, Cheng-Hsueh Tsai, Piet Wambacq, Jan Craninckx |
A 55-63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 295-298, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Jun Yin 0001, Pui-In Mak, Rui Paulo Martins |
A Periodically Time-Varying Inductor Applied to The Class-D VCO for Phase Noise Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 307-310, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yan Zhang 0050, Chia-Jen Liang, Christopher Chen, Andrew Liu, Jason Woo, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang |
A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 435-438, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yi Zhong, Xiyuan Tang, Jiaxin Liu, Wenda Zhao, Shaolan Li, Nan Sun 0001 |
An 81.5dB-DR 1.25MHz-BW VCO-Based CT ΔΣ ADC with Double-PFD Quantizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2021, Austin, TX, USA, April 25-30, 2021, pp. 1-2, 2021, IEEE, 978-1-7281-7581-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Wei Deng 0001, Haikun Jia, Rui Wu 0001, Shiyan Sun, Chenggang Li, Zhihua Wang 0001, Baoyong Chi |
An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2021, Austin, TX, USA, April 25-30, 2021, pp. 1-2, 2021, IEEE, 978-1-7281-7581-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Hao Guo, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins |
A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f3 PN Corner Without Harmonic Tuning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 294-296, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Haikun Jia, Wei Deng 0001, Pingda Guan, Zhihua Wang 0001, Baoyong Chi |
A 60GHz 186.5dBc/Hz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 298-300, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Jiannan Huang, Patrick P. Mercier |
A Distortion-Free VCO-Based Sensor-to-Digital Front-End Achieving 178.9dB FoM and 128dB SFDR with a Calibration-Free Differential Pulse-Code Modulation Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 386-388, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Corentin Pochet, Jiannan Huang, Patrick P. Mercier, Drew A. Hall |
28.4 A 400mVpp 92.3 dB-SNDR 1kHz-BW 2nd-Order VCO-Based ExG-to-Digital Front-End Using a Multiphase Gated-Inverted Ring-Oscillator Quantizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 392-394, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Sanjeev Tannirkulam Chandrasekaran, Sumukh Prashant Bhanushali, Stefano Pietri, Arindam Sanyal |
OTA-free 1-1 MASH ADC using Fully Passive Noise Shaping SAR & VCO ADC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yuekang Guo, Jing Jin 0005, Xiaoming Liu 0008, Jianjun Zhou |
A Phase Domain Excess Loop Delay Compensation Technique with Latency Optimized Phase Selector for VCO-Based Continuous-Time ΔΣ ADC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yunbo Huang, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins |
A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation, Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Pravinah Nair Shasidharan, Jagadheswaran Rajendran, Selvakumar Mariappan, Yusman Mohd Yusof |
An On-Chip Integrated CMOS Ring Mixer-Balun-VCO Achieving IIP3 of 11.2 dBm and Phase Noise of -117.2 dBc/Hz. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RoViSP ![In: Proceedings of the 11th International Conference on Robotics, Vision, Signal Processing and Power Applications - Enhancing Research and Innovation through the Fourth Industrial Revolution, RoViSP 2021, Penang, Malaysia, 5-6 April 2021., pp. 658-663, 2021, Springer, 978-981-16-8128-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Xinpeng Xing, Xueqian Shang, Senji Liu, Xinfa Zheng, Georges G. E. Gielen |
Power-efficient VCO-based ADCs for Wireless Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021, pp. 244-245, 2021, IEEE, 978-1-6654-0174-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Kiho Lee, Dong-Ho Lee, Jusung Kim, Songcheol Hong |
Wideband LC VCO with 39.3 % Frequency Tuning Range for Dielectric Spectroscopy System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021, pp. 39-40, 2021, IEEE, 978-1-6654-0174-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Vivek Jangra, Manoj Kumar 0005 |
Low Power XNOR based Single Ended VCO Circuit Design with Dynamic Threshold MOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IC3 ![In: IC3 2021: Thirteenth International Conference on Contemporary Computing, Noida, India, August 5 - 7, 2021, pp. 125-131, 2021, ACM, 978-1-4503-8920-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Javed S. Gaggatur |
A 1.8 - 6.3 GHz Quadrature Ring VCO-based Fast-settling PLL for Wireline I/O in 55nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, VLSID 2021, Guwahati, India, February 20-24, 2021, pp. 294-298, 2021, IEEE, 978-1-6654-4087-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Xi Meng, Junqi Guo, Haoran Li, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins |
A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2nd-Harmonic Resonance Achieving 187-to-188.1dBc/Hz FoM in 28nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-4350-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Jue Wang, Zhenyu Yang, Jiawei Wang, Xu Cheng 0002, Jun Han 0003, Xiaoyang Zeng |
A Synthesizable 0.0060mm2 VCO-Based Delta Sigma Modulator with Digital Tri-level Feedback Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-4350-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Yizhuo Wang, Tenghao Zou, Bowen Chen, Shujiang Ji, Chao Zhang, Na Yan |
A 7.9-14.3GHz -243.3dB FoMT Sub-Sampling PLL with Transformer-Based Dual-Mode VCO in 40nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-4350-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Feifan Hong, Tianao Ding, Dixian Zhao |
A 196.2 dBc/Hz FOMT 16.8-to-21.6 GHz Class-F23 VCO with Transformer-Based Optimal Q-factor Tank in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-4350-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Ömer Fevzi Güngör, Salih Ergün |
Monolithic Implementation of Chaos Modulated VCO-based Random Number Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2021, Penang, Malaysia, November 22-26, 2021, pp. 193-196, 2021, IEEE, 978-1-6654-3916-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Maria-Ermioni Plagaki, Konstantinos Touloupas, Paul P. Sotiriadis |
Multi-Objective Optimization Methods for CMOS LC-VCO Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MOCAST ![In: 10th International Conference on Modern Circuits and Systems Technologies, MOCAST 2021, Thessaloniki, Greece, July 5-7, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-1847-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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14 | Sajad Nejadhasan, Narges Moazenian, Ebrahim Abiri, Mohammad Reza Salehi |
Low power and low phase noise VCO with dual current shaping for IoT applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Turkish J. Electr. Eng. Comput. Sci. ![In: Turkish J. Electr. Eng. Comput. Sci. 28(5), pp. 2493-2506, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Hamidreza Maghami, Pedram Payandehnia, Hossein Mirzaie, Ramin Zanbaghi, Hossein Zareie, Justin B. Goins, Siladitya Dey 0002, Kartikeya Mayaram, Terri S. Fiez |
A Highly Linear OTA-Less 1-1 MASH VCO-Based ΔΣ ADC With an Efficient Phase Quantization Noise Extraction Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(3), pp. 706-718, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen |
A 16.1-bit Resolution 0.064-mm2 Compact Highly Digital Closed-Loop Single-VCO-Based 1-1 Sturdy-MASH Resistance-to-Digital Converter With High Robustness in 180-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(9), pp. 2456-2467, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Alessandro Franceschin, Pietro Andreani, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua |
A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/f Noise Upconversion Caused by Short-Channel Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(7), pp. 1842-1853, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Dongyi Liao, Yucai Zhang, Fa Foster Dai, Zhenqi Chen, Yanjie Wang |
An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(3), pp. 536-546, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Yi Zhong, Shaolan Li, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Siliang Wu, Nan Sun 0001 |
A Second-Order Purely VCO-Based CT ΔΣ ADC Using a Modified DPLL Structure in 40-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(2), pp. 356-368, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Maarten Baert, Wim Dehaene |
A 5-GS/s 7.2-ENOB Time-Interleaved VCO-Based ADC Achieving 30.5 fJ/cs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(6), pp. 1577-1587, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Shaolan Li, David Z. Pan, Nan Sun 0001 |
An OTA-Less Second-Order VCO-Based CT $\Delta\Sigma$ Modulator Using an Inherent Passive Integrator and Capacitive Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(5), pp. 1337-1350, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Hossein Jalili, Omeed Momeni |
A 230-GHz High-Power and Wideband Coupled Standing Wave VCO in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(3), pp. 547-556, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
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14 | Wenda Zhao, Shaolan Li, Biying Xu, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Nanshu Lu, David Z. Pan, Nan Sun 0001 |
A 0.025-mm2 0.8-V 78.5-dB SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL- ΔΣ M Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(3), pp. 666-679, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Zheng Zhu, Xiong Zhou, Yuheng Du, Yao Feng, Qiang Li 0021 |
A 14-bit 4-MS/s VCO-Based SAR ADC With Deep Metastability Facilitated Mismatch Calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(6), pp. 1565-1576, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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14 | Simone Veni, Pietro Andreani, Michele Caruso, Marc Tiebout, Andrea Bevilacqua |
Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(9), pp. 2345-2355, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
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