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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3406 occurrences of 1738 keywords
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Results
Found 5152 publication records. Showing 5152 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
22 | Suhyun Kim, Soo-Mook Moon, Jinpyo Park, Kemal Ebcioglu |
Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(9), pp. 977-994, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
enhanced pipeline scheduling, unrolling, modulo variable expansion, iterated coalescing, register allocation, Software pipelining, modulo scheduling, renaming, coalescing |
22 | Francis Lazarus, Michel Pocchiola, Gert Vegter, Anne Verroust |
Computing a canonical polygonal schema of an orientable triangulated surface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCG ![In: Proceedings of the Seventeenth Annual Symposium on Computational Geometry, Medford, MA, USA, June 3-5, 2001, pp. 80-89, 2001, ACM, 1-58113-357-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Timothy Sherwood, Brad Calder |
Loop Termination Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISHPC ![In: High Performance Computing, Third International Symposium, ISHPC 2000, Tokyo, Japan, October 16-18, 2000. Proceedings, pp. 73-87, 2000, Springer, 3-540-41128-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Alain Darte |
On the Complexity of Loop Fusion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 149-157, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
loop distribution, complexity, parallelization, loop fusion |
22 | Sungdo Moon, Byoungro So, Mary W. Hall, Brian R. Murphy |
A Case for Combining Compile-Time and Run-Time Parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCR ![In: Languages, Compilers, and Run-Time Systems for Scalable Computers, 4th International Workshop, LCR '98, Pittsburgh, PA, USA, May 28-30, 1998, Selected Papers, pp. 91-106, 1998, Springer, 3-540-65172-1. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
22 | Ted Zhihong Yu, Edwin Hsing-Mean Sha, Nelson L. Passos, Roy Dz-Ching Ju |
Algorithm and Hardware Support for Branch Anticipation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March 1997, Urbana, IL, USA, pp. 163-, 1997, IEEE Computer Society, 0-8186-7904-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
22 | Cheng-Tien Wu, Chao-Tung Yang, Shian-Shyong Tseng |
PPD: A practical parallel loop detector for parallelizing compilers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 274-281, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
PPD, practical parallel loop detector, DOALL, practical parallelism detector, portable FORTRAN parallelizing compiler, OSF/1, ZIV test, I test, array subscripts, synchronization statement, parallel programming, FORTRAN, synchronisation, parallelizing compilers, parallelising compilers, DOACROSS loop |
22 | Ashutosh Mujumdar, Rajiv Jain, Kewal K. Saluja |
Incorporating testability considerations in high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 5(1), pp. 43-55, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
Automatic synthesis of testable designs, loop breaking, high-level synthesis, binding, synthesis for testability |
22 | Michael S. Schlansker, Vinod Kathail, Sadun Anik |
Height reduction of control recurrences for ILP processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30 - December 2, 1994, pp. 40-51, 1994, ACM / IEEE Computer Society, 0-89791-707-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
back-substitution, blocked back-substitution, control height reduction, parallelism, software pipeline, control dependences, loop optimization, recurrences |
22 | Pankaj Mehra, Catherine H. Schulbach, Jerry C. Yan |
A Comparison of Two Model-Based Performance-Prediction Techniques for Message-Passing Parallel Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems, Vanderbilt University, Nashville, Tennessee, USA, May 16-20, 1994, pp. 181-190, 1994, ACM, 0-89791-659-X. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
BDL |
22 | Lawrence Rauchwerger, David A. Padua |
The privatizing DOALL test: a run-time technique for DOALL loop identification and array privatization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994, pp. 33-43, 1994, ACM, 0-89791-665-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
22 | A. Zaafrani, Mabo Robert Ito |
Expressing cross-loop dependencies through hyperplane data dependence analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '94, Washington, DC, USA, November 14-18, 1994, pp. 508-517, 1994, IEEE Computer Society, 0-8186-6605-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
automatic generation of communication statements, index alignment, parallelizing compilers, data dependence, multicomputers |
22 | Saumya K. Debray |
Unfold/Fold Transformations and Loop Optimization of Logic Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'88 Conference on Programming Language Design and Implementation (PLDI), Atlanta, Georgia, USA, June 22-24, 1988, pp. 297-307, 1988, ACM, 0-89791-269-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
22 | Bogong Su, Shiyuan Ding, Jian Wang 0046, Jinshi Xia |
GURPR - a method for global software pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987, Colorado Springs, Colorado, USA, December 1-4, 1987, pp. 88-96, 1987, ACM/IEEE, 0-89791-250-0. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
22 | Ken Kennedy, Linda Zucconi |
Applications of Graph Grammar for Program Control Flow Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
POPL ![In: Conference Record of the Fourth ACM Symposium on Principles of Programming Languages, Los Angeles, California, USA, January 1977, pp. 72-85, 1977, ACM. The full citation details ...](Pics/full.jpeg) |
1977 |
DBLP DOI BibTeX RDF |
|
20 | Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito 0001 |
On the exploitation of loop-level parallelism in embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 8(2), pp. 10:1-10:34, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multithreading, Multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops, system-on-chip (Soc) |
20 | Andres Medina, Stephan Bohacek |
The impact of delayed topology information in proactive routing protocols for MANETS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PE-WASUN ![In: Proceedings of the 5th ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, Sensor, and Ubiquitous Networks, PE-WASUN 2008, Vancouver, British Columbia, Canada, October 27-28, 2008, pp. 42-49, 2008, ACM, 978-1-60558-236-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
proactive routing algorithms, routing loops, manets |
20 | Hausi A. Müller, Holger M. Kienle, Ulrike Stege |
Autonomic Computing Now You See It, Now You Don't. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSSE ![In: Software Engineering, International Summer Schools, ISSSE 2006-2008, Salerno, Italy, Revised Tutorial Lectures, pp. 32-54, 2008, Springer, 978-3-540-95887-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Continuous evolution, software complexity management, autonomic element, autonomic computing reference architecture, autonomic patterns, autonomic computing, self-managing systems, feedback loops, self-adaptive systems, software ecosystems |
20 | Li Qi, Karen L. Butler-Purry, Stephen Woodruff |
Realization of a generalized modeling method for ungrounded power systems in Matlab/Simulink. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCSC ![In: Proceedings of the 2007 Summer Computer Simulation Conference, SCSC 2007, San Diego, California, USA, July 16-19, 2007, pp. 37-44, 2007, Simulation Councils, Inc., 1-56555-316-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
algebraic loops, ungrounded power systems, nonlinear, building blocks, Matlab/Simulink |
20 | Boris Mejías, Peter Van Roy |
A Relaxed-Ring for Self-Organising and Fault-Tolerant Peer-to-Peer Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCCC ![In: XXVI International Conference of the Chilean Computer Science Society (SCCC 2007), 8-9 November 2007, Iquique, Chile, pp. 13-22, 2007, IEEE Computer Society, 978-0-7695-3017-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Decentralised systems, Peer-to-peer, Self-management, Feedback-loops, Faulttolerance |
20 | Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark |
Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 48-58, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Wish branches, wish loops, branch prediction, predicated execution |
20 | Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito 0001 |
Challenges in exploitation of loop parallelism in embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 173-180, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multithreading, multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops |
20 | Chao-Tung Yang, Kuan-Wei Cheng, Kuan-Ching Li |
An Enhanced Parallel Loop Self-Scheduling Scheme for Cluster Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 34(3), pp. 315-335, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cluster computing, PC clusters, parallel loops, self-scheduling, scheduling scheme |
20 | Wen-Chung Shih, Chao-Tung Yang, Shian-Shyong Tseng |
A Performance-Based Parallel Loop Self-scheduling on Grid Computing Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: Network and Parallel Computing, IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings, pp. 48-55, 2005, Springer, 3-540-29810-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Grid computing, MPI, Globus, Loop scheduling, Parallel loops, Self-scheduling |
20 | Alain Darte, Robert Schreiber |
A linear-time algorithm for optimal barrier placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2005, June 15-17, 2005, Chicago, IL, USA, pp. 26-35, 2005, ACM, 1-59593-080-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SPMD code, nested circular interval graph, nested loops, barrier synchronization, circular arc graph |
20 | Yong Yan 0003, Xiaodong Zhang 0001, Zhao Zhang 0010 |
Cacheminer: A Runtime Approach to Exploit Cache Locality on SMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 11(4), pp. 357-374, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
symmetric multiprocessors (SMP) and task scheduling, simulation, runtime systems, nested loops, Cache locality |
20 | Giuseppe Coldani, L. Cotrino, Giovanni Danese, Francesco Leporati, M. Maneri |
Notacheck: A Parallel DSP-Based Architecture for Real Time High Resolution Inspection of Bank-Notes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAMP ![In: Fifth International Workshop on Computer Architectures for Machine Perception (CAMP 2000), September 11-13, 2000, Padova, Italy, pp. 163, 2000, IEEE Computer Society, 0-7695-0740-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Notacheck, parallel DSP-based architecture, real time high resolution inspection, bank-notes, time-triggered synchronised actions, distributed architecture system, real-time systems, real time systems, real-time control, computer engineering, feedback loops, visual inspection |
20 | Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, Parimal Pal Chaudhuri, Rob Roy |
Fsimac: a fault simulator for asynchronous sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 114-119, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Fsimac, gate-level fault simulator, Muller C-elements, complex domino gates, high-speed design, min-max timing analysis, min-max rime stamps, CA-BIST, waveform model, logic testing, built-in self test, timing, cellular automata, Cellular Automata, sequential circuits, iterative methods, fault simulation, fault simulator, asynchronous circuits, stuck-at faults, iterations, delay faults, combinational logic, feedback loops, pseudo-random tests, gate-delay faults, asynchronous sequential circuits |
20 | Guang Lu, Rob Simmonds, Xiao Zhonge, Brian W. Unger, Carey L. Williamson |
The Performance of TCP over ATM on Lossy ADSL Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: Proceedings 27th Conference on Local Computer Networks, Tampa, Florida, USA, 8-10 November, 2000, pp. 418-427, 2000, IEEE Computer Society, 0-7695-0912-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
TCP over ATM, lossy ADSL networks, asymmetric digital subscriber line, protocol conversion overhead, data losses, noisy local loops, unidirectional bulk data transfer, independent error model, burst error model, TCP effective throughput, maximum segment size, switch buffer size, bandwidth asymmetry, noisy lines, asynchronous transfer mode, asynchronous transfer mode, transmission control protocol, noise, transport protocols, packet switching, digital simulation, simulation results, network architecture, performance metrics, simulation model, buffer storage, simulation experiments, losses, packet loss ratio, digital subscriber lines, transmission errors, channel errors, cell loss ratio |
20 | Kiran Bondalapati, Viktor K. Prasanna |
Dynamic Precision Management for Loop Computations on Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 249-, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Reconfigurable Computing, Precision, Loops |
20 | Jin-yi Cai, George Havas, Bernard Mans, Ajay Nerurkar, Jean-Pierre Seifert, Igor E. Shparlinski |
On Routing in Circulant Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COCOON ![In: Computing and Combinatorics, 5th Annual International Conference, COCOON '99, Tokyo, Japan, July 26-28, 1999, Proceedings, pp. 360-369, 1999, Springer, 3-540-66200-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Shortest paths, Lattices, Diameter, Loops, Circulant graphs |
20 | Ireneusz Karkowski, Henk Corporaal |
Design of Heterogenous Multi-Processor Embedded Systems: Applying Functional Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), San Francisco, CA, USA, October 11-15, 1997, pp. 156-165, 1997, IEEE Computer Society, 0-8186-8090-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
heterogenous multiprocessor embedded system design, functional pipelining, embedded program mapping, ANSI C program, application specific processor pipeline, frequency tracking system, two-processor system, highly optimized single core solution, architecture, multiprocessing systems, instruction level parallelism, speedup, efficient algorithm, loops |
20 | Chunho Lee, Miodrag Potkonjak, William H. Mangione-Smith |
MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 330-335, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
MediaBench, SPEC benchmark suite, benchmark suite, compilation technology, experimental measurement, general-purpose computing, general-purpose systems, inner-loops, optimization, multimedia systems, instruction-level parallelism, SIMD, VLIW, communications systems, embedded applications, microprocessor architectures |
20 | Jean Paul Stromboni |
Partitioning regular computational graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 431-, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
regular computational graph partitioning, massive applications, computational graph, array processing operations, strong regularity, dependence vectors, loop parameters, periodic dependence constraints, small example regular graph, parallel processing, program analysis, signal processing, parallel machine, nested loops, application program, array signal processing, application designer, loop nests |
20 | Behzad Razavi |
Next-Generation RF Circuits and Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 17th Conference on Advanced Research in VLSI (ARVLSI '97), September 15-16, 1997, Ann Arbor, MI, USA, pp. 270-283, 1997, IEEE Computer Society, 0-8186-7913-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
RF circuits, RF systems, wireless local loops, RF identification devices, multi-standard transceivers, IC technologies, wireless LAN, wireless LAN, wireless local area networks, CAD tools, cable modems |
20 | Jyh-Herng Chow, Vivek Sarkar |
False Sharing Elimination by Selection of Runtime Scheduling Parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 1997 International Conference on Parallel Processing (ICPP '97), August 11-15, 1997, Bloomington, IL, USA, Proceedings, pp. 396-403, 1997, IEEE Computer Society, 0-8186-8108-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
runtime scheduling, compilers, shared-memory multiprocessors, parallel loops, false sharing |
20 | Tsunehiko Kamachi, Kazuhiro Kusano, Kenji Suehiro, Yoshiki Seo |
Generating Realignment-Based Communication for HPF Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 364-371, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
realignment-based communication, HPF programs, iteration template, loop iteration mapping, two-level mapping, user-declared alignment, optimal alignment, NEC Cenju-3, compiler-generated program, hand-parallelized program, parallel programming, compiler, FORTRAN, distributed memory systems, software performance evaluation, parallel languages, parallel language, execution time, arrays, software portability, software portability, loops, High Performance Fortran, distributed-memory machines, distributed-memory machine, data mapping, program control structures, parallelising compilers, iteration space |
20 | Nelson L. Passos, Edwin Hsing-Mean Sha |
Synthesis of Multi-Dimensional Applications in VHDL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 530-535, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Multidimensional Loops, Scheduling, VHDL, Circuit Optimization, Address generation |
20 | Yuan Lu, Irith Pomeranz |
Synchronization of large sequential circuits by partial reset. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 93-98, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
large synchronous sequential circuits, synchronization, sequential circuits, synchronisation, feedback loops, synchronizing sequence, partial reset |
20 | L. Bisone, A. Scianna |
A CAD multiprocessor system for advanced real-time process applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), January 25-27, 1995, San Remo, Italy, pp. 494-501, 1995, IEEE Computer Society, 0-8186-7031-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CAD multiprocessor system, advanced real-time process applications, control diagrams, synoptic pages, control station, symbol editors, parallel VME bus, Field Instrumentation Protocol, real control loops, parallel simulator signals, complex parallel real time architecture, real-time systems, networking, protocols, parallel system, client-server systems, distributed control, trends, automation system, power generation, control system CAD |
20 | William Blume, Rudolf Eigenmann |
Symbolic range propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 357-363, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
symbolic range propagation, arbitrary symbolic expressions, Polaris, zero-trip loops, array sections, loop iteration-count estimation, lower bound, transformations, program test, program compilers, upper bound, parallelizing compiler, symbol manipulation, parallelising compilers |
20 | Doran Wilde, Sanjay V. Rajopadhye |
The naive execution of affine recurrence equations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: The International Conference on Application Specific Array Processors (ASAP'95), July 24-26, 1995, Strasbourg, France, pp. 1-12, 1995, IEEE Computer Society, 0-8186-7109-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
algorithmic languages, regular arrays, ALPHA language, computer aided design methodology, regular array architectures, algorithmic specification, imperative sequential language C, applicative caching, 1-dimensional storage, formal specification, circuit CAD, hardware description languages, nested loops, polyhedron, transformational approach, C-code, affine recurrence equations |
20 | Koichi Kise, Noriyoshi Yoneda, Shinobu Takamatsu, Kunio Fukunaga |
Interpretation of conceptual diagrams from line segments and strings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDAR ![In: Third International Conference on Document Analysis and Recognition, ICDAR 1995, August 14 - 15, 1995, Montreal, Canada. Volume II, pp. 960-963, 1995, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
conceptual diagrams, hypothesis generation, document image processing, strings, loops, lines, line segments, logical structure, character strings, hypothesis verification |
20 | Shing-Chi Cheung, Jeff Kramer |
Tractable Dataflow Analysis for Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 20(8), pp. 579-593, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
action dependency, history sets, pump control system, arbitrary loops, nondeterministic structures, synchronous communicating systems, distributed systems, software engineering, static analysis, distributed processing, program verification, reachability analysis, labeled transition systems, dataflow analysis, software development tools, distributed software engineering, worst-case complexity |
20 | Xiangyun Kong, David Klappholz, Kleanthis Psarris |
The I Test: An Improved Dependence Test for Automatic Parallelization and Vectorization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 2(3), pp. 342-349, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
I test, subscript dependence test, Banerjee tests, parallel programming, program testing, program compilers, vectorization, automatic parallelization, loops, loop iterations, GCD |
20 | J. Ramanujam, P. Sadayappan |
Compile-Time Techniques for Data Distribution in Distributed Memory Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 2(4), pp. 472-482, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
matrixnotation, array accesses, communication-freepartitioning, linear references, parallel programming, heuristics, program compilers, matrix algebra, data distribution, loop transformations, data partitioning, distributed memory machines, sufficient conditions, parallel loops, compile time, data decompositions |
20 | Rangachar Kasturi, Sing T. Bow, Wassim El-Masri, Jayesh Shah, James R. Gattiker, Umesh B. Mokate |
A System for Interpretation of Line Drawings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 12(10), pp. 978-992, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
IKBS, hatching, paper-based line drawings, thin entities, core-lines, thick objects, minimum redundancy loops, filling patterns, knowledge based system, knowledge based systems, graphics, Hough transform, document image processing, document image processing, boundaries, segmented image, text strings |
20 | Vincent A. Busam, Donald E. Englund |
Optimization of expressions in Fortran. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Commun. ACM ![In: Commun. ACM 12(12), pp. 666-674, 1969. The full citation details ...](Pics/full.jpeg) |
1969 |
DBLP DOI BibTeX RDF |
DO loops, invariant calculations, optimization, compilation, compilers, FORTRAN, FORTRAN, register allocation, expressions, common subexpressions, subscripts |
17 | Li Han, Lee Rudolph, Sam Dorsey-Gordon, Dylan Glotzer, Dan Menard, Jonathan Moran, James R. Wilson |
Bending and kissing: Computing self-contact configurations of planar loops with revolute joints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2009 IEEE International Conference on Robotics and Automation, ICRA 2009, Kobe, Japan, May 12-17, 2009, pp. 1346-1351, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Jiayuan Meng, Kevin Skadron |
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 256-265, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ghost zone, parallel computing, gpu, stencil computation |
17 | Peggy Yao, Ankur Dhanik, Nathan Marz, Ryan Propper, Charles Kou, Guanfeng Liu, Henry van den Bedem, Jean-Claude Latombe, Inbal Halperin-Landsberg, Russ B. Altman |
Efficient Algorithms to Explore Conformation Spaces of Flexible Protein Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE ACM Trans. Comput. Biol. Bioinform. ![In: IEEE ACM Trans. Comput. Biol. Bioinform. 5(4), pp. 534-545, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Robotics, Biology and genetics |
17 | Miao Wang, Rongcai Zhao, Jianmin Pang, Guoming Cai |
Reconstructing Control Flow in Modulo Scheduled Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 7th IEEE/ACIS International Conference on Computer and Information Science, IEEE/ACIS ICIS 2008, 14-16 May 2008, Portland, Oregon, USA, pp. 539-544, 2008, IEEE Computer Society, 978-0-7695-3131-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
register rotation, modulo scheduling, decompilation, predication execution, conditional branches |
17 | Michael Eagle, Tiffany Barnes |
Wu's castle: teaching arrays and loops in a game. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITiCSE ![In: Proceedings of the 13th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, ITiCSE 2008, Madrid, Spain, June 30 - July 2, 2008, pp. 245-249, 2008, ACM, 978-1-60558-078-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CS1 education, Game2Learn, games, iteration, arrays |
17 | Costin Iancu, Wei Chen 0011, Katherine A. Yelick |
Performance portable optimizations for loops containing communication operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 266-276, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
communication, parallel programming, program transformations, code generation, latency hiding, performance portability |
17 | Gayan Wijesinghe, Victor Ciesielski |
Experiments with indexed FOR-loops in genetic programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2008, Proceedings, Atlanta, GA, USA, July 12-16, 2008, pp. 1347-1348, 2008, ACM, 978-1-60558-130-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
philosophical aspects of evolutionary computing, machine learning, genetic programming, representations, theory |
17 | Angel Abusleme, Boris Murmann |
Predictive control algorithm for phase-locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1528-1531, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Stefan Tertinek, Alexey Teplinsky, Orla Feely |
Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1544-1547, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Kevin Sliech, Martin Margala |
A Digital BIST for Phase-Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 134-142, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Mikhail Prokopenko, Astrid Zeman, Rongxin Li |
Homeotaxis: Coordination with Persistent Time-Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAB ![In: From Animals to Animats 10, 10th International Conference on Simulation of Adaptive Behavior, SAB 2008, Osaka, Japan, July 7-12, 2008. Proceedings, pp. 403-414, 2008, Springer, 978-3-540-69133-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Javier J. Gutiérrez 0001, María J. Escalona, Manuel Mejías, Isabel M. Ramos, Claudia P. Gómez |
Automatic application of the category-partition method with loops support over functional requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EATIS ![In: Proceedings of the 2008 Euro American conference on Telematics and Information Systems, EATIS 2008, Aracaju, Brazil, September 10-12, 2008, 2008, 978-1-59593-988-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
test case, activity diagram, category-partition method |
17 | Florent Ségonne, Jenni Pacheco, Bruce Fischl |
Geometrically Accurate Topology-Correction of Cortical Surfaces Using Nonseparating Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Medical Imaging ![In: IEEE Trans. Medical Imaging 26(4), pp. 518-529, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz |
Improved Interval-Based Characterization of Fixed-Point LTI Systems With Feedback Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11), pp. 1923-1933, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Wei Zhang 0002, Bramha Allu |
Reducing branch predictor leakage energy by exploiting loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 6(2), pp. 11, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
compiler, Branch prediction, leakage energy |
17 | Chun Xue, Zili Shao, Edwin Hsing-Mean Sha |
Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 47(2), pp. 153-167, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
optimization, parallelism, loop transformation |
17 | Fabio T. Ramos 0001, Juan I. Nieto 0001, Hugh F. Durrant-Whyte |
Recognising and Modelling Landmarks to Close Loops in Outdoor SLAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2007 IEEE International Conference on Robotics and Automation, ICRA 2007, 10-14 April 2007, Roma, Italy, pp. 2036-2041, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Tsan-Ming Wu, Tsung-Hua Tsai |
Digital Code Tracking Loops Over Frequency-Selective Fading Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICC ![In: Proceedings of IEEE International Conference on Communications, ICC 2007, Glasgow, Scotland, UK, 24-28 June 2007, pp. 5246-5251, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Xuejun Yang, Yu Deng 0001, Xiaobo Yan, Li Wang 0027, Jing Du 0002, Ying Zhang 0032 |
Efficient generation of stream programs from loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Dominic DiClemente, Fei Yuan 0005 |
Current-Mode Phase-Locked Loops with Low Supply Voltage Sensitivity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2172-2175, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Tarvo Raudvere, Ingo Sander, Axel Jantsch |
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 353-358, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
design refinement, synchronization, system design |
17 | Sukumar Kamalasadan |
An Organizational Coordinated Control Paradigm for Complex Systems based on Intelligent Agent Supervisory Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN ![In: Proceedings of the International Joint Conference on Neural Networks, IJCNN 2007, Celebrating 20 years of neural networks, Orlando, Florida, USA, August 12-17, 2007, pp. 3029-3034, 2007, IEEE, 978-1-4244-1379-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Miao Wang, Rongcai Zhao, Guoming Cai |
Un-speculation in Modulo Scheduled Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMSCCS ![In: Proceeding of the Second International Multi-Symposium of Computer and Computational Sciences (IMSCCS 2007), August 13-15, 2007, The University of Iowa, Iowa City, Iowa, USA, pp. 486-489, 2007, IEEE Computer Society, 0-7695-3039-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Ankur Dhanik, Peggy Yao, Nathan Marz, Ryan Propper, Charles Kou, Guanfeng Liu 0001, Henry van den Bedem, Jean-Claude Latombe |
Efficient Algorithms to Explore Conformation Spaces of Flexible Protein Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WABI ![In: Algorithms in Bioinformatics, 7th International Workshop, WABI 2007, Philadelphia, PA, USA, September 8-9, 2007, Proceedings, pp. 265-276, 2007, Springer, 978-3-540-74125-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Henry H. Y. Chan, Zeljko Zilic |
Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 430-435, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Ricolindo Cariño, Ioana Banicescu |
A Dynamic Load Balancing Tool for One and Two Dimensional Parallel Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC ![In: 5th International Symposium on Parallel and Distributed Computing (ISPDC 2006), 6-9 July 2006, Timisoara, Romania, pp. 107-114, 2006, IEEE Computer Society, 0-7695-2638-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Evangelos F. Stefatos, Tughrul Arslan, Didier Keymeulen, Ian Ferguson |
Integrating the Electronics of the Control-Loops of the JPL/Boeing Gyroscope Within an Evolvable Hardware Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha |
Loop Striping: Maximize Parallelism for Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2006, Seoul, Korea, August 1-4, 2006, Proceedings, pp. 405-414, 2006, Springer, 3-540-36679-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Eleftherios Karipidis, Nicholas D. Sidiropoulos, Amir Leshem, Youming Li |
Experimental evaluation of capacity statistics for short VDSL loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 53(7), pp. 1119-1122, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Yanhong A. Liu, Scott D. Stoller, Ning Li, Tom Rothamel |
Optimizing aggregate array computations in loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 27(1), pp. 91-125, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Array dependence analysis, caching intermediate results, program transformation, incremental computation, loop optimization |
17 | Sam Jeong, Kun Hee Han |
Improving Parallelism of Nested Loops with Non-uniform Dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: Network and Parallel Computing, IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings, pp. 205-212, 2005, Springer, 3-540-29810-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Bernhard Beckert, Steffen Schlager, Peter H. Schmitt |
An Improved Rule for While Loops in Deductive Program Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFEM ![In: Formal Methods and Software Engineering, 7th International Conference on Formal Engineering Methods, ICFEM 2005, Manchester, UK, November 1-4, 2005, Proceedings, pp. 315-329, 2005, Springer, 3-540-29797-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Hector Gómez-Gauchía, Belén Díaz-Agudo, Pedro Pablo Gómez-Martín, Pedro A. González-Calero |
Supporting Conversation Variability in COBBER Using Causal Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCBR ![In: Case-Based Reasoning, Research and Development, 6th International Conference, on Case-Based Reasoning, ICCBR 2005, Chicago, IL, USA, August 23-26, 2005, Proceedings, pp. 252-266, 2005, Springer, 3-540-28174-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasinghe |
Exploiting Vector Parallelism in Software Pipelined Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 119-129, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Huayong Wang, Yu Chen 0004, Yiqi Dai |
A Soft Real-Time Web News Classification System with Double Control Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WAIM ![In: Advances in Web-Age Information Management, 6th International Conference, WAIM 2005, Hangzhou, China, October 11-13, 2005, Proceedings, pp. 81-90, 2005, Springer, 3-540-29227-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Nikolaos Drosinos, Nectarios Koziris |
Load Balancing Hybrid Programming Models for SMP Clusters and Fully Permutable Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 34th International Conference on Parallel Processing Workshops (ICPP 2005 Workshops), 14-17 June 2005, Oslo, Norway, pp. 113-120, 2005, IEEE Computer Society, 0-7695-2381-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Eric Renault |
Parallel Execution of For Loops Using Checkpointing Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 34th International Conference on Parallel Processing Workshops (ICPP 2005 Workshops), 14-17 June 2005, Oslo, Norway, pp. 313-319, 2005, IEEE Computer Society, 0-7695-2381-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Pooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi |
Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2255-2258, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | J. Howard Johnson |
Collapsing epsilon-Loops in Weighted Finite-State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FSMNLP ![In: Finite-State Methods and Natural Language Processing, 5th International Workshop, FSMNLP 2005, Helsinki, Finland, September 1-2, 2005. Revised Papers, pp. 110-119, 2005, Springer, 3-540-35467-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Aaron R. Bradley, Zohar Manna, Henny B. Sipma |
Termination Analysis of Integer Linear Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONCUR ![In: CONCUR 2005 - Concurrency Theory, 16th International Conference, CONCUR 2005, San Francisco, CA, USA, August 23-26, 2005, Proceedings, pp. 488-502, 2005, Springer, 3-540-28309-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Georgios Dimitriou, Constantine D. Polychronopoulos |
Hardware Support for Multithreaded Execution of Loops with Limited Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Panhellenic Conference on Informatics ![In: Advances in Informatics, 10th Panhellenic Conference on Informatics, PCI 2005, Volos, Greece, November 11-13, 2005, Proceedings, pp. 622-632, 2005, Springer, 3-540-29673-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Valentin Guignon, Cédric Chauve, Sylvie Hamel |
An Edit Distance Between RNA Stem-Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIRE ![In: String Processing and Information Retrieval, 12th International Conference, SPIRE 2005, Buenos Aires, Argentina, November 2-4, 2005, Proceedings, pp. 335-347, 2005, Springer, 3-540-29740-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Kree Cole-McLaughlin, Herbert Edelsbrunner, John Harer, Vijay Natarajan, Valerio Pascucci |
Loops in Reeb Graphs of 2-Manifolds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Comput. Geom. ![In: Discret. Comput. Geom. 32(2), pp. 231-244, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Maria Athanasaki, Evangelos Koukis, Nectarios Koziris |
Scheduling of Tiled Nested Loops onto a Cluster with a Fixed Number of SMP Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 12th Euromicro Workshop on Parallel, Distributed and Network-Based Processing (PDP 2004), 11-13 February 2004, A Coruna, Spain, pp. 424-433, 2004, IEEE Computer Society, 0-7695-2083-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Hongbo Rong, Alban Douillet, Ramaswamy Govindarajan, Guang R. Gao |
Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 20-24 March 2004, San Jose, CA, USA, pp. 175-188, 2004, IEEE Computer Society, 0-7695-2102-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Spiros Kalogeropulos, Mahadevan Rajagopalan, Vikram Rao, Yonghong Song, Partha Tirumalai |
Processor Aware Anticipatory Prefetching in Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 106-117, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Jong Kwan Lee, Timothy S. Newman, G. Allen Gary |
Automated Detection of Solar Loops by the Oriented Connectivity Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPR (4) ![In: 17th International Conference on Pattern Recognition, ICPR 2004, Cambridge, UK, August 23-26, 2004., pp. 315-318, 2004, IEEE Computer Society, 0-7695-2128-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Herng-Jer Lee, Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng |
Applications of tree/link partitioning for moment computations of general lumped RLC networks with resistor loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 713-716, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Antoine Rauzy |
A new methodology to handle Boolean models with loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 52(1), pp. 96-105, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Federico Fontana |
Computation of linear filter networks containing delay-free loops, with an application to the waveguide mesh. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Speech Audio Process. ![In: IEEE Trans. Speech Audio Process. 11(6), pp. 774-782, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt |
An algorithm for mapping loops onto coarse-grained reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2003 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'03). San Diego, California, USA, June 11-13, 2003, pp. 183-188, 2003, ACM, 1-58113-647-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ALU array, memory bandwidth utilization, coarse-grained reconfigurable architecture, mapping algorithm |
17 | Martin John Burbidge, Jim Tijou, Andrew Richardson 0001 |
Techniques for Automatic On Chip Closed Loop Transfer Function Monitoring For Embedded Charge Pump Phase Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10496-10503, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
CP-PLL, TEST, DfT, BIST, PLL |
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