Search results for "speculative"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
22	Alex Pajuelo, Antonio González 0001, Mateo Valero	Speculative execution for hiding memory latency.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF
22	Won Woo Ro, Jean-Luc Gaudiot	A Low-Complexity Issue Queue Design with Speculative Pre-execution.	HiPC	2005	DBLP DOI BibTeX RDF
22	Pierre Salverda, Grigore Rosu, Craig B. Zilles	Formally Defining and Verifying Master/Slave Speculative Parallelization.	FM	2005	DBLP DOI BibTeX RDF
22	Werner Damm	Controlling Speculative Design Processes Using Rich Component Models.	ACSD	2005	DBLP DOI BibTeX RDF
22	Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Lim, Tin-Fook Ngai	Speculative Parallel Threading Architecture and Compilation.	ICPP Workshops	2005	DBLP DOI BibTeX RDF
22	Nana B. Sam, Martin Burtscher	On the energy-efficiency of speculative hardware.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	energy-performance metric, energy-efficiency, speculation
22	Yongxiang Liu, Gokhan Memik, Glenn Reinman	Reducing the Energy of Speculative Instruction Schedulers.	ICCD	2005	DBLP DOI BibTeX RDF
22	Arkadiusz Danilecki, Anna Kobusinska, Michal Szychowiak	Checkpointing Speculative Distributed Shared Memory.	PPAM	2005	DBLP DOI BibTeX RDF
22	Jaehyuk Huh 0001, Doug Burger, Jichuan Chang, Gurindar S. Sohi	Speculative Incoherent Cache Protocols.	IEEE Micro	2004	DBLP DOI BibTeX RDF
22	Ravi Rajwar, Alain Kägi, James R. Goodman	Inferential Queueing and Speculative Push.	Int. J. Parallel Program.	2004	DBLP DOI BibTeX RDF	inferential queueing, migratory sharing, Synchronization, critical sections, data forwarding
22	Bernhard Scholz, R. Nigel Horspool, Jens Knoop	Optimizing for space and time usage with speculative partial redundancy elimination.	LCTES	2004	DBLP DOI BibTeX RDF	partial redundancy, speculation, code motion, profile-guided optimization, common subexpressions
22	Jürgen Foag	Speculative Network Processor for Quality-of-Service-Aware Protocol Processing.	NCA	2004	DBLP DOI BibTeX RDF
22	Peter G. Sassone, D. Scott Wills	Dynamic Strands: Collapsing Speculative Dependence Chains for Reducing Pipeline Communication.	MICRO	2004	DBLP DOI BibTeX RDF
22	Bengu Li, Youtao Zhang, Rajiv Gupta 0001	Speculative Subword Register Allocation in Embedded Processors.	LCPC	2004	DBLP DOI BibTeX RDF
22	Frank Hannig, Jürgen Teich	Resource Constrained and Speculative Scheduling of an Algorithm Class with Run-Time Dependent Conditionals.	ASAP	2004	DBLP DOI BibTeX RDF
22	José F. Martínez, Josep Torrellas	Speculative Synchronization: Programmability and Performance for Parallel Codes.	IEEE Micro	2003	DBLP DOI BibTeX RDF
22	Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors.	HiPC	2003	DBLP DOI BibTeX RDF
22	Fredrik Warg, Per Stenström	Improving Speculative Thread-Level Parallelism Through Module Run-Length Prediction.	IPDPS	2003	DBLP DOI BibTeX RDF	module-level parallelism, module run-length prediction, performance evaluation, Multiprocessors, thread-level speculation
22	Ravi Rajwar, Alain Kägi, James R. Goodman	Inferential queueing and speculative push for reducing critical communication latencies.	ICS	2003	DBLP DOI BibTeX RDF	inferential queueing, synchronization, data forwarding
22	Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris	Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case.	ICCD	2003	DBLP DOI BibTeX RDF
22	Michael Angermann	Analysis of speculative prefetching.	ACM SIGMOBILE Mob. Comput. Commun. Rev.	2002	DBLP DOI BibTeX RDF
22	Manel Fernández, Roger Espasa	Speculative Alias Analysis for Executable Code.	IEEE PACT	2002	DBLP DOI BibTeX RDF
22	Craig B. Zilles, Gurindar S. Sohi	Master/slave speculative parallelization.	MICRO	2002	DBLP DOI BibTeX RDF
22	Francis H. Dang, Hao Yu 0008, Lawrence Rauchwerger	The R-LRPD Test: Speculative Parallelization of Partially Parallel Loops.	IPDPS	2002	DBLP DOI BibTeX RDF
22	Abhik Roychoudhury, Xianfeng Li, Tulika Mitra	Timing Analysis of Embedded Software for Speculative Processors.	ISSS	2002	DBLP DOI BibTeX RDF	worst case execution time, branch prediction
22	Jeffrey T. Oplinger, Monica S. Lam	Enhancing software reliability with speculative threads.	ASPLOS	2002	DBLP DOI BibTeX RDF
22	Hidetomo Nabeshima, Koji Iwanuma, Katsumi Inoue	Effective SAT Planning by Speculative Computation.	Australian Joint Conference on Artificial Intelligence	2002	DBLP DOI BibTeX RDF
22	Fredrik Warg, Per Stenström	Limits on Speculative Module-Level Parallelism in Imperative and Object-Oriented Programs on CMP Platforms.	IEEE PACT	2001	DBLP DOI BibTeX RDF
22	Bradley L. Noble, J. Cris Wade, Roger D. Chamberlain	Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation.	Annual Simulation Symposium	2001	DBLP DOI BibTeX RDF
22	Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Improving Conditional Branch Prediction on Speculative Multithreading Architectures.	Euro-Par	2001	DBLP DOI BibTeX RDF
22	Chong-liang Ooi, Seon Wook Kim, Il Park 0001, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar	Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor.	ICS	2001	DBLP DOI BibTeX RDF
22	Ugur Çetintemel, Peter J. Keleher, Michael J. Franklin	Support for Speculative Update Propagation and Mobility in Deno.	ICDCS	2001	DBLP DOI BibTeX RDF
22	Francis H. Dang, Lawrence Rauchwerger	Speculative Parallelization of Partially Parallel Loops.	LCR	2000	DBLP DOI BibTeX RDF
22	Jaroslaw Forenc, Andrzej Jordan, Marek Tudruj	Speculative Parallel Processing Applied to Modeling of Initial Problems in Electrical Circuits.	PARELEC	2000	DBLP DOI BibTeX RDF
22	Tamarah Arons, Amir Pnueli	A Comparison of Two Verification Methods for Speculative Instruction Execution.	TACAS	2000	DBLP DOI BibTeX RDF
22	Alexander B. Godlevsky, Martin Gazák, Ladislav Hluchý	Parallelizing of Seqential Programs on the Basis of Pipeline and Speculative Features of the Operators.	PaCT	1999	DBLP DOI BibTeX RDF
22	John P. Morrison, Martin Rem	Speculative Computing in the Condensed Graphs Machine.	ICPP Workshops	1999	DBLP DOI BibTeX RDF	Parallel Processing, Dataflow, Speculation, Graph Reduction, Condensed Graphs
22	Hank G. Dietz	Speculative Predication Across Arbitrary Interprocedural Control Flow.	LCPC	1999	DBLP DOI BibTeX RDF
22	Jun Sawada, Warren A. Hunt Jr.	Processor Verification with Precise Exeptions and Speculative Execution.	CAV	1998	DBLP DOI BibTeX RDF
22	Rafael R. dos Santos, Philippe Olivier Alexandre Navaux	Analysing a Multistreamed Superscalar Speculative Fetch Mechanism.	Euro-Par	1998	DBLP DOI BibTeX RDF
22	Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel	Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders.	ASYNC	1997	DBLP DOI BibTeX RDF	completion detection, Brent-Kung, Carry-Bypass, asynchronous, adders, hazards, high-performance design
22	Yvon Jégou, Olivier Temam	Speculative Prefetching.	International Conference on Supercomputing	1993	DBLP DOI BibTeX RDF
22	Bogumil Hausman	Pruning and Scheduling Speculative Work in Or-Parallel Prolog.	PARLE (2)	1989	DBLP DOI BibTeX RDF
17	Robert Law	Using student blogs for documentation in software development projects.	ITiCSE	2011	DBLP DOI BibTeX RDF
17	Matthew Canton	The presence table: a reactive surface for ambient connection.	TEI	2011	DBLP DOI BibTeX RDF
17	Mario Méndez-Lojo, Donald Nguyen, Dimitrios Prountzos, Xin Sui, Muhammad Amber Hassaan, Milind Kulkarni 0001, Martin Burtscher, Keshav Pingali	Structure-driven optimizations for amorphous data-parallel programs.	PPoPP	2010	DBLP DOI BibTeX RDF	amorphous data-parallelism, cautious operator implementations, iteration coalescing, one-shot optimization, synchronization overheads, optimistic parallelization, irregular programs
17	Colin Blundell, Milo M. K. Martin, Thomas F. Wenisch	InvisiFence: performance-transparent memory ordering in conventional multiprocessors.	ISCA	2009	DBLP DOI BibTeX RDF	parallel programming, memory consistency
17	Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero	Runahead Threads to improve SMT performance.	HPCA	2008	DBLP DOI BibTeX RDF
17	Matthew Fluet, Mike Rainey, John H. Reppy	A scheduling framework for general-purpose parallel languages.	ICFP	2008	DBLP DOI BibTeX RDF	heterogeneous parallel languages, scheduling, compilers, run-time systems
17	Patrick Akl, Andreas Moshovos	Turbo-ROB: A Low Cost Checkpoint/Restore Accelerator.	HiPEAC	2008	DBLP DOI BibTeX RDF
17	Andrey Brito	Optimistic parallelization support for event stream processing systems.	Middleware (Doctoral Symposium)	2008	DBLP DOI BibTeX RDF	software transactional memory, optimistic parallelization, event stream processing
17	Bumyong Choi, Leo Porter 0001, Dean M. Tullsen	Accurate branch prediction for short threads.	ASPLOS	2008	DBLP DOI BibTeX RDF	chip multiprocessors, branch prediction
17	Wenjing Rao, Alex Orailoglu, Ramesh Karri	Towards Nanoelectronics Processor Architectures.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	fault tolerance, reliability, computational model, processor architecture, nanoelectronics, time redundancy, hardware redundancy
17	Satish Narayanasamy, Ayse K. Coskun, Brad Calder	Transient fault prediction based on anomalies in processor events.	DATE	2007	DBLP DOI BibTeX RDF
17	Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Patil, William H. Reinhart, Darrel Eric Johnson, Jebediah Keefe, Hari Angepat	FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators.	MICRO	2007	DBLP DOI BibTeX RDF
17	Liqun Cheng, John B. Carter, Donglai Dai	An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing.	HPCA	2007	DBLP DOI BibTeX RDF
17	Christoph von Praun, Luis Ceze, Calin Cascaval	Implicit parallelism with ordered transactions.	PPoPP	2007	DBLP DOI BibTeX RDF	ordered transactions, parallel programming, transactional memory, thread-level speculation, program parallelization, implicit parallelism
17	Huiyang Zhou	A case for fault tolerance and performance enhancement using chip multi-processors.	IEEE Comput. Archit. Lett.	2006	DBLP DOI BibTeX RDF
17	Laurence A. Wolsey	Lot-sizing with production and delivery time windows.	Math. Program.	2006	DBLP DOI BibTeX RDF	Production time windows, Convex hull, Mixed integer programming, Lot-sizing
17	Tingting Sha, Milo M. K. Martin, Amir Roth	NoSQ: Store-Load Communication without a Store Queue.	MICRO	2006	DBLP DOI BibTeX RDF
17	Eric Petit 0003, François Bodin, Guillaume Papaure, Florence Dru	Poster reception - ASTEX: a hot path based thread extractor for distributed memory system on a chip.	SC	2006	DBLP DOI BibTeX RDF
17	Xianfeng Li, Tulika Mitra, Abhik Roychoudhury	Modeling Control Speculation for Timing Analysis.	Real Time Syst.	2005	DBLP DOI BibTeX RDF	micro-architectural modeling, worst case execution time, branch prediction, schedulability analysis, instruction cache
17	Harit Modi, Lawrence Spracklen, Yuan Chou, Santosh G. Abraham	Accurate Modeling of Aggressive Speculation in Modern Microprocessor Architectures.	MASCOTS	2005	DBLP DOI BibTeX RDF
17	Jaroslaw Forenc, Andrzej Jordan, Marek Tudruj	Parallel Modeling of Transient States Analysis in Electrical Circuits.	PVM/MPI	2005	DBLP DOI BibTeX RDF
17	Matthew Curtis-Maury, Tanping Wang	Integrating Multiple Forms of Multithreaded Execution on multi-SMT Systems: A Study with Scientific Applications.	QEST	2005	DBLP DOI BibTeX RDF
17	Smruti R. Sarangi, Wei Liu, Yuanyuan Zhou	ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing.	MICRO	2005	DBLP DOI BibTeX RDF
17	Nathan Tuck, Dean M. Tullsen	Multithreaded Value Prediction.	HPCA	2005	DBLP DOI BibTeX RDF
17	Lawrence Spracklen, Santosh G. Abraham	Chip Multithreading: Opportunities and Challenges.	HPCA	2005	DBLP DOI BibTeX RDF
17	Wenjing Rao, Alex Orailoglu, Ramesh Karri	Fault tolerant nanoelectronic processor architectures.	ASP-DAC	2005	DBLP DOI BibTeX RDF
17	Jason Nelson	The bomar gene: fictiobiography, digiart, hypertext.	ACM Multimedia	2005	DBLP DOI BibTeX RDF	ficto-biography, interactive, genetics, fiction, net-art
17	Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, Glenn Reinman	Tornado warning: the perils of selective replay in multithreaded processors.	ICS	2005	DBLP DOI BibTeX RDF
17	Kai Shen	Parallel sparse LU factorization on second-class message passing platforms.	ICS	2005	DBLP DOI BibTeX RDF
17	Wenjing Rao, Alex Orailoglu, Ramesh Karri	Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors.	ICCD	2005	DBLP DOI BibTeX RDF
17	Amir Roth	Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization.	ISCA	2005	DBLP DOI BibTeX RDF
17	Vlad Petric, Tingting Sha, Amir Roth	RENO - A Rename-Based Instruction Optimizer.	ISCA	2005	DBLP DOI BibTeX RDF
17	Takashi Yokota, Moriyuki Saito, Fumihito Furukawa, Kanemitsu Ootsu, Takanobu Baba	Two-Path Limited Speculation Method for Static/Dynamic Optimization in Multithreaded Systems.	PDCAT	2005	DBLP DOI BibTeX RDF
17	Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz	Coupling compiler-enabled and conventional memory accessing for energy efficiency.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	translation buffers, virtually addressed caches, Energy efficiency
17	Jinson Koppanalil, Eric Rotenberg	A Simple Mechanism for Detecting Ineffectual Instructions in Slipstream Processors.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	slipstream, preexecution, chip multiprocessor, multithreading, Microarchitecture
17	Hakan Aydin, Rami G. Melhem, Daniel Mossé, Pedro Mejía-Alvarez	Power-Aware Scheduling for Periodic Real-Time Tasks.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	Real-time systems, dynamic voltage scaling, power-aware computing, low-power systems, periodic task scheduling
17	Dakai Zhu 0001, Daniel Mossé, Rami G. Melhem	Power-Aware Scheduling for AND/OR Graphs in Real-Time Systems.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF	AND/OR, real-time systems, Power-aware scheduling
17	Peng-Sheng Chen, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee	Interprocedural Probabilistic Pointer Analysis.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF	interprocedural program analysis, optimization, compilers, Multithreading, speculation, points-to analysis
17	Sumit Gupta, Nicolae Savoiu, Nikil D. Dutt, Rajesh K. Gupta 0001, Alexandru Nicolau	Using global code motions to improve the quality of results for high-level synthesis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
17	Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu	Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems.	IEEE PACT	2004	DBLP DOI BibTeX RDF
17	Vinod Viswanath	Multi-log Processor - Towards Scalable Event-Driven Multiprocessors.	DSD	2004	DBLP DOI BibTeX RDF
17	David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt	Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery.	MICRO	2004	DBLP DOI BibTeX RDF
17	Dongsoo Kang, Jean-Luc Gaudiot	Speculation Control for Simultaneous Multithreading.	IPDPS	2004	DBLP DOI BibTeX RDF
17	Shoichi Hirasawa, Kei Hiraki	Utilizing Dynamic Data Value Localities in Internal Variables.	PDCAT	2004	DBLP DOI BibTeX RDF	data value reuse, automatic parallel execution, Value locality
17	Hong Wang 0003, Shiri Manor, Dave LaFollette, Nadav Nesher, Ku-jei King, Perry H. Wang, Shay Levy, Shai Satt, Gal Carmeli, Arjun Kapur, Ioannis Schoinas, Ed Rubinstein, Rahul Bhatt	Inferno: a functional simulation infrastructure for modeling microarchitectural data speculations.	ISPASS	2003	DBLP DOI BibTeX RDF
17	Kenneth J. Mackin, Kazuko Yamasaki	Emergence in Agents with Different Internal Time Frames.	KES	2003	DBLP DOI BibTeX RDF
17	Il Park 0001, Babak Falsafi, T. N. Vijaykumar	Iimplicitly-Multithreaded Processors.	ISCA	2003	DBLP DOI BibTeX RDF
17	Xianfeng Li, Tulika Mitra, Abhik Roychoudhury	Accurate timing analysis by modeling caches, speculation and their interaction.	DAC	2003	DBLP DOI BibTeX RDF	cache, worst case execution time, branch prediction
17	Andreas Moshovos, Gurindar S. Sohi	Reducing Memory Latency via Read-after-Read Memory Dependence Prediction.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	memory dependence prediction, cache, dynamic optimization, load
17	Daniel Ortega, Eduard Ayguadé, Jean-Loup Baer, Mateo Valero	Cost-Effective Compiler Directed Memory Prefetching and Bypassing.	IEEE PACT	2002	DBLP DOI BibTeX RDF
17	Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen	Pointer cache assisted prefetching.	MICRO	2002	DBLP DOI BibTeX RDF
17	Matthew Arnold, Barbara G. Ryder	Thin Guards: A Simple and Effective Technique for Reducing the Penalty of Dynamic Class Loading.	ECOOP	2002	DBLP DOI BibTeX RDF
17	Jürgen Foag, Thomas Wild, Nuria Pazos, Winthir Brunnbauer	Predictive methodology for high-performance networking.	ISCC	2002	DBLP DOI BibTeX RDF
17	Lori Carter, Weihaw Chuang, Brad Calder	An EPIC Processor with Pending Functional Units.	ISHPC	2002	DBLP DOI BibTeX RDF
17	André Rauber Du Bois, Robert F. Pointon, Hans-Wolfgang Loidl, Philip W. Trinder	Implementing Declarative Parallel Bottom-Avoiding Choice.	SBAC-PAD	2002	DBLP DOI BibTeX RDF
17	Dakai Zhu 0001, Nevine AbouGhazaleh, Daniel Mossé, Rami G. Melhem	Power Aware Scheduling for AND/OR Graphs in Multi-Processor Real-Time Systems.	ICPP	2002	DBLP DOI BibTeX RDF
17	Harold W. Cain, Kevin M. Lepak, Mikko H. Lipasti	A dynamic binary translation approach to architectural simulation.	SIGARCH Comput. Archit. News	2001	DBLP DOI BibTeX RDF