Search results for "CMP"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
18	Jianxun Zhang, Zhimin Gu	Exposing the Shared Cache Behavior of Helper Thread on CMP Platforms.	CSE	2011	DBLP DOI BibTeX RDF
18	Rawan Abdel-Khalek, Ritesh Parikh, Andrew DeOrio, Valeria Bertacco	Functional correctness for CMP interconnects.	ICCD	2011	DBLP DOI BibTeX RDF
18	Sachhidh Kannan, Garrett S. Rose	A hierarchical 3-D floorplanning algorithm for many-core CMP networks.	ISCAS	2011	DBLP DOI BibTeX RDF
18	Lide Duan, Lu Peng 0001, Bin Li 0008	Two-level soft error vulnerability prediction on SMT/CMP architectures.	IISWC	2011	DBLP DOI BibTeX RDF
18	Van T. K. Tran, Kevin Lee, Alan D. Fekete, Anna Liu, Jacky Keung	Size Estimation of Cloud Migration Projects with Cloud Migration Point (CMP).	ESEM	2011	DBLP DOI BibTeX RDF
18	Philippe Morey-Chaisemartin, Eric Beisser, Jean-Claude Marin, Lidwine Chaize, Pascal Guyader, Julien Rosa	CMP monitoring and prediction based metal fill.	ISQED	2011	DBLP DOI BibTeX RDF
18	Hideaki Moriyama, Toshihiro Yamauchi, Hideo Taniguchi	Control method of multiple services for CMP based on continuation model.	ICIS	2011	DBLP BibTeX RDF
18	Vinay Saripalli, Asit K. Mishra, Suman Datta, Vijaykrishnan Narayanan	An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores.	DAC	2011	DBLP DOI BibTeX RDF
18	Deng Zhou, Ye Tian, Hong Shen	Dynamic Thread Partition Algorithm Based on Sharing Data on CMP.	PDCAT	2011	DBLP DOI BibTeX RDF
18	Betül Demiröz	Application mapping and optimization for CMP based architectures (Yongada çoklu-işlemcili mimariler için uygulama haritalaması ve eniyileme)		2011	RDF
18	Felipe Cabarcas	Castell: a heterogeneous cmp architecture scalable to hundreds of processors.		2011	RDF
18	Hyungjun Kim, Paul V. Gratz	Leveraging Unused Cache Block Words to Reduce Power in CMP Interconnect.	IEEE Comput. Archit. Lett.	2010	DBLP DOI BibTeX RDF
18	Songliu Guo, Hai-Xia Wang 0001, Yibo Xue, Chong-Min Li, Dong-Sheng Wang 0002	Hierarchical Cache Directory for CMP.	J. Comput. Sci. Technol.	2010	DBLP DOI BibTeX RDF
18	Yin Shen, Qiang Zhou 0001, Yici Cai, Xianlong Hong	ECP- and CMP-Aware Detailed Routing Algorithm for DFM.	IEEE Trans. Very Large Scale Integr. Syst.	2010	DBLP DOI BibTeX RDF
18	Xiongli Gu, Peng Liu 0016, Zhiyuan Xu, Bingjie Xia, Cheng Li, Qingdong Yao, Ce Shi	A synergetic operating unit on NoC layer for CMP system.	Int. J. High Perform. Syst. Archit.	2010	DBLP DOI BibTeX RDF
18	Ramesh Illikkal, Vineet Chadha, Andrew Herdrich, Ravi R. Iyer 0001, Donald Newell	PIRATE: QoS and performance management in CMP architectures.	SIGMETRICS Perform. Evaluation Rev.	2010	DBLP DOI BibTeX RDF
18	Harold Ishebabi, Christophe Bobda	Heuristics for Flexible CMP Synthesis.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF	chip multiprocessor systems, parallel programs, Reconfigurable computing
18	Yi-Neng Lin, Ying-Dar Lin, Yuan-Cheng Lai	Thread allocation in CMP-based multithreaded network processors.	Parallel Comput.	2010	DBLP DOI BibTeX RDF
18	Martti Forsell	On the Performance and Cost of Some PRAM Models on CMP Hardware.	Int. J. Found. Comput. Sci.	2010	DBLP DOI BibTeX RDF
18	Shantanu Gupta, Amin Ansari, Shuguang Feng, Scott A. Mahlke	StageWeb: Interweaving pipeline stages into a wearout and variation tolerant CMP fabric.	DSN	2010	DBLP DOI BibTeX RDF
18	Augusto Vega, Alejandro Rico, Felipe Cabarcas, Alex Ramírez, Mateo Valero	Comparing last-level cache designs for CMP architectures.	IFMT	2010	DBLP DOI BibTeX RDF
18	Padmaraj Singh, David L. Landis	Test Generation for CMP Designs.	MTV	2010	DBLP DOI BibTeX RDF
18	Chengmo Yang, Chun Jason Xue, Alex Orailoglu	Fine-grained adaptive CMP cache sharing through access history exploitation.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
18	Antoni Roca 0001, José Flich, Federico Silla, José Duato	A Latency-Efficient Router Architecture for CMP Systems.	DSD	2010	DBLP DOI BibTeX RDF
18	Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas, Giovanna Monni	Re-NUCA: Boosting CMP Performance Through Block Replication.	DSD	2010	DBLP DOI BibTeX RDF
18	Grzegorz Deptuch	3DIC multi-project fabrication run being organized by CMC/CMP/MOSIS and Tezzaron.	3DIC	2010	DBLP DOI BibTeX RDF
18	Dimitris Kaseridis, Jeffrey Stuecheli, Jian Chen 0030, Lizy Kurian John	A bandwidth-aware memory-subsystem resource management using non-invasive resource profilers for large CMP systems.	HPCA	2010	DBLP DOI BibTeX RDF
18	Xiaowei Jiang, Niti Madan, Li Zhao 0002, Mike Upton, Ravishankar R. Iyer 0001, Srihari Makineni, Donald Newell, Yan Solihin, Rajeev Balasubramonian	CHOP: Adaptive filter-based DRAM caching for CMP server platforms.	HPCA	2010	DBLP DOI BibTeX RDF
18	Chao Wang 0058, Bin Xie 0002, Jiexiang Kang, Tianzhou Chen, Wei Hu 0001, Zhenwei Zheng	On-Chip Operating System Design for NoC-Based CMP.	CIT	2010	DBLP DOI BibTeX RDF	operating system, network on chip, chip multiprocessor
18	Duan Wei, Fan Qi Fei, Huang Kun, Zhang Ge	VB-DVFS: A new algorithm for power efficiency of CMP with GALS.	ICECS	2010	DBLP DOI BibTeX RDF
18	Hui-Dong Zhu, Ye Li	Constant Distance Prefetching for Linked Data Structure Based on CMP.	FCST	2010	DBLP DOI BibTeX RDF	Linked data structure, multi-core and multi-threading, data prefetching, cache misses, memory wall
18	Chongmin Li, Haixia Wang 0001, Yibo Xue, Xi Zhang 0008, Dongsheng Wang 0002	Fast Hierarchical Cache Directory: A Scalable Cache Organization for Large-Scale CMP.	NAS	2010	DBLP DOI BibTeX RDF	Hierarchical cache directory, Multi-level directory, Chip multiprocessors
18	Tingwen Liu, Yong Sun, Li Guo 0001	Fast and Memory-Efficient Traffic Classification with Deep Packet Inspection in CMP Architecture.	NAS	2010	DBLP DOI BibTeX RDF
18	Chi Zhang, Xin Yuan 0001, Ashok Srinivasan	Processor affinity and MPI performance on SMP-CMP clusters.	IPDPS Workshops	2010	DBLP DOI BibTeX RDF
18	Dongyuan Zhan, Hong Jiang 0001, Sharad C. Seth	Exploiting set-level non-uniformity of capacity demand to enhance CMP cooperative caching.	IPDPS	2010	DBLP DOI BibTeX RDF
18	Gaurav Dhiman, Vasileios Kontorinis, Dean M. Tullsen, Tajana Rosing, Eric Saxe, Jonathan Chew	Dynamic workload characterization for power efficient scheduling on CMP systems.	ISLPED	2010	DBLP DOI BibTeX RDF	power, multi-cores, workload characterization
18	Yunlian Jiang, Eddy Z. Zhang, Xipeng Shen, Yaoqing Gao, Roch Archambault	Array Regrouping on CMP with Non-uniform Cache Sharing.	LCPC	2010	DBLP DOI BibTeX RDF
18	Shuai Che, Jeremy W. Sheaffer, Michael Boyer, Lukasz G. Szafaryn, Liang Wang 0055, Kevin Skadron	A characterization of the Rodinia benchmark suite with comparison to contemporary CMP workloads.	IISWC	2010	DBLP DOI BibTeX RDF
18	Marek Tudruj, Lukasz Masko	A globally-interconnected modular CMP system with communication on the fly.	SoCC	2010	DBLP DOI BibTeX RDF
18	Tianzhou Chen, Jianliang Ma, Hui Yuan, Jingwei Liu, Guanjun Jiang	Function Units Sharing between Neighbor Cores in CMP.	ICA3PP (1)	2010	DBLP DOI BibTeX RDF
18	Izumi Nitta, Yuji Kanazawa, Daisuke Fukuda, Toshiyuki Shibuya, Naoki Idani, Masaru Ito, Osamu Yamasaki, Norihiro Harada, Takanori Hiramoto	"Condition-based" dummy fill insertion method based on ECP and CMP predictive models.	ISQED	2010	DBLP DOI BibTeX RDF
18	Yaniv Ben-Itzhak, Israel Cidon, Avinoam Kolodny	Performance and Power Aware CMP Thread Allocation Modeling.	HiPEAC	2010	DBLP DOI BibTeX RDF
18	Miquel Moretó	Improving cache Behavior in CMP architectures throug cache partitioning techniques.		2010	RDF
18	Omid Azizi, Aqeel Mahesri, Sanjay J. Patel, Mark Horowitz	Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design.	SIGARCH Comput. Archit. News	2009	DBLP DOI BibTeX RDF
18	Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero	CPU Accounting in CMP Processors.	IEEE Comput. Archit. Lett.	2009	DBLP DOI BibTeX RDF
18	Xuan Feng, Motoyuki Sato, Yan Zhang, Cai Liu, Fusheng Shi, Yonghui Zhao	CMP Antenna Array GPR and Signal-to-Clutter Ratio Improvement.	IEEE Geosci. Remote. Sens. Lett.	2009	DBLP DOI BibTeX RDF
18	Xudong Shi 0003, Feiqi Su, Jih-Kwon Peir, Ye Xia 0001, Zhen Yang	Modeling and Stack Simulation of CMP Cache Capacity and Accessibility.	IEEE Trans. Parallel Distributed Syst.	2009	DBLP DOI BibTeX RDF
18	Xingfu Wu, Valerie E. Taylor, Charles W. Lively, Sameh Sharkawi	Performance Analysis and Optimization of Parallel Scientific Applications on CMP Clusters.	Scalable Comput. Pract. Exp.	2009	DBLP BibTeX RDF
18	Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Rizos Sakellariou, Mateo Valero	FlexDCP: a QoS framework for CMP architectures.	ACM SIGOPS Oper. Syst. Rev.	2009	DBLP DOI BibTeX RDF
18	Eryk Laskowski, Lukasz Masko, Marek Tudruj, Miroslaw Thor	Program Execution Control in a Multi CMP Module System with a Look-Ahead Configured Global Network.	ISPDC	2009	DBLP DOI BibTeX RDF
18	Rim Djedidi, Marie-Aude Aufaure	Change Management Patterns (CMP) for Ontology Evolution Process.	IWOD@ISWC	2009	DBLP BibTeX RDF
18	Naoto Fukumoto, Kenichi Imazato, Koji Inoue, Kazuaki J. Murakami	Performance balancing: software-based on-chip memory management for effective CMP executions.	MEDEA@PACT	2009	DBLP DOI BibTeX RDF
18	Tingwen Liu, Yong Sun, Zhibin Zhang, Li Guo 0001	Load Balancing for Flow-Based Parallel Processing Systems in CMP Architecture.	GLOBECOM	2009	DBLP DOI BibTeX RDF
18	Long Zheng 0001, Mianxiong Dong, Hai Jin 0001, Minyi Guo, Li Li 0012	An Improved Approach to Tag Reduction on Low Power CMP with Trade-Off of Energy and Performance.	FCST	2009	DBLP DOI BibTeX RDF
18	Huandong Wang, Dan Tang, Xiang Gao, Yunji Chen	An Enhanced HyperTransport Controller with Cache Coherence Support for Multiple-CMP.	NAS	2009	DBLP DOI BibTeX RDF
18	Daniel Sánchez 0004, Juan L. Aragón, José M. García 0001	Extending SRT for parallel applications in tiled-CMP architectures.	IPDPS	2009	DBLP DOI BibTeX RDF
18	Jacob Machina, Angela C. Sodan	Predicting cache needs and cache sensitivity for applications in cloud computing on CMP servers with configurable caches.	IPDPS	2009	DBLP DOI BibTeX RDF
18	Lei Miao 0002, Yong Qi, Di Hou, Chang-li Wu, Yue-hua Dai	Energy Saving Task Scheduling for Heterogeneous CMP System Based on Multi-objective Fuzzy Genetic Algorithm.	SMC	2009	DBLP DOI BibTeX RDF
18	Fei Cao, Zhiyong Liu	Snooping and Ordering Ring - An Efficient Cache Coherence Protocol for Ring Connected CMP.	ICPADS	2009	DBLP DOI BibTeX RDF
18	Licheng Xue, Feng Shi	Low Overhead Object Communication Scheme in CMP Implementation of Object-Oriented Programming.	ICPADS	2009	DBLP DOI BibTeX RDF
18	Zhaoyu Dong, Yinliang Zhao, Yuanke Wei, Xuhao Wang, Shaolong Song	Prophet: A Speculative Multi-threading Execution Model with Architectural Support Based on CMP.	ScalCom-EmbeddedCom	2009	DBLP DOI BibTeX RDF
18	Guanjun Jiang, Du Chen, Binbin Wu, Yi Zhao, Tianzhou Chen, Jingwei Liu	CMP Thread Assignment Based on Group Sharing L2 Cache.	ScalCom-EmbeddedCom	2009	DBLP DOI BibTeX RDF
18	Xingfu Wu, Benchun Duan, Valerie E. Taylor	An OpenMP Approach to Modeling Dynamic Earthquake Rupture Along Geometrically Complex Faults on CMP Systems.	ICPP Workshops	2009	DBLP DOI BibTeX RDF
18	Eryk Laskowski, Lukasz Masko, Marek Tudruj	Multi-CMP Module System Based on a Look-Ahead Configured Global Network.	PPAM (1)	2009	DBLP DOI BibTeX RDF
18	Ivan Jibaja, Kelly A. Shaw 0001	Understanding the applicability of CMP performance optimizations on data mining applications.	IISWC	2009	DBLP DOI BibTeX RDF
18	Wan-Yu Lee, Iris Hui-Ru Jiang	VIFI-CMP: variability-tolerant chip-multiprocessors for throughput and power.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	chip-multiprocessor, process variation, monte carlo analysis
18	Pierfrancesco Foglia, Francesco Panicucci, Cosimo Antonio Prete, Marco Solinas	Analysis of Performance Dependencies in NUCA-Based CMP Systems.	SBAC-PAD	2009	DBLP DOI BibTeX RDF
18	Song Hao, Zhihui Du, David A. Bader, Yin Ye	A Partition-Merge Based Cache-Conscious Parallel Sorting Algorithm for CMP with Shared Cache.	ICPP	2009	DBLP DOI BibTeX RDF
18	Marek Tudruj, Lukasz Masko, Miroslaw Thor	Globally-Interconnected Modular CMP Systems with Communication on the Fly.	PDPTA	2009	DBLP BibTeX RDF
18	Zhimin Gu, Ninghan Zheng, Yi Zhang, Changding Liu, Jie Tang 0003, Yan Huang 0011	The Stable Conditions of a Task-Pair with Helper-Thread in CMP.	PDPTA	2009	DBLP BibTeX RDF
18	Muhammad Mukaram Khan	Configuring a Massively Parallel CMP system for Real-Time Neural Applications.		2009	RDF
18	Marco Solinas	Cache Architectures for Wire-Delay Dominated CMP Systems.		2009	RDF
18	Andrew B. Kahng, Kambiz Samadi	CMP Fill Synthesis.	Handbook of Algorithms for Physical Design Automation	2008	DBLP DOI BibTeX RDF
18	Padma Apparao, Ravi R. Iyer 0001, Don Newell	Towards modeling & analysis of consolidated CMP servers.	SIGARCH Comput. Archit. News	2008	DBLP DOI BibTeX RDF
18	Isask'har Walter, Israel Cidon, Avinoam Kolodny	BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP.	IEEE Comput. Archit. Lett.	2008	DBLP DOI BibTeX RDF
18	Konstantinos Tatas, Costas Kyriacou, Paraskevas Evripidou, Pedro Trancoso, Stephan Wong	Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d2-CMP) Using FPGAs.	Parallel Process. Lett.	2008	DBLP DOI BibTeX RDF
18	Jonathan A. Winter, David H. Albonesi	Scheduling algorithms for unpredictably heterogeneous CMP architectures.	DSN	2008	DBLP DOI BibTeX RDF
18	Ricardo Fernández Pascual, José M. García 0001, Manuel E. Acacio, José Duato	A fault-tolerant directory-based cache coherence protocol for CMP architectures.	DSN	2008	DBLP DOI BibTeX RDF
18	M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyue Liu, Mishali Naik, Jagannath Premkumar, Glenn Reinman, Eran Socher, Sai-Wang Tam	Power reduction of CMP communication networks via RF-interconnects.	MICRO	2008	DBLP DOI BibTeX RDF
18	M. Frank Chang, Jason Cong, Adam Kaplan, Mishali Naik, Glenn Reinman, Eran Socher, Sai-Wang Tam	CMP network-on-chip overlaid with multi-band RF-interconnect.	HPCA	2008	DBLP DOI BibTeX RDF
18	Yunlian Jiang, Xipeng Shen	Exploration of the Influence of Program Inputs on CMP Co-scheduling.	Euro-Par	2008	DBLP DOI BibTeX RDF
18	Alberto Ros 0001, Manuel E. Acacio, José M. García 0001	Scalable Directory Organization for Tiled CMP Architectures.	CDES	2008	DBLP BibTeX RDF
18	Martti Forsell	On the performance and cost of some PRAM models on CMP hardware.	IPDPS	2008	DBLP DOI BibTeX RDF
18	Lei Miao 0002, Yong Qi, Di Hou, Yue-hua Dai, Yi Shi	A multi-objective hybrid genetic algorithm for energy saving task scheduling in CMP system.	SMC	2008	DBLP DOI BibTeX RDF
18	Xingfu Wu, Valerie E. Taylor, Charles W. Lively, Sameh Sharkawi	Performance Analysis and Optimization of Parallel Scientific Applications on CMP Cluster Systems.	ICPP Workshops	2008	DBLP DOI BibTeX RDF
18	Hao Zhang, Yuanqiang Tan, Mingjun Li	A Numerical Simulation of Motion of Particles under the Wafer in CMP.	CSSE (3)	2008	DBLP DOI BibTeX RDF
18	Dimitris Lioupis, Andreas Adamidis, Nikolaos Theoharis	Simulating SiScape: A Parallel CMP Architecture.	AHS	2008	DBLP DOI BibTeX RDF
18	Martti Forsell, Jussi Roivainen	Performance, Area and Power Trade-Offs in Mesh-based Emulated Shared Memory CMP Architectures.	PDPTA	2008	DBLP BibTeX RDF
18	Qing Cheng Li, Liu Yang, Zheng Xuan Bai, Hai Jun Hu	Research and Implementation of Screen Printing System Based on Hybrid CMP.	ISCSCT (2)	2008	DBLP DOI BibTeX RDF
18	Changdao Dong, Qiang Zhou 0001, Yici Cai, Xianlong Hong	Wire density driven top-down global placement for CMP variation control.	APCCAS	2008	DBLP DOI BibTeX RDF
18	Xudong Shi 0003, Feiqi Su, Jih-Kwon Peir, Ye Xia 0001, Zhen Yang	CMP cache performance projection: accessibility vs. capacity.	SIGARCH Comput. Archit. News	2007	DBLP DOI BibTeX RDF
18	Fei Guo, Hari Kannan, Li Zhao 0002, Ramesh Illikkal, Ravi R. Iyer 0001, Don Newell, Yan Solihin, Christos Kozyrakis	From chaos to QoS: case studies in CMP resource management.	SIGARCH Comput. Archit. News	2007	DBLP DOI BibTeX RDF
18	Seong-Hee Park, Seong-Hee Lee, Il-Soon Jang, Sangsung Choi, Je-Hoon Lee, Younggap You	Isochronous Data Transfer between AV Devices Using Pseudo CMP Protocol in IEEE 1394 over UWB Network.	IEICE Trans. Commun.	2007	DBLP DOI BibTeX RDF
18	Ravi R. Iyer 0001, Dean M. Tullsen	Editorial: Special Section on CMP Architectures.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF
18	Jaehyuk Huh 0001, Changkyu Kim, Hazim Shafi, Lixin Zhang 0002, Doug Burger, Stephen W. Keckler	A NUCA Substrate for Flexible CMP Cache Sharing.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	Multiprocessor systems, cache memories, adaptable architectures
18	Li Zhao 0002, Ravi R. Iyer 0001, Ramesh Illikkal, Jaideep Moses, Srihari Makineni, Donald Newell	CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms.	PACT	2007	DBLP DOI BibTeX RDF
18	Amin M. El-Kustaban, Ahmed H. El-Mahdy, Ossama M. Ismail	A CMP with Transactional Memory: Design and Implementation Using FPGA Technology.	IMECS	2007	DBLP BibTeX RDF
18	Hongmei Liao, Li Song, Nickhil Jakatdar, Riko Radojcic	Integration of CMP Modeling in RC Extraction and Timing Flow.	CICC	2007	DBLP DOI BibTeX RDF
18	Kumar Shiv, Ravi R. Iyer 0001, Mahesh Bhat, Ramesh Illikkal, Michael Jones, Srihari Makineni, Jason Domer, Donald Newell	Addressing Cache/Memory Overheads in Enterprise Java CMP Servers.	IISWC	2007	DBLP DOI BibTeX RDF
18	Robert F. Molyneaux, Thomas A. Ziaja, Hong Kim, Shahryar Aryani, Sungbae Hwang, Alex Hsieh	Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip.	ITC	2007	DBLP DOI BibTeX RDF