Search results for "DEBUG"

Hits ?▲	Authors	Title	Venue	Year	Link
16	Jerry Backer, David Hély, Ramesh Karri	Secure design-for-debug for Systems-on-Chip.	ITC	2015	DBLP DOI BibTeX RDF
16	David Lin, Eshan Singh, Clark W. Barrett, Subhasish Mitra	A structured approach to post-silicon validation and debug using symbolic quick error detection.	ITC	2015	DBLP DOI BibTeX RDF
16	Zdravko Panjkov, Andreas Wasserbauer, Timm Ostermann, Richard Hagelauer	Automatic debug circuit for FPGA rapid prototyping.	SISY	2015	DBLP DOI BibTeX RDF
16	Nishit Gupta, Sunil Alag	Unified approach for Performance Evaluation and Debug of System on Chip at early design phase.	IC3	2015	DBLP DOI BibTeX RDF
16	Prabhat Mishra 0001, Swarup Bhunia, Srivaths Ravi 0001	Tutorial T2: Validation and Debug of Security and Trust Issues in Embedded Systems.	VLSID	2015	DBLP DOI BibTeX RDF
16	Baris Kasikci, Cristiano Pereira, Gilles Pokam, Benjamin Schubert, Madanlal Musuvathi, George Candea	Failure Sketches: A Better Way to Debug.	HotOS	2015	DBLP BibTeX RDF
16	Jinyong Lee, Ingoo Heo, Yongje Lee, Yunheung Paek	Efficient dynamic information flow tracking on a processor with core debug interface.	DAC	2015	DBLP DOI BibTeX RDF
16	Keith A. Campbell, David Lin, Subhasish Mitra, Deming Chen	Hybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles.	DAC	2015	DBLP DOI BibTeX RDF
16	Vladimir Todorov	On application-specific network-on-chip synthesis and on-chip trace and debug.		2015	RDF
16	Ethan Blanton, Demian Lessa, Puneet Arora, Lukasz Ziarek, Bharat Jayaraman	JI.FI: Visual test and debug queries for hard real-time.	Concurr. Comput. Pract. Exp.	2014	DBLP DOI BibTeX RDF
16	Esther Guerra, Juan de Lara	Colouring: execution, debug and analysis of QVT-relations transformations through coloured Petri nets.	Softw. Syst. Model.	2014	DBLP DOI BibTeX RDF
16	Eddie Hung, Steven J. E. Wilton	Incremental Trace-Buffer Insertion for FPGA Debug.	IEEE Trans. Very Large Scale Integr. Syst.	2014	DBLP DOI BibTeX RDF
16	Martin Monperrus, Anthony Maia, Romain Rouvoy, Lionel Seinturier	Debugging with the Crowd: A Debug Recommendation System Based on StackOverflow.	ERCIM News	2014	DBLP BibTeX RDF
16	Min Li, Azadeh Davoodi	A Hybrid Approach for Fast and Accurate Trace Signal Selection for Post-Silicon Debug.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2014	DBLP DOI BibTeX RDF
16	Rawan Abdel-Khalek, Valeria Bertacco	Post-silicon platform for the functional diagnosis and debug of networks-on-chip.	ACM Trans. Embed. Comput. Syst.	2014	DBLP DOI BibTeX RDF
16	Eddie Hung, Steven J. E. Wilton	Accelerating FPGA debug: Increasing visibility using a runtime reconfigurable observation and triggering network.	ACM Trans. Design Autom. Electr. Syst.	2014	DBLP DOI BibTeX RDF
16	Saeed Parsa, Mojtaba Vahidi-Asl, Maryam Asadi-Aghbolaghi	Hierarchy-Debug: a scalable statistical technique for fault localization.	Softw. Qual. J.	2014	DBLP DOI BibTeX RDF
16	Rawan Abdel-Khalek, Valeria Bertacco	DiAMOND: Distributed alteration of messages for on-chip network debug.	NOCS	2014	DBLP DOI BibTeX RDF
16	Zonglin Guo, Ram Bhakta, Ian G. Harris	Control-flow checking for intrusion detection via a real-time debug interface.	SMARTCOMP Workshops	2014	DBLP DOI BibTeX RDF
16	Mehdi Dehbashi, Görschwin Fey	Transaction-Based Online Debug for NoC-Based Multiprocessor SoCs.	PDP	2014	DBLP DOI BibTeX RDF
16	Daniel Hansson	Continuous Linting with Automatic Debug.	MTV	2014	DBLP DOI BibTeX RDF
16	Mrugesh Walimbe	JTAG-AXI Debug IP with Performance Meter Mode.	MTV	2014	DBLP DOI BibTeX RDF
16	Prateek Thakyal, Prabhat Mishra 0001	Layout-Aware Selection of Trace Signals for Post-Silicon Debug.	ISVLSI	2014	DBLP DOI BibTeX RDF
16	Chia-Yi Lee, Tai-Hung Li, Tai-Chen Chen	Design-for-debug routing for FIB probing.	DATE	2014	DBLP DOI BibTeX RDF
16	Oshri Adler, Eli Arbel, Ilia Averbouch, Ilan Beer, Inna Grijnevitch	Facilitating timing debug by logic path correspondence.	DATE	2014	DBLP DOI BibTeX RDF
16	Min Li, Azadeh Davoodi	Multi-mode trace signal selection for post-silicon debug.	ASP-DAC	2014	DBLP DOI BibTeX RDF
16	David Lin, Subhasish Mitra	QED post-silicon validation and debug: Frequently asked questions.	ASP-DAC	2014	DBLP DOI BibTeX RDF
16	Yun Cheng, Huawei Li 0001, Xiaowei Li 0001	An On-Line Timing Error Detection Method for Silicon Debug.	ATS	2014	DBLP DOI BibTeX RDF
16	Jeffrey B. Goeders, Steven J. E. Wilton	Effective FPGA debug for high-level synthesis generated circuits.	FPL	2014	DBLP DOI BibTeX RDF
16	Fatemeh Eslami, Steven J. E. Wilton	Incremental distributed trigger insertion for efficient FPGA debug.	FPL	2014	DBLP DOI BibTeX RDF
16	Joshua S. Monson, Brad L. Hutchings	New approaches for in-system debug of behaviorally-synthesized FPGA circuits.	FPL	2014	DBLP DOI BibTeX RDF
16	Eddie Hung, Jeffrey B. Goeders, Steven J. E. Wilton	Faster FPGA Debug: Efficiently Coupling Trace Instruments with User Circuitry.	ARC	2014	DBLP DOI BibTeX RDF
16	Kuo-Kai Hsieh, Wen Chen 0016, Li-C. Wang, Jayanta Bhadra	On application of data mining in functional debug.	ICCAD	2014	DBLP DOI BibTeX RDF
16	Yunyun Jiang, Yi Yang 0033, Tian Xiao, Tianwei Sheng, Wenguang Chen	Kernel data race detection using debug register in Linux.	COOL Chips	2014	DBLP DOI BibTeX RDF
16	M. De Carvalho, Davide Sabena, Matteo Sonza Reorda, Luca Sterpone, Paolo Rech, Luigi Carro	Fault injection in GPGPU cores to validate and debug robust parallel applications.	IOLTS	2014	DBLP DOI BibTeX RDF
16	Vasant Easwaran, Virendra Bansal, Greg Shurtz, Rahul Gulati, Mihir N. Mody, Prashant Karandikar, Prithvi Shankar	A unique non-intrusive approach to non-ATE Based cul-de-sac SoC debug.	SoCC	2014	DBLP DOI BibTeX RDF
16	Chandru Mirchandani	Cloud Computing as a Debug Tool.	Complex Adaptive Systems	2014	DBLP DOI BibTeX RDF
16	Sabyasachi Deyati, Barry John Muldrey, Aritra Banerjee, Abhijit Chatterjee	Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits.	VTS	2014	DBLP DOI BibTeX RDF
16	Alexander Elyasov, Wishnu Prasetya, Jurriaan Hage, Andreas Nikas	Reduce first, debug later.	AST	2014	DBLP DOI BibTeX RDF
16	Bruce Querbach, Rahul Khanna, David Blankenbeckler, Yulan Zhang, Ronald T. Anderson, David G. Ellis, Zale T. Schoenborn, Sabyasachi Deyati, Patrick Chiang 0001	A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time.	ITC	2014	DBLP DOI BibTeX RDF
16	Sergej Deutsch, Krishnendu Chakrabarty	Massive signal tracing using on-chip DRAM for in-system silicon debug.	ITC	2014	DBLP DOI BibTeX RDF
16	David Lin, Subhasish Mitra	QED post-silicon validation and debug: Invited abstract.	ISIC	2014	DBLP DOI BibTeX RDF
16	Mehdi Dehbashi, Görschwin Fey	Debug Automation for Synchronization Bugs at RTL.	VLSID	2014	DBLP DOI BibTeX RDF
16	Padraig Fogarty, Ciaran MacNamee, Donal Heffernan	On-chip support for software verification and debug in multi-core embedded systems.	IET Softw.	2013	DBLP DOI BibTeX RDF
16	Domenico Cotroneo, Roberto Pietrantuono, Stefano Russo 0001	Combining Operational and Debug Testing for Improving Reliability.	IEEE Trans. Reliab.	2013	DBLP DOI BibTeX RDF
16	Joon-Sung Yang, Nur A. Touba	Improved Trace Buffer Observation via Selective Data Capture Using 2-D Compaction for Post-Silicon Debug.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
16	Eddie Hung, Steven J. E. Wilton	Scalable Signal Selection for Post-Silicon Debug.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
16	Jaan Raik, Urmas Repinski, Anton Chepurov, Hanno Hantson, Raimund Ubar, Maksim Jenihhin	Automated design error debug using high-level decision diagrams and mutation operators.	Microprocess. Microsystems	2013	DBLP DOI BibTeX RDF
16	Joseph Lawrance, Christopher Bogart, Margaret M. Burnett, Rachel K. E. Bellamy, Kyle Rector, Scott D. Fleming	How Programmers Debug, Revisited: An Information Foraging Theory Perspective.	IEEE Trans. Software Eng.	2013	DBLP DOI BibTeX RDF
16	Jooyong Yi	A Case for Dynamic Reverse-code Generation to Debug Non-deterministic Programs.	Festschrift for Dave Schmidt	2013	DBLP DOI BibTeX RDF
16	Mehdi Dehbashi, Görschwin Fey	Debug Automation for Logic Circuits Under Timing Variations.	IEEE Des. Test	2013	DBLP DOI BibTeX RDF
16	Arie Margulis, David Akselrod, Eric Rentschler, Mike Ricchetti	Evolution of Graphics Northbridge Test and Debug Architectures Across Four Generations of AMD ASICs.	IEEE Des. Test	2013	DBLP DOI BibTeX RDF
16	Erika Check Hayden	Mozilla plan seeks to debug scientific code.	Nat.	2013	DBLP DOI BibTeX RDF
16	Kanad Basu, Prabhat Mishra 0001, Priyadarsan Patra, Amir Nahir, Allon Adir	Dynamic Selection of Trace Signals for Post-Silicon Debug.	MTV	2013	DBLP DOI BibTeX RDF
16	Daniel Hansson, Heli Uronen-Hansson	Measuring the Gain of Automatic Debug.	MTV	2013	DBLP DOI BibTeX RDF
16	Jannis Stoppe, Robert Wille, Rolf Drechsler	Data extraction from SystemC designs using debug symbols and the SystemC API.	ISVLSI	2013	DBLP DOI BibTeX RDF
16	Min Li, Azadeh Davoodi	A hybrid approach for fast and accurate trace signal selection for post-silicon debug.	DATE	2013	DBLP DOI BibTeX RDF
16	Toyoshiro Nakashima, Kazunori Iwata 0001, Yoshiyuki Anan, Naohiro Ishii	Analyzing relationship between the number of errors in review and debug processes for embedded software development projects.	ICIS	2013	DBLP DOI BibTeX RDF
16	Eitan Farchi, Itai Segall, Rachel Tzoref-Brill	Using Projections to Debug Large Combinatorial Models.	ICST Workshops	2013	DBLP DOI BibTeX RDF
16	Catherine Roussey, Ondrej Zamazal	Antipattern detection: how to debug an ontology without a reasoner.	WoDOOM	2013	DBLP BibTeX RDF
16	John Giacobbe	Physical design for debug: insurance policy for IC's.	ISPD	2013	DBLP DOI BibTeX RDF
16	John Burger, Matthew Burdett, Jeffrey Hall	Sipping from the Firehose: How to "Grok" Gigabytes of Trace Debug Data.	CSE	2013	DBLP DOI BibTeX RDF
16	Mike Peng Li, Takahiro J. Yamaguchi	Electrical and photonic I/O test and debug.	CICC	2013	DBLP DOI BibTeX RDF
16	Eddie Hung, Al-Shahna Jamal, Steven J. E. Wilton	Maximum flow algorithms for maximum observability during FPGA debug.	FPT	2013	DBLP DOI BibTeX RDF
16	Eric Hennigan, Christoph Kerschbaumer, Stefan Brunthaler 0001, Per Larsen, Michael Franz	First-Class Labels: Using Information Flow to Debug Security Holes.	TRUST	2013	DBLP DOI BibTeX RDF
16	Christian Boit, Clemens Helfmeier, Uwe Kerst	Security Risks Posed by Modern IC Debug and Diagnosis Tools.	FDTC	2013	DBLP DOI BibTeX RDF
16	Bao Le, Dipanjan Sengupta, Andreas G. Veneris, Zissis Poulos	Accelerating post silicon debug of deep electrical faults.	IOLTS	2013	DBLP DOI BibTeX RDF
16	Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena	Exploiting the debug interface to support on-line test of control flow errors.	IOLTS	2013	DBLP DOI BibTeX RDF
16	Saghir A. Shaikh	Innovative practices session 3C: Harnessing the challenges of testability and debug of high speed I/Os.	VTS	2013	DBLP DOI BibTeX RDF
16	Bill Penner	Multi-processor debug in SoC and processor designs.	VLSI-DAT	2013	DBLP DOI BibTeX RDF
16	Sandeep Kumar Goel, Saman Adham, Min-Jer Wang, Ji-Jan Chen, Tze-Chiang Huang, Ashok Mehta, Frank Lee, Vivek Chickermane, Brion L. Keller, Thomas Valind, Subhasish Mukherjee, Navdeep Sood, Jeongho Cho, Hayden Hyungdong Lee, Jungi Choi, Sangdoo Kim	Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study.	ITC	2013	DBLP DOI BibTeX RDF
16	Dragos Ionescu, Rean Griffith	The wisdom of virtual crowds: mining datacenter telemetry to collaboratively debug performance.	SoCC	2013	DBLP DOI BibTeX RDF
16	Justin Emile Gottschlich, Rob C. Knauerhase, Gilles Pokam	But How Do We Really Debug Transactional Memory Programs?	HotPar	2013	DBLP BibTeX RDF
16	Prabhat Mishra 0001, Masahiro Fujita, Virendra Singh, Nagesh Tamarapalli, Sharad Kumar, Rajesh Mittal	Tutorial T10: Post - Silicon Validation, Debug and Diagnosis.	VLSI Design	2013	DBLP DOI BibTeX RDF
16	Nikos Foutris, Dimitris Gizopoulos, Xavier Vera, Antonio González 0001	Deconfigurable microprocessor architectures for silicon debug acceleration.	ISCA	2013	DBLP DOI BibTeX RDF
16	Mehdi Dehbashi	Debug automation from pre-silicon to post-silicon.		2013	RDF
16	Emilio Serrano, Andrés Muñoz 0001, Juan A. Botía	An approach to debug interactions in multi-agent system software tests.	Inf. Sci.	2012	DBLP DOI BibTeX RDF
16	Yu-Shen Yang, Andreas G. Veneris, Nicola Nicolici	Automating Data Analysis and Acquisition Setup in a Silicon Debug Environment.	IEEE Trans. Very Large Scale Integr. Syst.	2012	DBLP DOI BibTeX RDF
16	Marcel Gort, Flavio M. de Paula, Johnny J. W. Kuan, Tor M. Aamodt, Alan J. Hu, Steven J. E. Wilton, Jin Yang 0006	Formal-Analysis-Based Trace Computation for Post-Silicon Debug.	IEEE Trans. Very Large Scale Integr. Syst.	2012	DBLP DOI BibTeX RDF
16	Aaron Spear, Markus Levy, Mathieu Desnoyers	Using Tracing to Solve the Multicore System Debug Problem.	Computer	2012	DBLP DOI BibTeX RDF
16	Marta Portela-García, Michelangelo Grosso, M. Gallardo-Campos, Matteo Sonza Reorda, Luis Entrena, Mario García-Valderas, Celia López-Ongil	On the use of embedded debug features for permanent and transient fault resilience in microprocessors.	Microprocess. Microsystems	2012	DBLP DOI BibTeX RDF
16	Joon-Sung Yang, Nur A. Touba	Efficient Trace Signal Selection for Silicon Debug by Error Transmission Analysis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2012	DBLP DOI BibTeX RDF
16	Tsung-Yen Tsai, Sadok Aouini, Gordon W. Roberts	High Speed On-Chip Signal Generation for Debug and Diagnosis.	J. Electron. Test.	2012	DBLP DOI BibTeX RDF
16	Mohammad Hossein Neishaburi, Zeljko Zilic	An infrastructure for debug using clusters of assertion-checkers.	Microelectron. Reliab.	2012	DBLP DOI BibTeX RDF
16	Jing Zeng, Ruifeng Guo, Wu-Tung Cheng, Michael Mateja, Jing Wang	Scan-Based Speed-Path Debug for a Microprocessor.	IEEE Des. Test Comput.	2012	DBLP DOI BibTeX RDF
16	Flavio M. de Paula, Alan J. Hu, Amir Nahir	nuTAB-BackSpace: Rewriting to Normalize Non-determinism in Post-silicon Debug Traces.	CAV	2012	DBLP DOI BibTeX RDF
16	Johnny J. W. Kuan, Tor M. Aamodt	Progressive-BackSpace: Efficient Predecessor Computation for Post-Silicon Debug.	MTV	2012	DBLP DOI BibTeX RDF
16	Tomasz Boleslaw Cedro, Marcin Kuzia, Antoni Grzanka	LibSWD - Serial Wire Debug Open Framework for Low - Level Embedded Systems Access .	FedCSIS	2012	DBLP BibTeX RDF
16	Zissis Poulos, Yu-Shen Yang, Jason Helge Anderson, Andreas G. Veneris, Bao Le	Leveraging reconfigurability to raise productivity in FPGA functional debug.	DATE	2012	DBLP DOI BibTeX RDF
16	Xiaoquan Wu, Jun Wei, Xu Wang	Debug Concurrent Programs with Visualization and Inference of Event Structure.	APSEC	2012	DBLP DOI BibTeX RDF
16	Yu-Shen Yang, Andreas G. Veneris, Nicola Nicolici, Masahiro Fujita	Automated data analysis techniques for a modern silicon debug environment.	ASP-DAC	2012	DBLP DOI BibTeX RDF
16	Bijan Alizadeh	A formal approach to debug polynomial datapath designs.	ASP-DAC	2012	DBLP DOI BibTeX RDF
16	Eddie Hung, Steven J. E. Wilton	Limitations of incremental signal-tracing for FPGA debug.	FPL	2012	DBLP DOI BibTeX RDF
16	Thiago Pinheiro de Araújo, Carla Wanderley, Arndt von Staa	An Introspection Mechanism to Debug Distributed Systems.	SBES	2012	DBLP DOI BibTeX RDF
16	Vladimir Todorov, Alberto Ghiribaldi, Helmut Reinig, Davide Bertozzi, Ulf Schlichtmann	Non-intrusive trace & debug noc architecture with accurate timestamping for GALS SoCs.	CODES+ISSS	2012	DBLP DOI BibTeX RDF
16	Rawan Abdel-Khalek, Valeria Bertacco	Functional post-silicon diagnosis and debug for networks-on-chip.	ICCAD	2012	DBLP DOI BibTeX RDF
16	Somnath Banerjee 0003, Tushar Gupta	Fast and scalable hybrid functional verification and debug with dynamically reconfigurable co-simulation.	ICCAD	2012	DBLP DOI BibTeX RDF
16	Ethan Blanton, Demian Lessa, Lukasz Ziarek, Bharat Jayaraman	Ji.Fi: visual test and debug queries for hard real-time.	JTRES	2012	DBLP DOI BibTeX RDF
16	Mike Li, Manoj Sachdev	Power delivery: Droop, jitter, test and debug story (Tutorial).	CICC	2012	DBLP DOI BibTeX RDF
16	Derrell Lipman	LIBERATED: A Fully In-Browser Client and Server Web Application Debug and Test Environment.	WebApps	2012	DBLP BibTeX RDF