Search results for "DFT"

Hits ?▲	Authors	Title	Venue	Year	Link
27	Frank Sill Torres, Pedro Fausto Rodrigues Leite, Rolf Drechsler	Unintrusive aging analysis based on offline learning.	DFT	2017	DBLP DOI BibTeX RDF
27	Taniya Siddiqua, Vilas Sridharan, Steven E. Raasch, Nathan DeBardeleben, Kurt B. Ferreira, Scott Levy, Elisabeth Baseman, Qiang Guan	Lifetime memory reliability data from the field.	DFT	2017	DBLP DOI BibTeX RDF
27	Pai-Shun Ting, John P. Hayes	Eliminating a hidden error source in stochastic circuits.	DFT	2017	DBLP DOI BibTeX RDF
27	R. Cantora, Ernesto Sánchez 0001, Matteo Sonza Reorda, Giovanni Squillero, Emanuele Valea	On the optimization of SBST test program compaction.	DFT	2017	DBLP DOI BibTeX RDF
27	Alexander Schneider 0002, Paul Pop, Jan Madsen	Volume management for fault-tolerant continuous-flow microfluidics.	DFT	2017	DBLP DOI BibTeX RDF
27	Marco Restifo, Paolo Bernardi, Sergio de Luca, Alessandro Sansonetti	On-line software-based self-test for ECC of embedded RAM memories.	DFT	2017	DBLP DOI BibTeX RDF
27	Harshad Dhotre, Stephan Eggersglüß, Mehdi Dehbashi, Ulrike Pfannkuchen, Rolf Drechsler	Machine learning based test pattern analysis for localizing critical power activity areas.	DFT	2017	DBLP DOI BibTeX RDF
27	Mert Atamaner, Oguz Ergin, Marco Ottavi, Pedro Reviriego	Detecting errors in instructions with bloom filters.	DFT	2017	DBLP DOI BibTeX RDF
27	Satyadev Ahlawat, Darshit Vaghani, Virendra Singh	Preventing scan-based side-channel attacks through key masking.	DFT	2017	DBLP DOI BibTeX RDF
27	Vasileios Tenentes, Charles Leech, Graeme M. Bragg, Geoff V. Merrett, Bashir M. Al-Hashimi, Hussam Amrouch, Jörg Henkel, Shidhartha Das	Hardware and software innovations in energy-efficient system-reliability monitoring.	DFT	2017	DBLP DOI BibTeX RDF
27	Kedar Janardan Dhori, Hitesh Chawla, Ashish Kumar, Prashant Pandey, Promod Kumar, Lorenzo Ciampolini, Florian Cacho, Damien Croain	High-yield design of high-density SRAM for low-voltage and low-leakage operations.	DFT	2017	DBLP DOI BibTeX RDF
27	Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi, Shyue-Kung Lu	A defective level monitor of open defects in 3D ICs with a comparator of offset cancellation type.	DFT	2017	DBLP DOI BibTeX RDF
27	Jyothish Soman, Timothy M. Jones 0001	High performance fault tolerance through predictive instruction re-execution.	DFT	2017	DBLP DOI BibTeX RDF
27	Jain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho	Design-for-testability for paper-based digital microfluidic biochips.	DFT	2017	DBLP DOI BibTeX RDF
27	Mihalis Psarakis, Aitzan Sari	A scrubbing scheduling approach for reliable FPGA multicore processors with real-time constraints.	DFT	2017	DBLP DOI BibTeX RDF
27	Rishad A. Shafik, Qiaoyan Yu, S. Saqib Khursheed, Antonio Miele	Welcome Message.	DFT	2017	DBLP DOI BibTeX RDF
27	Lucas Weigel, Fernando Fernandes 0001, Philippe O. A. Navaux, Paolo Rech	Kernel vulnerability factor and efficient hardening for histogram of oriented gradients.	DFT	2017	DBLP DOI BibTeX RDF
27	Sebastian Huhn 0001, Stephan Eggersglüß, Rolf Drechsler	Reconfigurable TAP controllers with embedded compression for large test data volume.	DFT	2017	DBLP DOI BibTeX RDF
27	Bing Li 0005, Ulf Schlichtmann	Reliability-aware synthesis and fault test of fully programmable valve arrays (FPVAs).	DFT	2017	DBLP DOI BibTeX RDF
27	H. Junqi, T. Nandha Kumar, Haider Abbas, Fabrizio Lombardi	Simulation-based evaluation of frequency upscaled operation of exact/approximate ripple carry adders.	DFT	2017	DBLP DOI BibTeX RDF
27	Yu-Wei Lee, Nur A. Touba	Improving test compression with multiple-polynomial LFSRs.	DFT	2017	DBLP DOI BibTeX RDF
27	Haider Alrudainy, Rishad A. Shafik, Andrey Mokhov, Alex Yakovlev	Lifetime reliability characterization of N/MEMS used in power gating of digital integrated circuits.	DFT	2017	DBLP DOI BibTeX RDF
27	Shoba Gopalakrishnan, Virendra Singh	REMORA: A hybrid low-cost soft-error reliable fault tolerant architecture.	DFT	2017	DBLP DOI BibTeX RDF
27	Chiara Sandionigi, Maurício Altieri, Olivier Héron	Early estimation of aging in the design flow of integrated circuits through a programmable hardware module.	DFT	2017	DBLP DOI BibTeX RDF
27	Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi 0001	Low cost error monitoring for improved maintainability of IoT applications.	DFT	2017	DBLP DOI BibTeX RDF
27	Yu Xie, Chen Yang 0003, Chuang-An Mao, He Chen, Yizhuang Xie	A novel low-overhead fault tolerant parallel-pipelined FFT design.	DFT	2017	DBLP DOI BibTeX RDF
27	Xin Fan 0002, Jan Stuijt, Tobias Gemmeke	Towards SRAM leakage power minimization by aggressive standby voltage scaling - Experiments on 40nm test chips.	DFT	2017	DBLP DOI BibTeX RDF
27	Prashant D. Joshi, Arunabha Sen, D. Frank Hsu, Said Hamdioui, Koen Bertels	Region based containers - A new paradigm for the analysis of fault tolerant networks.	DFT	2017	DBLP DOI BibTeX RDF
27	Alessandro Baldassari, Cristiana Bolchini, Antonio Miele	A dynamic reliability management framework for heterogeneous multicore systems.	DFT	2017	DBLP DOI BibTeX RDF
27	Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel	Scheduling voter checks to detect configuration memory errors in FPGA-based TMR systems.	DFT	2017	DBLP DOI BibTeX RDF
27	Glenn H. Chapman, Parham Purbakht, Peter Le, Israel Koren, Zahava Koren	Exploring soft errors (SEUs) with digital imager pixels ranging from 7 to 1.3 μm.	DFT	2017	DBLP DOI BibTeX RDF
27	Gokulkrishnan Vadakkeveedu, V. Kamakoti 0001, Nitin Chandrachoodan, Seetal Potluri	A scalable pseudo-exhaustive search for fault diagnosis in microfluidic biochips.	DFT	2017	DBLP DOI BibTeX RDF
27	Lake Bu, Hien D. Nguyen, Michel A. Kinsy	RASSS: A perfidy-aware protocol for designing trustworthy distributed systems.	DFT	2017	DBLP DOI BibTeX RDF
27	Tiago A. O. Alves, Sandip Kundu, Leandro A. J. Marzulo, Felipe M. G. França	A resilient scheduler for dataflow execution.	DFT	2017	DBLP DOI BibTeX RDF
27	Amir Mahdi Hosseini Monazzah, Hamed Farbeh, Seyed Ghassem Miremadi	Investigating the effects of process variations and system workloads on endurance of non-volatile caches.	DFT	2017	DBLP DOI BibTeX RDF
27	Toshinori Hosokawa, Atsushi Hirai, Hiroshi Yamazaki, Masayuki Arai	A dynamic test compaction method on low power test generation based on capture safe test vectors.	DFT	2017	DBLP DOI BibTeX RDF
27	Andrea Fedi, Marco Ottavi, Gianluca Furano, Antimo Bruno, Roberto Senesi, Carla Andreani, Carlo Cazzaniga	High-energy neutrons characterization of a safety critical computing system.	DFT	2017	DBLP DOI BibTeX RDF
27	Leandro Santiago 0001, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu	Realizing strong PUF from weak PUF via neural computing.	DFT	2017	DBLP DOI BibTeX RDF
27	Sina Boroumand, Hadi Parandeh-Afshar, Philip Brisk, Siamak Mohammadi	CAL: Exploring cost, accuracy, and latency in approximate and speculative adder design.	DFT	2017	DBLP DOI BibTeX RDF
27		2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016, Storrs, CT, USA, September 19-20, 2016	DFT	2016	DBLP BibTeX RDF
27	Ke Chen 0018, Fabrizio Lombardi, Jie Han 0001	Design and analysis of an approximate 2D convolver.	DFT	2016	DBLP DOI BibTeX RDF
27	Anirudh Iyengar, Swaroop Ghosh, Nitin Rathi, Helia Naeimi	Side channel attacks on STTRAM and low-overhead countermeasures.	DFT	2016	DBLP DOI BibTeX RDF
27	Xiaolin Xu, Daniel E. Holcomb	Reliable PUF design using failure patterns from time-controlled power gating.	DFT	2016	DBLP DOI BibTeX RDF
27	Abdulaziz Eker, Oguz Ergin	Error recovery through partial value similarity.	DFT	2016	DBLP DOI BibTeX RDF
27	Glenn H. Chapman, Rahul Thomas, Rohan Thomas, Israel Koren, Zahava Koren	Experimental study and analysis of soft and permanent errors in digital cameras.	DFT	2016	DBLP DOI BibTeX RDF
27	Mojing Liu, Brett H. Meyer	Bounding error detection latency in safety critical systems with enhanced Execution Fingerprinting.	DFT	2016	DBLP DOI BibTeX RDF
27	Gianluca Furano, Stefano Di Mascio, Tomasz Szewczyk, Alessandra Menicucci, Luigi Campajola, Francesco Di Capua, Andrea Fabbri, Marco Ottavi	A novel method for SEE validation of complex SoCs using Low-Energy Proton beams.	DFT	2016	DBLP DOI BibTeX RDF
27	Adam Watkins, Spyros Tragoudas	A Highly Robust Double Node Upset Tolerant latch.	DFT	2016	DBLP DOI BibTeX RDF
27	Ahmed Ibrahim 0001, Hans G. Kerkhoff	Efficient utilization of hierarchical iJTAG networks for interrupts management.	DFT	2016	DBLP DOI BibTeX RDF
27	Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu	On meta-obfuscation of physical layouts to conceal design characteristics.	DFT	2016	DBLP DOI BibTeX RDF
27	Filippo Giuliani, Marco Ottavi, Gian Carlo Cardarilli, Marco Re, Luca Di Nunzio, Rocco Fazzolari, Antimo Bruno, Francesco Zuliani	Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams.	DFT	2016	DBLP DOI BibTeX RDF
27	Luca Santinelli, Zhishan Guo, Laurent George 0001	Fault-aware sensitivity analysis for probabilistic real-time systems.	DFT	2016	DBLP DOI BibTeX RDF
27	Ronak Salamat, Masoumeh Ebrahimi, Nader Bagherzadeh, Freek Verbeek	CoBRA: Low cost compensation of TSV failures in 3D-NoC.	DFT	2016	DBLP DOI BibTeX RDF
27	Hassan Ebrahimi, Alireza Rohani, Hans G. Kerkhoff	Detecting intermittent resistive faults in digital CMOS circuits.	DFT	2016	DBLP DOI BibTeX RDF
27	Zaid Al-bayati, Brett H. Meyer, Haibo Zeng 0001	Fault-tolerant scheduling of multicore mixed-criticality systems under permanent failures.	DFT	2016	DBLP DOI BibTeX RDF
27	Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich	Applying efficient fault tolerance to enable the preconditioned conjugate gradient solver on approximate computing hardware.	DFT	2016	DBLP DOI BibTeX RDF
27	Chao Chen, Jacopo Panerati, Giovanni Beltrame	Effects of online fault detection mechanisms on Probabilistic Timing Analysis.	DFT	2016	DBLP DOI BibTeX RDF
27	Juexiao Su, Ju-Yueh Lee, Chang Wu, Lei He	In-place LUT polarity inVersion to mitigate soft errors for FPGAs.	DFT	2016	DBLP DOI BibTeX RDF
27	Xiaotong Cui, Kaijie Wu 0001, Siddharth Garg, Ramesh Karri	Can flexible, domain specific programmable logic prevent IP theft?	DFT	2016	DBLP DOI BibTeX RDF
27	Juman Alshraiedeh, Avinash Kodi	An adaptive routing algorithm to improve lifetime reliability in NoCs architecture.	DFT	2016	DBLP DOI BibTeX RDF
27	Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar 0001	Cross-layer fault-tolerant design of real-time systems.	DFT	2016	DBLP DOI BibTeX RDF
27	Hananeh Aliee, Stefan Vitzethum, Michael Glaß, Jürgen Teich, Emanuele Borgonovo	Guiding Genetic Algorithms using importance measures for reliable design of embedded systems.	DFT	2016	DBLP DOI BibTeX RDF
27	Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis	A new approach to deadlock-free fully adaptive routing for high-performance fault-tolerant NoCs.	DFT	2016	DBLP DOI BibTeX RDF
27	Naghmeh Karimi, Ke Huang 0001	Prognosis of NBTI aging using a machine learning scheme.	DFT	2016	DBLP DOI BibTeX RDF
27	Hardeep Chahal, Vasileios Tenentes, Daniele Rossi 0001, Bashir M. Al-Hashimi	BTI aware thermal management for reliable DVFS designs.	DFT	2016	DBLP DOI BibTeX RDF
27	Cristiana Bolchini, Matteo Carminati, Tulika Mitra, Thannirmalai Somu Muthukaruppan	Combined on-line lifetime-energy optimization for asymmetric multicores.	DFT	2016	DBLP DOI BibTeX RDF
27	Marcos T. Leipnitz, Eduardo Nunes de Souza, Gabriel L. Nazar	Low cost resilient regular expression matching on FPGAs.	DFT	2016	DBLP DOI BibTeX RDF
27	Omer Khan, Maria K. Michael, Antonio Miele, Qiaoyan Yu	Foreword.	DFT	2016	DBLP DOI BibTeX RDF
27	Hiroki Ueno, Kazuteru Namba	Construction of a soft error (SEU) hardened Latch with high critical charge.	DFT	2016	DBLP DOI BibTeX RDF
27	Xabier Iturbe, Balaji Venu, Emre Ozer 0001	Soft error vulnerability assessment of the real-time safety-related ARM Cortex-R5 CPU.	DFT	2016	DBLP DOI BibTeX RDF
27	Riccardo Cantoro, Davide Piumatti, Paolo Bernardi, Sergio de Luca, Alessandro Sansonetti	In-field functional test programs development flow for embedded FPUs.	DFT	2016	DBLP DOI BibTeX RDF
27		2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014	DFT	2014	DBLP BibTeX RDF
27	Ashkan Eghbal, Pooria M. Yaghini, Siavash S. Yazdi, Nader Bagherzadeh	TSV-to-TSV inductive coupling-aware coding scheme for 3D Network-on-Chip.	DFT	2014	DBLP DOI BibTeX RDF
27	Stavros Tzilis, Ioannis Sourdis	A runtime manager for gracefully degrading SoCs.	DFT	2014	DBLP DOI BibTeX RDF
27	Swapnil Bahl, Shreyans Rungta, Shray Khullar, Rohit Kapur, Anshuman Chandra, Salvatore Talluto 0001, Pramod Notiyath, Ajay Rajagopalan	Unifying scan compression.	DFT	2014	DBLP DOI BibTeX RDF
27	Jimson Mathew, Marco Ottavi, Yunfan Yang, Dhiraj K. Pradhan	Using memristor state change behavior to identify faults in photovoltaic arrays.	DFT	2014	DBLP DOI BibTeX RDF
27	Cristiana Bolchini, Luca Cassano	Machine learning-based techniques for incremental functional diagnosis: A comparative analysis.	DFT	2014	DBLP DOI BibTeX RDF
27	Mihalis Psarakis, Alexandros Vavousis, Cristiana Bolchini, Antonio Miele	Design and implementation of a self-healing processor on SRAM-based FPGAs.	DFT	2014	DBLP DOI BibTeX RDF
27	Jerry Backer, David Hély, Ramesh Karri	Reusing the IEEE 1500 design for test infrastructure for security monitoring of Systems-on-Chip.	DFT	2014	DBLP DOI BibTeX RDF
27	Thiago Berticelli Lo, Fernanda Lima Kastensmidt, Antonio Carlos Schneider Beck	Towards an adaptable bit-width NMR voter for multiple error masking.	DFT	2014	DBLP DOI BibTeX RDF
27	Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus	Diagnostic self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faults.	DFT	2014	DBLP DOI BibTeX RDF
27	Tsuyoshi Iwagaki, Tatsuya Nakaso, Ryoko Ohkubo, Hideyuki Ichihara, Tomoo Inoue	Scheduling algorithm in datapath synthesis for long duration transient fault tolerance.	DFT	2014	DBLP DOI BibTeX RDF
27	In-Seok Jung, Yong-Bin Kim	A 12-bit 32MS/s SAR ADC using built-in self calibration technique to minimize capacitor mismatch.	DFT	2014	DBLP DOI BibTeX RDF
27	Domenico G. Sorrenti, Dario Cozzi, Sebastian Korf, Luca Cassano, Jens Hagemeyer, Mario Porrmann, Cinzia Bernardeschi	Exploiting dynamic partial reconfiguration for on-line on-demand testing of permanent faults in reconfigurable systems.	DFT	2014	DBLP DOI BibTeX RDF
27	Lucas A. Tambara, Fernanda Lima Kastensmidt, Paolo Rech, Christopher Frost 0002	Decreasing FIT with diverse triple modular redundancy in SRAM-based FPGAs.	DFT	2014	DBLP DOI BibTeX RDF
27	Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta	A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs.	DFT	2014	DBLP DOI BibTeX RDF
27	Cristian Constantinescu, Srini Krishnamoorthy, Tuyen Nguyen	Estimating the effect of single-event upsets on microprocessors.	DFT	2014	DBLP DOI BibTeX RDF
27	Wisam Aljubouri, Ahish Mysore Somashekar, Themistoklis Haniotakis, Spyros Tragoudas	Diagnosis of segment delay defects with current sensing.	DFT	2014	DBLP DOI BibTeX RDF
27	Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael	Exploration of system availability during software-based self-testing in many-core systems under test latency constraints.	DFT	2014	DBLP DOI BibTeX RDF
27	Victor Tomashevich, Yaara Neumeier, Raghavan Kumar, Osnat Keren, Ilia Polian	Protecting cryptographic hardware against malicious attacks by nonlinear robust codes.	DFT	2014	DBLP DOI BibTeX RDF
27	Jahanzeb Anwer, Marco Platzner	Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs.	DFT	2014	DBLP DOI BibTeX RDF
27	Masoumeh Ebrahimi, Junshi Wang, Letian Huang, Masoud Daneshtalab, Axel Jantsch	Rescuing healthy cores against disabled routers.	DFT	2014	DBLP DOI BibTeX RDF
27	Pilin Junsangsri, Jie Han 0001, Fabrizio Lombardi	A system-level scheme for resistance drift tolerance of a multilevel phase change memory.	DFT	2014	DBLP DOI BibTeX RDF
27	Glenn H. Chapman, Rohit Thomas, Rahul Thomas, Israel Koren, Zahava Koren	Improved correction for hot pixels in digital imagers.	DFT	2014	DBLP DOI BibTeX RDF
27	Halit Dogan, Domenic Forte, Mark Mohammad Tehranipoor	Aging analysis for recycled FPGA detection.	DFT	2014	DBLP DOI BibTeX RDF
27	Paniz Foroutan, Mehdi Kamal, Zainalabedin Navabi	A heuristic path selection method for small delay defects test.	DFT	2014	DBLP DOI BibTeX RDF
27	Anup Das 0001, Akash Kumar 0001, Bharadwaj Veeravalli	Artificial intelligence based task mapping and pipelined scheduling for checkpointing on real time systems with imperfect fault detection.	DFT	2014	DBLP DOI BibTeX RDF
27	Mohammad Hashem Haghbayan, Bijan Alizadeh, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen	Automated formal approach for debugging dividers using dynamic specification.	DFT	2014	DBLP DOI BibTeX RDF
27	Paolo Bernardi, Riccardo Cantoro, Lyl M. Ciganda Brasca, Ernesto Sánchez 0001, Matteo Sonza Reorda, Sergio de Luca, Renato Meregalli, Alessandro Sansonetti	On the in-field functional testing of decode units in pipelined RISC processors.	DFT	2014	DBLP DOI BibTeX RDF
27	Md. Tauhidur Rahman 0001, Domenic Forte, Quihang Shi, Gustavo K. Contreras, Mark Mohammad Tehranipoor	CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly.	DFT	2014	DBLP DOI BibTeX RDF