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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 569 occurrences of 384 keywords
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Results
Found 2573 publication records. Showing 2573 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Jawad Haj-Yahya, Efraim Rotem, Avi Mendelson, Anupam Chattopadhyay |
A Comprehensive Evaluation of Power Delivery Schemes for Modern Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 123-130, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Ming Yan, Yuntao Song, Yiyu Feng, Ghasem Pasandi, Massoud Pedram, Shahin Nazarian |
kNN-CAM: A k-Nearest Neighbors-based Configurable Approximate Floating Point Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 1-7, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Yukio Miyasaka, Ashish Mittal, Masahiro Fujita |
Synthesis of Algorithm Considering Communication Structure of Distributed/Parallel Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 45-51, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Huan Yu, Jaemin Shin, Tim Michalka, Mourad Larbi, Madhavan Swaminathan |
Behavioral Modeling of Tunable I/O Drivers with Pre-emphasis Using Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 247-252, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Sheng-En David Lin, Dae Hyun Kim 0004 |
Routing Complexity Minimization of Monolithic Three-Dimensional Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 329-334, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Prateek Gupta, Harshini Mandadapu, Shirisha Gourishetty, Zia Abbas |
Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 85-91, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Shantonu Das, Dae Hyun Kim 0004 |
A Non-Slicing 3-D Floorplan Representation for Monolithic 3-D IC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 323-328, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | M. Hassan Najafi, S. Rasoul Faraji, Bingzhe Li, David J. Lilja, Kia Bazargan |
Accelerating Deterministic Bit-Stream Computing with Resolution Splitting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 157-162, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Anurag Reddy Daram, Dhireesha Kudithipudi, Angel Yanguas-Gil |
Task-Based Neuromodulation Architecture for Lifelong Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 191-197, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Ghasem Pasandi, Shahin Nazarian, Massoud Pedram |
Approximate Logic Synthesis: A Reinforcement Learning-Based Technology Mapping Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 26-32, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Haowen Fang, Amar Shrestha, Ziyi Zhao, Yanzhi Wang, Qinru Qiu |
A General Framework to Map Neural Networks onto Neuromorphic Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 20-25, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Matthew Lewandowski, Srinivas Katkoori |
A Darwinian Genetic Algorithm for State Encoding Based Finite State Machine Watermarking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 210-215, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Madhu Raman, Nizar Abdallah, Julien Dunoyer |
An Artificial Intelligence Approach to EDA Software Testing: Application to Net Delay Algorithms in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 311-316, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Morteza Hosseini, Hirenkumar Paneliya, Utteja Kallakuri, Mohit Khatwani, Tinoosh Mohsenin |
Minimizing Classification Energy of Binarized Neural Network Inference for Wearable Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 259-264, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Zhipeng Dong, Xi Cao, M. Ahosan Ul Karim, Vivek Joshi, Torsten Klick, Joerg Schmid |
Simulation Based Assessment of SRAM Data Retention Voltage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 98-103, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Xu Liu, Alessandro Bernardini, Ulf Schlichtmann, Xing Zhou |
A Compact Model of Negative Bias Temperature Instability Suitable for Gate-Level Circuit Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 76-80, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Pradeep Chawda, Anupriya Prasad, Kunjal Rathod, Kritika Solanki |
An Automated Design Flow for Synthesis of Optimal Switching Power Supply. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 81-84, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Alexander J. Groszewski, Travis Lenz |
Deterministic Stochastic Computation Using Parallel Datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 138-144, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita |
Automatic Test Pattern Generation for Double Stuck-at Faults Based on Test Patterns of Single Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 284-290, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Mohamad Hammam Alsafrjalani, Tosiron Adegbija, Lokesh Ramamoorthi |
Evaluating Design Space Subsetting for Multi-Objective Optimization in Configurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 104-109, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Ya-Chi Huang, Meng-Hsueh Chiang, Shui-Jinn Wang |
Speed Optimization of Vertically Stacked Gate-All-Around MOSFETs with Inner Spacers for Low Power and Ultra-Low Power Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 231-234, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Yuting Cao, Hao Zheng 0001, Sandip Ray |
A Communication-Centric Observability Selection for Post-Silicon System-on-Chip Integration Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 278-283, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Maedeh Hemmat, Azadeh Davoodi |
Dynamic Reconfiguration of CNNs for Input-Dependent Approximation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 176-182, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Kenshu Seto, Hamid Nejatollahi, Jiyoung An, Sujin Kang, Nikil D. Dutt |
Small Memory Footprint Neural Network Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 253-258, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Kazuaki Hara, Naoki Takeuchi, Masashi Aono, Yuko Hara-Azumi |
Amoeba-Inspired Stochastic Hardware SAT Solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 151-156, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Barkha Gupta, W. Rhett Davis |
Characterization of Fast, Accurate Leakage Power Models for IEEE P2416. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 39-44, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar |
High-Performance NoCs Employing the DSP48E1 Blocks of the Xilinx FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 163-169, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Pranav Ashar, Vinod Viswanath |
Closing the Verification Gap with Static Sign-off. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 343-347, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Yasaswy Kasarabada, Suyuan Chen, Ranga Vemuri |
On SAT-Based Attacks On Encrypted Sequential Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 204-211, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Xiaokun Yang, Yunxiang Zhang 0001, Lei Wu |
A Scalable Image/Video Processing Platform with Open Source Design and Verification Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 110-116, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Chaofan Li, Sachin S. Sapatnekar, Jiang Hu |
Fast Mapping-Based High-Level Synthesis of Pipelined Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 33-38, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Arman Roohi, Shaahin Angizi, Deliang Fan, Ronald F. DeMara |
Processing-In-Memory Acceleration of Convolutional Neural Networks for Energy-Effciency, and Power-Intermittency Resilience. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 8-13, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Joonseop Sim, Minsu Kim, Yeseong Kim, Saransh Gupta, Behnam Khaleghi, Tajana Rosing |
MAPIM: Mat Parallelism for High Performance Processing in Non-volatile Memory Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 145-150, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Masoud Zabihi, Zhengyang Zhao, D. C. Mahendra, Zamshed I. Chowdhury, Salonik Resch, Thomas Peterson, Ulya R. Karpuzcu, Jianping Wang 0006, Sachin S. Sapatnekar |
Using Spin-Hall MTJs to Build an Energy-Efficient In-memory Computation Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 52-57, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Billy Huggins, W. Rhett Davis, Paul D. Franzon |
Estimating Pareto Optimum Fronts to Determine Knob Settings in Electronic Design Automation Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 304-310, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Kaustav Goswami 0002, Hemanta Kumar Mondal, Shirshendu Das, Dip Sankar Banerjee |
State Preserving Dynamic DRAM Bank Re-Configurations for Enhanced Power Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 131-137, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Tsutomu Ishida, Izumi Nitta, Daisuke Fukuda, Yuzi Kanazawa |
Deep Learning-Based Wafer-Map Failure Pattern Recognition Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 291-297, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Dharanidhar Dhang, Syed Ali Hasnain, Rabi N. Mahapatra |
MReC: A Multilayer Photonic Reservoir Computing Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 170-175, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Jawad Haj-Yahya, Ming Ming Wong, Vikramkumar Pudi, Shivam Bhasin, Anupam Chattopadhyay |
Lightweight Secure-Boot Architecture for RISC-V System-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 216-223, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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1 | Katayoun Neshatpour, Farnaz Behnia, Houman Homayoun, Avesta Sasan |
Exploiting Energy-Accuracy Trade-off through Contextual Awareness in Multi-Stage Convolutional Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019, pp. 265-270, 2019, IEEE, 978-1-7281-0392-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
1 | Kerry Bernstein |
Murphy was an optimist: Embracing asymmetry in electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Ahmet Turan Erozan, Mohammad Saber Golanbari, Rajendra Bishnoi, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori |
Design and evaluation of physical unclonable function for inorganic printed electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 419-424, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Huan Wang 0009, Jean-François Millithaler, Ronald W. Knepper, Martin Margala |
Terahertz travelling wave amplifier design using Ballistic Deflection Transistor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 201-206, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Anthony Mattar El Raachini, Hussein Alawieh, Adam Issa, Zainab Swaidan, Rouwaida Kanj, Ali Chehab, Mazen A. R. Saghir |
Double error cellular automata-based error correction with skip-mode compact syndrome coding for resilient PUF design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 413-418, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mami Miyamoto, Kiyoharu Hamaguchi |
Extracting hardware assertions including word-level relations over multiple clock cycles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 244-250, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Boris Vaisband, Adeel Ahmad Bajwa, Subramanian S. Iyer |
Network on interconnect fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 138-143, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Anupriya Prasad, Pradeep Chawda |
Power management factors and techniques for IoT design devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 364-369, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mahdi Nazemi, Amir Erfan Eshratifar, Massoud Pedram |
A hardware-friendly algorithm for scalable training and deployment of dimensionality reduction models on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 395-400, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Horaira Abu, Salem Abdennadher, Benoit Provost, Harry Muljono |
Augmenting ESD and EOS physical analysis with per pin ESD and leakage DFT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 20-24, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Chun-Xun Lin, Tsung-Wei Huang, Martin D. F. Wong |
Routing at compile time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 169-175, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Joonseop Sim, Mohsen Imani, Woojin Choi, Yeseong Kim, Tajana Rosing |
LUPIS: Latch-up based ultra efficient processing in-memory system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 55-60, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Hassan Afzali-Kusha, Alireza Shafaei, Massoud Pedram |
A 125mV 2ns-access-time 16Kb SRAM design based on a 6T hybrid TFET-FinFET cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 280-285, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Amin Jadidi, Mohammad Arjomand, Mahmut T. Kandemir, Chita R. Das |
Hybrid-comp: A criticality-aware compressed last-level cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 25-30, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Victor Huang, Chenyun Pan, Azad Naeemi |
Generic system-level modeling and optimization for beyond CMOS device applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 196-200, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jheng-Yi Chen, Ming-Yu Chang, Shi-Hao Chen, Jia-Wei Lee, Meng-Hsueh Chiang |
Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 151-155, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Pavan Kumar Javvaji, Basim Shanyour, Spyros Tragoudas |
Test set identification for improved delay defect coverage in the presence of statistical delays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 14-19, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Paul C.-P. Paul, Pei-Yu Chiang, Der-Cherng Tarng, Chih-Yu Yang |
Mathematical derivation, circuits design and clinical experiments of measuring blood flow volume (BFV) at arteriovenous fistula (AVF) of hemodialysis (HD) patients using a newly-developed photoplethysmography (PPG) sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 353-356, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Archana Pandey, Pitul Garg, Shobhit Tyagi, Rajeev Ranjan, Anand Bulusu |
A modified method of logical effort for FinFET circuits considering impact of fin-extension effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 189-195, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Pradeep Kumar Chawda |
An automated design flow for synthesis of optimal multi-layer multi-shape PCB coils for inductive sensing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 290-295, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mihir Mody, Kumar Desappan, Pramod Swami, Manu Mathew, Soyeb Nagori |
Low cost and power CNN/deep learning solution for automated driving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 432-436, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Frederico Pratas, Thomas Dedes, Andrew Webber, Majid Bemanian, Itai Yarom |
Measuring the effectiveness of ISO26262 compliant self test library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 156-161, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Pradeep Kumar Chawda |
A simplified methodology for complex analog module layout generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 82-87, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Tongxin Yang, Tomoaki Ukezono, Toshinori Sato |
A low-power configurable adder for approximate applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 347-352, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Zhiming Zhang, Laurent Njilla, Charles A. Kamhoua, Kevin A. Kwiat, Qiaoyan Yu |
Securing FPGA-based obsolete component replacement for legacy systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 401-406, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Juyeon Kim, Taewhan Kim |
Energy-optimal dynamic voltage scaling in multicore platforms with reconfigurable power distribution network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 31-36, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa |
A loop structure optimization targeting high-level synthesis of fast number theoretic transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 106-111, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Linxi Dong, Haonan Wang, Gaofeng Wang, Weimin Qiu |
A wireless multifunctional monitoring system of tower body running state based on MEMS acceleration sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 357-363, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Arif Siddiqi, Navneet Jain, Mahbub Rashed |
Back-bias generator for post-fabrication threshold voltage tuning applications in 22nm FD-SOI process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 268-273, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Axel Jantsch, Arman Anzanpour, Hedyeh A. Kholerdi, Iman Azimi, Lydia C. Siafara, Amir M. Rahmani, Nima Taherinejad, Pasi Liljeberg, Nikil D. Dutt |
Hierarchical dynamic goal management for IoT systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 370-375, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Xinfei Guo, Vaibhav Verma, Patricia Gonzalez-Guerrero, Mircea R. Stan |
When "things" get older: Exploring circuit aging in IoT applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 296-301, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kamlesh Singh, Hailong Jiao, Jos Huisken, Hamed Fatemi, José Pineda de Gyvez |
Low power latch based design with smart retiming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 329-334, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sheikh Ariful Islam, Srinivas Katkoori |
High-level synthesis of key based obfuscated RTL datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 407-412, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mohammad Saber Golanbari, Saman Kiamehr, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
Reliable memory PUF design for low-power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 207-213, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jihyun Ryoo, Meena Arunachalam, Rahul Khanna, Mahmut T. Kandemir |
Efficient K nearest neighbor algorithm implementations for throughput-oriented architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 144-150, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mohsen Imani, Daniel Peroni, Tajana Rosing |
Program acceleration using nearest distance associative search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 43-48, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Joohan Kim, Taewhan Kim |
Clock buffer and flip-flop co-optimization for reducing peak current noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 94-99, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kuen-Wey Lin, Masanori Hashimoto, Yih-Lang Li |
Near-future traffic evaluation based navigation for automated driving vehicles considering traffic uncertainties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 425-431, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Arman Roohi, Ramtin Zand, Ronald F. DeMara |
Synthesis of normally-off boolean circuits: An evolutionary optimization approach utilizing spintronic devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 49-54, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Wenkai Guan, Milad Ghorbani Moghaddam, Cristinel Ababei |
Uncertainty aware mapping of embedded systems for reliability, performance, and energy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 176-183, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sagarvarma Sayyaparaju, Sherif Amer, Garrett S. Rose |
A bi-memristor synapse with spike-timing-dependent plasticity for on-chip learning in memristive neuromorphic systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 69-74, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Vivek Nautiyal, Nishant Nukala, Fakhruddin Ali Bohra, Sagar Dwivedi, Jitendra Dasani, Satinderjit Singh, Gaurav Singla, Martin Kinkade |
Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 274-279, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Jindun Dai, Renjie Li, Xin Jiang 0003, Takahiro Watanabe |
PDA-HyPAR: Path-diversity-aware hybrid planar adaptive routing algorithm for 3D NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 131-137, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Bin Lin, Kai Cong, Zhenkun Yang, Zhi-gang Liao, Tao Zhan, Christopher Havlicek, Fei Xie |
Concolic testing of SystemC designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 1-7, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Kangjun Bai, Yang Yi Bradley |
A path to energy-efficient spiking delayed feedback reservoir computing system for brain-inspired neuromorphic processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 322-328, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Ahmad Mansour, Ahmed El-Naggar, Bassma Al-Abassy, Mostafa Khamis, Ahmed Shalaby 0001 |
A 4-PAM interconnect in network-on-chip for high-throughput and latency-sensitive applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 112-118, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Cong Ma, David J. Lilja |
Parallel implementation of finite state machines for reducing the latency of stochastic computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 335-340, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Tuotian Liao, Lihong Zhang |
Parasitic-aware gm/ID-based many-objective analog/RF circuit sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 100-105, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Ujas Patel, Sai Nimmalapudi, Harvey Stiegler, Andrew Marshall, Keith Jarreau |
Enhancing circuit operation using analog floating gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 221-226, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | |
19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018 ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![IEEE, 978-1-5386-1214-9 The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
1 | Zuitoku Shin, Shumpei Morita, Song Bian 0001, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato |
A study on NBTI-induced delay degradation considering stress frequency dependence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 251-256, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Divya Akella Kamakshi, Xinfei Guo, Harsh N. Patel, Mircea R. Stan, Benton H. Calhoun |
A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 341-346, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Przemyslaw Mroszczyk, Vasilis F. Pavlidis |
Ultra-low swing CMOS transceiver for 2.5-D integrated systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 262-267, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Mohammed Fakhruddin, Kuok-Khian Lo, James Karp, Michael J. Hart, Min-Hsing P. Chen |
Verification methodology to guarantee low routing resistance to well taps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 257-261, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Yu-Cheng Chiang, Shr-Cheng Tsai, Rung-Bin Lin |
Recognition of regular layout structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 75-81, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sidhartha Sankar Rout, Hemanta Kumar Mondal, Rohan Juneja, Sri Harsha Gade, Sujay Deb |
Dynamic NoC platform for varied application needs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 232-237, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Xiaolong Ma, Yipeng Zhang, Geng Yuan, Ao Ren, Zhe Li 0001, Jie Han 0001, Jingtong Hu, Yanzhi Wang |
An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 314-321, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Xiaowei Xu 0004, Tianchen Wang, Qing Lu, Yiyu Shi 0001 |
Resource constrained cellular neural networks for real-time obstacle detection using FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 437-440, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Bingzhe Li, M. Hassan Najafi, Bo Yuan 0001, David J. Lilja |
Quantized neural networks with new stochastic multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 376-382, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Sara Karimi, Jelena Trajkovic |
Comparative study and prediction modeling of photonic ring Network on Chip architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 119-126, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
1 | Shinichi Nishizawa, Hidetoshi Onodera |
Process variation aware D-Flip-Flop design using regression analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 88-93, 2018, IEEE, 978-1-5386-1214-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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