Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
25 | Daniel Denning, James Irvine, Derek Stark, Malachy Devlin |
Multi-User FPGA Co-Simulation over TCP/IP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 151-156, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Moo-Kyoung Chung, Chong-Min Kyung |
Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 38-44, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Ki-Seok Bang, Jin-Young Choi, Sung-Ho Jang |
Formal Specification and Verification of Embedded System with Shared Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 8-14, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Ying Chen, Dennis Abts, David J. Lilja |
State Pruning for Test Vector Generation for a Multiprocessor Cache Coherence Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 74-77, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Arnaud Grasset, Frédéric Rousseau 0001, Ahmed Amine Jerraya |
Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 66-69, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Hideaki Yanagisawa, Minoru Uehara, Hideki Mori |
Automatic Generation of a Simulation Compiler by a HW/SW Co-Design System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 53-59, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin |
Abstract RTOS Modeling for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 210-216, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | M. Diaby, Matthieu Tuna, Jean Lou Desbarbieux, Franck Wajsbürt |
High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 103-108, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
KPN, FPGA, High Level Synthesis, Code Generator, VHDL, Hardware/Software codesign |
25 | Maryse Wouters, Peter Van Wesemael, Roeland Vandebriel, Andy Dewilde, Michael Libois |
Real Time Prototyping of Broadband Wireless LAN Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 226-231, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Amjad Mohsen, Richard Hofmann |
Characterizing Power Consumption and Delay of Functional/Library Components for Hardware/Software Co-Design of Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 45-52, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Frédéric Gilliers, Jean-Pierre Velu, Fabrice Kordon |
Generation of Distributed Programs in Their Target Execution Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 127-134, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | André Meisel, Markus Visarius, Wolfram Hardt, Stefan Ihmor |
Self-Reconfiguration of Communication Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 144-150, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Shane Sendall |
Domain Driven Software Development -- A World of Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 110-112, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | James Bret Michael, Man-tak Shing, Michael H. Miklaski, Joel D. Babbitt |
Modeling and Simulation of System-of-Systems Timing Constraints with UML-RT and OMNeT++. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 202-209, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber |
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 157-163, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Doron Drusinsky, Man-tak Shing |
TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 29-36, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Rolf Drechsler |
Towards Formal Verification on the System Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 2-5, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Adriano Sarmento, Wander O. Cesário, Ahmed Amine Jerraya |
Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 88-95, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Pavle Belanovic, Martin Holzer 0002, Bastian Knerr, Markus Rupp, Guillaume Sauzon |
Automatic Generation of Virtual Prototypes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 114-118, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya |
An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland, pp. 80-87, 2004, IEEE Computer Society, 0-7695-2159-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | |
14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![IEEE Computer Society, 0-7695-1943-1 The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
25 | Ludovic Tambour, Nacer-Eddine Zergainoh, Pascal Urard, Henri Michel, Ahmed Amine Jerraya |
An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 56-63, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Stefan Förster, Marco Fischer, André Windisch, Burkhard Balser, Dieter Monjau |
A New Specification Methodology for Embedded Systems Based on the - Calculus Process Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 26-32, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Arif Sasongko, Amer Baghdadi, Frédéric Rousseau 0001, Ahmed Amine Jerraya |
Embedded Application Prototyping on a Communication-Restricted Reconfigurable. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 33-39, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Abhijit K. Deb, Johnny Öberg, Axel Jantsch |
Simulation and Analysis of Embedded DSP Systems Using Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 64-70, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Chuanjun Zhang, Frank Vahid |
Cache Configuration Exploration on Prototyping Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 164-, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
embedded systems, low power, memory hierarchy, low energy, architecture tuning, Configurable cache, system-level exploration |
25 | Paul Young, Nabendu Chaki, Valdis Berzins, Luqi |
Evaluation of Middleware Architectures in Achieving System Interoperability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 108-116, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Ryan J. Fong, Scott J. Harper, Peter M. Athanas |
A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 117-123, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni |
Synthesis of LOTOS Specification of the IEEE-1394 Firewire Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 86-92, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Jérôme Hugues, Laurent Pautet, Fabrice Kordon |
Contributions to middleware architectures to prototype distribution infrastructures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 124-, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Nikolaus Kerö, Thilo Sauter |
Efficient Analysis of Mixed-Signal ASICs for Smart Sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 40-46, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Nikolaos Papandreou, Maria Varsamou, Theodore Antonakopoulos 0001 |
xDSL Systems Prototyping using a Flexible Emulation Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 194-200, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Vincent Bassano, Gilles Bernot |
Marked Regulatory Graphs: A Formal Framework to Simulate Biological Regulatory Networks with Simple Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 93-99, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Sanat Kamal Bahl |
Design and Prototyping a Fast Hadamard Transformer for WCDMA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 134-140, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Apostolos Dollas, Dionissios Efstathiou, Thomas Kyriakides |
A Universal Low Cost Run-Time and Programming Environment for Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 2-8, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPGA programming, testability, Run time environment |
25 | |
13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![IEEE Computer Society, 0-7695-1703-X The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
25 | Sushil Chandra Jain, Anshul Kumar, Shashi Kumar |
Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 66-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Santiago Sánchez-Solano, Raouf Senhadji, Alejandro Cabrera Sarmiento, Iluminada Baturone, Carlos Jesús Jiménez-Fernández, Angel Barriga |
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 25-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Christian Hinkelbein, Andreas Kugel, Reinhard Männer, Matthias Müller 0006 |
Reconfigurable Hardware Control Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 84-91, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Mário P. Véstias, Horácio C. Neto |
System-Level Co-Synthesis of Dataflow Dominated Applications on Reconfigurable Hardware/Software Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 130-137, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Abdulfattah Mohammad Obeid, Alberto García Ortiz, Ralf Ludewig, Manfred Glesner |
Prototyping of a High Performance Generic Viterbi Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 42-47, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Stanislav Chachkov, Didier Buchs |
Interfacing Software Libraries from Non-deterministic Prototypes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 92-98, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier |
System Prototyping by Integration of Reconfigurable Hardware into a Heterogeneous System Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 115-121, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Marco Pavesi |
Market Estimation for System Prototyping EDA Segment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 2-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Guoqiang Shu, Chao Li, Qing Wang 0001, Mingshu Li 0001 |
Validating Objected-Oriented Prototype of Real-Time Systems with Timed Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 99-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Eric Borghs, Jeroen Jacobs, Michaël Beck, Adrian Mihanta, Piet Vandaele, Thierry Pollet |
Prototyping Ethernet in the First Mile over Point-to-Point Copper. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 53-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Matías J. Garrido, César Sanz, Marcos Jiménez, Juan M. Meneses |
A Flexible H.263 Video Coder Prototype Based on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 34-41, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Hideaki Yanagisawa, Minoru Uehara, Hideki Mori |
ISA Based System Design Language in HW/SW Co-Design Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 122-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Maryse Wouters, Tom Huybrechts, Roeland Huys, Stefaan De Rore, Steven Sanders, Erik Uman |
PICARD: Platform Concepts for Prototyping and Demonstration of High Speed Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 166-, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Akira Kitajima, Toshiyuki Sasaki, Yoshinori Takeuchi, Masaharu Imai |
Design of Application Specific CISC Using PEAS-III. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 12-17, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | |
12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![IEEE Computer Society, 0-7695-1206-2 The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
25 | Luqi, Valdis Berzins, Jun Ge, Man-tak Shing, Mikhail Auguston, Barrett R. Bryant, Boon Kwang Kin |
DCAPS - Architecture for Distributed Computer Aided Prototyping System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 103-109, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Nadia Nedjah, Luiza de Macedo Mourelle |
How Many CLBs Does Your Circuit Need to be Implemented?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 174-181, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya |
Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 110-115, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Dimitris Bakalis, Kostas Adaos, George Alexiou, Dimitris Nikolos, D. Lymperopoulos |
EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 182-187, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Denis Hommais, Frédéric Pétrot, Ivan Augé |
A Tool Box to Map System Level Communications on HW/SW Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 77-83, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Stanislav Chachkov, Didier Buchs |
From an Abstract Object-Oriented Model to a Ready-to-Use Embedded System Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 142-148, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Anneliese Amschler Andrews |
The Colorado Advanced Software Institute: From Virtual Research Laboratory to Software Clinic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 4-11, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
25 | David Hansel, Rance Cleaveland, Scott A. Smolka |
Distributed Prototyping from Validated Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 97-102, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Valentin Muresan, Xiaojun Wang 0001, Valentina Muresan, Mircea Vladutiu |
Mixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 162-167, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | J. Robert Heath, Andrew Tan |
Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 128-135, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Real-time reconfigurable architecture, analytic functional modeling, real-time testing and functional/performance verification, design, FPGA prototyping |
25 | Pirouz Bazargan-Sabet, Laurent Vuillemin |
An Approach to Mapping the Timing Behavior of VLSI Circuits on Emulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 168-173, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Gilles Sassatelli, Gaston Cambon, Jérôme Galy, Lionel Torres |
A Dynamically Reconfigurable Architecture for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 32-37, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | David Navarre, Philippe A. Palanque, Rémi Bastide, Ousmane Sy |
A Model-Based Tool for Interactive Prototyping of Highly Interactive Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 136-141, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Sias Mostert, Nathalie Cossement, Rudy Lauwereins, Jef L. van Meerbergen |
DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 122-127, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | William J. Ray, Andy Farrar |
Object Model Driven Code Generation for the Enterprise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 84-89, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami |
Determining the Optimum Extended Instruction-Set Architecture for Application Specific Reconfigurable VLIW CPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 50-57, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Amar Mukherjee, Nitin Motgi, Jürgen Becker 0001, A. Friebe, C. Habermann, Manfred Glesner |
Prototyping of Efficient Hardware Algorithms for Data Compression in Future Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 58-63, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Dietmar Loy, Atsushi Murase, Andreas Doederlein |
System Level Prototyping for Embedded Networking Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 12-16, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | |
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000 ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![IEEE Computer Society, 0-7695-0668-2 The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
25 | Juan Carlos Nogueira, Luqi, Swapan Bhattacharya |
A Risk Assessment Model for Software Prototyping Projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 28-33, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Prototyping, Software risk, Estimation models |
25 | Andreas Koch |
A Comprehensive Prototyping-Platform for Hardware-Software Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 78-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
hybrid processor, RTEMS, Virtex, FPGA, prototyping, codesign, SPARC, Xilinx |
25 | Eduardo de la Torre, Teresa Riesgo, Javier Uceda, E. Macip, M. Rizzi |
Highly Configurable Control Boards: A Tool and a Design Experience. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 174-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Romain Kamdem, Alain Fonkoua |
Coprocessor Synthesis of Multirate System Using Static Scheduling Theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 148-153, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
scheduling, real time, Codesign, codesign, hardware/software partitioning, target architecture |
25 | Kyung-soo Oh, Sang-yong Yoon, Soo-Ik Chae |
Emulator Environment Based on an FPGA Prototyping Board. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 72-77, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
virtual ware, FPGA, emulator |
25 | Vijay K. Jain |
Mapping a High-Speed Wireless Communication Function to the Reconfigurable J-Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 103-108, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Göran Eggers, Hans Christoph Zeidler |
Efficient Clock-Cycle Precise Simulation at Architecture Level in C++. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 222-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | David J. Greaves |
A Verilog to C Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 122-127, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Dirk Eilers, Alfred Voglgsang, Arnold Plankl, Gerri Körner, Helmut Steckenbiller, Rudi Knorr |
A Prototype of an AAL for High Bit Rate Real-Time Data Transmission System over ATM Networks Using a RSE CODEC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 109-114, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
RSE Reed Solomon Erasure, Video/Studio Data Transmission, ATM, FEC, AAL |
25 | Rajat Moona |
Processor Models for Retargetable Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 34-39, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Carsten Nitsch, Karlheinz Weiß, Thorsten Steckstor, Wolfgang Rosenstiel |
Embedded System Architecture Design Based on Real-Time Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 228-233, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Francisco Barat, Rudy Lauwereins |
Reconfigurable Instruction Set Processors: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 168-173, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
dynamically reconfigurable instruction set processor, reconfigurable functional unit, application specific instructions, reconfigurable computing |
25 | Martin Dimmler, Yves Piguet |
Intuitive Design of Complex Real-Time Control Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 52-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Juan de Vicente, Juan Lanchares, Román Hermida |
Adaptive FPGA Placement by Natural Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 188-193, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Combinatorial optimization, reconfigurable, placement |
25 | Johan Cockx |
Efficient Modeling of Preemption in a Virtual Prototype. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 14-19, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Modeling, C++, Virtual Prototype, Real-Time Operating System, Preemption |
25 | Ansgar Bredenfeld |
Integration and Evolution of Model-Based Tool Prototypes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 142-147, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Ulrich Mayer, Manfred Glesner |
Hardware Accelerated Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 214-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Myung-Hwan Park, Ki-Seok Bang, Jin-Young Choi, Inhye Kang |
Equivalence Checking of Two Statechart Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 46-51, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
ACSR, Weak equivalence, Formal verification, Statecharts |
25 | Kenneth B. Kent, Micaela Serra |
Hardware/Software Co-Design of a Java Virtual Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 66-71, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
fpga, partitioning, reconfigurable, java virtual machine, co-design |
25 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya |
Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 8-13, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Design Space Exploration, SDL, Hardware/Software Codesign, Performance Estimation, Multiprocessor Architectures |
25 | Yajun Ha, Patrick Schaumont, Marc Engels, Serge Vernalde, Freddy Potargent, Luc Rijnders, Hugo De Man |
A Hardware Virtual Machine for the Networked Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 194-199, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
FPGA, reconfiguration, computer architecture, placement and routing |
25 | Valentin Muresan, Xiaojun Wang 0001, Valentina Muresan, Mircea Vladutiu |
Power-Constrained Block-Test List Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 182-187, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Block-Test Scheduling, Tree-Growing Technique, Power Dissipation, List Scheduling |
25 | Dan Marius Regep, Fabrice Kordon |
Using MetaScribe to Prototype an UML to C++/Ada95 Code Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 128-133, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Meta-data description, Semantic transformation, Hypergenericity, Prototyping, Program generation |
25 | P. G. Prasad |
Validation of Link Layer Synthesizable Core - A Prototyping Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 208-213, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Lovic Gauthier, Ahmed Amine Jerraya |
Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 60-65, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
cycle-true, simulator, microcontroller |
25 | |
Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999 ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![IEEE Computer Society, 0-7695-0246-6 The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
25 | Fabiano Hessel, Philippe Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya |
Communication Interface Synthesis for Multilanguage Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999, pp. 15-20, 1999, IEEE Computer Society, 0-7695-0246-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Multilanguage Codesign, Interface Synthesis |
25 | Zineb Habbas, Francine Herrmann, Daniel Singer, Michaël Krajecki |
A Methodological Approach to Implement CSP on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999, pp. 66-, 1999, IEEE Computer Society, 0-7695-0246-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
25 | Frank-Michael Renner, Jürgen Becker 0001, Manfred Glesner |
Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999, pp. 108-113, 1999, IEEE Computer Society, 0-7695-0246-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
real-time em-bedded systems, architecture-precise prototyping, performance modeling, Hardware/software codesign, communication synthesis |
25 | Werner Erhard, Andreas Reinsch, Torsten Schober |
First Steps towards a Reconfigurable Asynchronous System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999, pp. 28-31, 1999, IEEE Computer Society, 0-7695-0246-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Petri nets, design methodology, asynchronous circuits, reconfigurable hardware |