Search results for "SIMD"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
21	Jing-Fu Jenq, Sartaj Sahni	Serial and Parallel Algorithms for the Medial Axis Transform.	IEEE Trans. Pattern Anal. Mach. Intell.	1992	DBLP DOI BibTeX RDF	area reporting problem, serial algorithm, CREW PRAM algorithm, SIMD hypercube parallel algorithm, perimeter reporting problem, parallel algorithms, parallel algorithms, computational complexity, image processing, transforms, hypercube networks, medial axis transform, hypercube algorithm
21	Sanjay Ranka, Sartaj Sahni	Clustering on a Hypercube Multicomputer.	IEEE Trans. Parallel Distributed Syst.	1991	DBLP DOI BibTeX RDF	square error, clustering problem, NMK processors, multiple-data, parallel algorithms, computational complexity, hypercube networks, single-instruction multiple-data, SIMD, MIMD, hypercube multicomputer, multiple-instruction
21	Philippe Saint-Marc, Jer-Sen Chen, Gérard G. Medioni	Adaptive Smoothing: A General Tool for Early Vision.	IEEE Trans. Pattern Anal. Mach. Intell.	1991	DBLP DOI BibTeX RDF	scale-space representation, pattern recognition, computer vision, computer vision, feature extraction, edge detection, computerised picture processing, computerised pattern recognition, parallel machine, SIMD, machine vision, filtering and prediction theory, adaptive filtering, adaptive filters, stereo matching, corner detection, anisotropic diffusion, Connection Machine, adaptive smoothing
21	Sanjay Ranka, Sartaj Sahni	Convolution on Mesh Connected Multicomputers.	IEEE Trans. Pattern Anal. Mach. Intell.	1990	DBLP DOI BibTeX RDF	SIMD meshes, efficient parallel algorithm, wraparound, MIMD meshes, convolution matrix, computational complexity, parallel processing, computerised picture processing, computerised picture processing, mesh connected multicomputers
21	Thor Bestul, Larry S. Davis	On Computing Complete Histograms of Images in Log (n) Steps Using Hypercubes.	IEEE Trans. Pattern Anal. Mach. Intell.	1989	DBLP DOI BibTeX RDF	computational complexity, parallel processing, parallel processing, computerised picture processing, computerised picture processing, SIMD, histograms, hypercube multiprocessor, gray-level
21	Allan L. Fisher, Peter T. Highnam	Computing the Hough Transform on a Scan Line Array Processor (Image Processing).	IEEE Trans. Pattern Anal. Mach. Intell.	1989	DBLP DOI BibTeX RDF	scan line array processor, parallel algorithm, parallel algorithms, image processing, transforms, computerised picture processing, computerised picture processing, SIMD, Hough transform, digital signal processing chips, linear arrays, vector processing
21	Hungwen Li, Massimo Maresca	Polymorphic-Torus Architecture for Computer Vision.	IEEE Trans. Pattern Anal. Mach. Intell.	1989	DBLP DOI BibTeX RDF	dynamically reconfigurable network, polymorphic-torus network, VLSI efficiency, computer vision, computer vision, parallel algorithms, VLSI, parallel architectures, parallel architectures, hypercube, tree, mesh, SIMD, machine vision, circuit switching, pyramid
21	Lorenz A. Schmitt, Stephen S. Wilson	The AIS-5000 Parallel Processor.	IEEE Trans. Pattern Anal. Mach. Intell.	1988	DBLP DOI BibTeX RDF	AIS-5000, parallel memory organization, image-based algorithms, computer vision, computer vision, parallel architecture, parallel architectures, computerised picture processing, computerised picture processing, microprocessor chips, parallel processor, SIMD architecture
21	O. A. Ogunyode	Parallel Algorithms for Approximate Edge Colouring of Simple graphs.	FSTTCS	1987	DBLP DOI BibTeX RDF	edge-colouring, algorithm: approximation, parallel, graphs, probabilistic, SIMD computer
16	Satnam Singh	Declarative data-parallel programming with the accelerator system.	DAMP	2010	DBLP DOI BibTeX RDF	data-parallelsim
16	Randy Smith, Neelam Goyal, Justin Ormont, Karthikeyan Sankaralingam, Cristian Estan	Evaluating GPUs for network packet signature matching.	ISPASS	2009	DBLP DOI BibTeX RDF
16	Hikmet Dursun, Ken-ichi Nomura, Liu Peng, Richard Seymour, Weiqiang Wang, Rajiv K. Kalia, Aiichiro Nakano, Priya Vashishta	A Multilevel Parallelization Framework for High-Order Stencil Computations.	Euro-Par	2009	DBLP DOI BibTeX RDF	single instruction multiple data parallelism, spatial decomposition, message passing, multithreading, Stencil computation
16	Wenbin Fang, Mian Lu, Xiangye Xiao, Bingsheng He, Qiong Luo 0001	Frequent itemset mining on graphics processors.	DaMoN	2009	DBLP DOI BibTeX RDF
16	Gregory M. Striemer, Ali Akoglu	Sequence alignment with GPU: Performance and design challenges.	IPDPS	2009	DBLP DOI BibTeX RDF
16	Patrick Longa, Ali Miri	Fast and Flexible Elliptic Curve Point Arithmetic over Prime Fields.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Parallel, Public key cryptosystems, High-Speed Arithmetic
16	Aqeel Mahesri, Daniel R. Johnson, Neal Clayton Crago, Sanjay J. Patel	Tradeoffs in designing accelerator architectures for visual computing.	MICRO	2008	DBLP DOI BibTeX RDF
16	Xing Fang, Dong Wang, Shuming Chen	SPVA: A novel digital signal processor architecture for Software Defined Radio.	AICCSA	2008	DBLP DOI BibTeX RDF
16	Robert D. Cameron, Kenneth S. Herdy, Dan Lin 0003	High performance XML parsing using parallel bit stream technology.	CASCON	2008	DBLP DOI BibTeX RDF
16	Tien-Tsin Wong, Chi-Sing Leung, Pheng-Ann Heng, Jianqing Wang	Discrete Wavelet Transform on Consumer-Level Graphics Hardware.	IEEE Trans. Multim.	2007	DBLP DOI BibTeX RDF
16	Weihua Zhang, Tao Bao, Binyu Zang, Chuanqi Zhu	Optimizing Bandwidth Constraint through Register Interconnection for Stream Processors.	PACT	2007	DBLP DOI BibTeX RDF
16	Cyprian Grassmann, Mathias Richter, Mirko Sauermann	Mapping the physical layer of radio standards to multiprocessor architectures.	DATE	2007	DBLP DOI BibTeX RDF
16	Eric Fontaine, Hsien-Hsin S. Lee	Optimizing Katsevich image reconstruction algorithm on multicore processors.	ICPADS	2007	DBLP DOI BibTeX RDF
16	Hyojin Choi, Wonchul Lee, Wonyong Sung	Memory Access Reduced Software Implementation of H.264/AVC Sub-pixel Motion Estimation Using Differential Data Encoding.	ISCAS	2007	DBLP DOI BibTeX RDF
16	Robert A. Tefft, Roger Y. Lee	Reduction of Complexity and Automation of Parallel Execution through Loop Level Parallelism.	QSIC	2007	DBLP DOI BibTeX RDF
16	Theodore Kim, Mark Carlson	A simple boiling module.	Symposium on Computer Animation	2007	DBLP DOI BibTeX RDF
16	Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vetter	Balancing productivity and performance on the cell broadband engine.	CLUSTER	2007	DBLP DOI BibTeX RDF
16	Kyoko Iwasawa, Alan Mycroft	Choosing Method of the Most Effective Nested Loop Shearing for Parallelism.	PDCAT	2007	DBLP DOI BibTeX RDF
16	Marius Bonaciu, Aimen Bouchhima, Mohamed-Wassim Youssef, Xi Chen, Wander O. Cesário, Ahmed Amine Jerraya	High-level architecture exploration for MPEG4 encoder with custom parameters.	ASP-DAC	2006	DBLP DOI BibTeX RDF	multiprocessors SOC architecture, customization, video encoder, architecture exploration, MPEG4
16	Zhentao Li, Shuming Chen, Zhao-Liang Li, Conghua Lei	The Algorithm and Circuit Design of a 400MHz 16-Bit Hybrid Multiplier.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF
16	Isabelle Hurbain, Corinne Ancourt, François Irigoin, Michel Barreteau, Nicolas Museux, Frederic Pasquier	A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
16	Heiko Falk, Jens Wagner, André Schaefer	Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization.	ESTIMedia	2006	DBLP DOI BibTeX RDF
16	Friman Sánchez, Esther Salamí, Alex Ramírez, Mateo Valero	Performance Analysis of Sequence Alignment Applications.	IISWC	2006	DBLP DOI BibTeX RDF
16	Zheng Shen, Hu He 0001, Yanjun Zhang, Yihe Sun	VS-ISA: A Video Specific Instruction Set Architecture for ASIP Design.	IIH-MSP	2006	DBLP DOI BibTeX RDF
16	Yuan Lin 0002, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner	SODA: A Low-power Architecture For Software Radio.	ISCA	2006	DBLP DOI BibTeX RDF
16	Pablo Robelly, Arne Lehmann, Gerhard P. Fettweis	Two-Dimensional Fast Cosine Transform for Vector-STA Architectures.	SAMOS	2005	DBLP DOI BibTeX RDF
16	Jung Ho Ahn, Mattan Erez, William J. Dally	Scatter-Add in Data Parallel Architectures.	HPCA	2005	DBLP DOI BibTeX RDF
16	Silvia M. Müller, Christian Jacobi 0002, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong	The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
16	Reza Farivar 0003, Mahdi Fazeli, Hamid Sarbazi-Azad	A Cordic-Based Processor Extension for Scalar and Vector Processing.	IPDPS	2005	DBLP DOI BibTeX RDF
16	Stefania Perri, Pasquale Corsonello, Maria Antonia Iachino, Marco Lanuzza, Giuseppe Cocorullo	Variable precision arithmetic circuits for FPGA-based multimedia processors.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
16	Dan Page, Nigel P. Smart	Parallel Cryptographic Arithmetic Using a Redundant Montgomery Representation.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	parallel and vector implementations, performance measures, Public key cryptosystems, algorithm design and analysis
16	Antonio Gentile, D. Scott Wills	Portable Video Supercomputing.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF
16	Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis	Generated DSP Cores for Implementation of an OFDM Communication System.	SAMOS	2004	DBLP DOI BibTeX RDF
16	Yu-Fai Fung, Muhammet Fikret Ercan, Wai-leung Cheung, Gujit Singh	Avenues for High Performance Computation on a PC.	ICCSA (2)	2004	DBLP DOI BibTeX RDF
16	Daniel Etiemble, Lionel Lacassagne	16-Bit FP Sub-Word Parallelism to Facilitate Compiler Vectorization and Improve Performance of Image and Media Processing.	ICPP	2004	DBLP DOI BibTeX RDF
16	Muhammet Fikret Ercan, Yu-Fai Fung, Tin-Kin Ho, Wai-leung Cheung	Parallel Linear System Solution and Its Application to Railway Power Network Simulation.	Euro-Par	2003	DBLP DOI BibTeX RDF
16	Kang-Sun Choi, Jae-Young Pyun, Nam-Hyeong Kim, Byeong-Doo Choi, Sung-Jea Ko	Real-Time Inspection System for Printed Circuit Boards.	DAGM-Symposium	2003	DBLP DOI BibTeX RDF
16	Daniel Etiemble	Numerical Applications and Sub-Word Parallelism: The NAS Benchmarks on a Pentium 4.	HPCS	2002	DBLP DOI BibTeX RDF
16	Leo Chin Sim, Graham Leedham, Heiko Schröder 0001	Performance evaluation of instruction systolic array processors.	ICARCV	2002	DBLP DOI BibTeX RDF
16	Mingxian Jin, Johnnie W. Baker, Will C. Meilander	The Power of SIMDs in Real-Time Scheduling.	IPDPS	2002	DBLP DOI BibTeX RDF
16	Aart J. C. Bik, Milind Girkar, Paul M. Grey, Xinmin Tian	Automatic Detection of Saturation and Clipping Idioms.	LCPC	2002	DBLP DOI BibTeX RDF
16	Alex Pajuelo, Antonio González 0001, Mateo Valero	Speculative Dynamic Vectorization.	ISCA	2002	DBLP DOI BibTeX RDF	Speculative dynamic vectorization, wide buses, speculative data computation, control independence, vector instructions
16	Kosuke Yoshioka, Hiroyuki Oka, Hideshi Nishida, Ryuji Matsuura, Tokuzo Kiyohara	An architectural extension to the media core processor for HDTV applications.	APCCAS (1)	2002	DBLP DOI BibTeX RDF
16	Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin	The design of the MGAP-2: a micro-grained massively parallel array.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
16	Samuel Larsen, Saman P. Amarasinghe	Exploiting superword level parallelism with multimedia instruction sets.	PLDI	2000	DBLP DOI BibTeX RDF
16	Jesús Corbal, Roger Espasa, Mateo Valero	Exploiting a New Level of DLP in Multimedia Applications.	MICRO	1999	DBLP DOI BibTeX RDF
16	Marco Ferretti, Davide Rizzo	Multimedia Extensions and Sub-word Parallelism in Image Processing: Preliminary Results.	Euro-Par	1999	DBLP DOI BibTeX RDF
16	Teruhiko Kamigata, Koso Murakami, Makoto Iwata, Hiroaki Terada	Proposal of Data-Driven Processor Architecture Qv-K1.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
16	Hong Shen 0001	Efficient parallel multiselection on hypercubes.	ISPAN	1997	DBLP DOI BibTeX RDF	parallel multiselection, optimal EREW algorithm, parallel algorithms, parallel algorithms, hypercubes
16	Krishnan Kumaran, Boris D. Lubachevsky, Anwar Elwalid	Massively Parallel Simulations of ATM Systems.	Workshop on Parallel and Distributed Simulation	1996	DBLP DOI BibTeX RDF	replica-parallel, time-parallel, markov sources, random sampling, order statistics, parallel prefix
16	Myung Hoon Sunwoo, J. K. Aggarwal	A Sliding Memory Plane Array Processor.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	sliding memory, plane array processor, mesh-connected, single-input multiple-data, SliM, image processing, image processing, parallel architectures
16	K. Wojtek Przytula, Viktor K. Prasanna, Wei-Ming Lin	Parallel implementation of neural networks.	J. VLSI Signal Process.	1992	DBLP DOI BibTeX RDF
16	Hassane Essafi, Marc Pic, Didier Juvin	kappa-Project - First Step: To Improve Data Manipualtions and Representations on Parallel Computers.	CONPAR	1992	DBLP DOI BibTeX RDF
16	Vyacheslav B. Muchnick, Alexander V. Shafarenko	F-Code: A Portable Software Platform for Data-Parallel Languages.	CONPAR	1992	DBLP DOI BibTeX RDF
16	Mohamed S. Baig, Tarek A. El-Ghazawi, Nikitas A. Alexandridis	Mixed-Mode Multicomputers with Load Adaptability.	PARLE	1992	DBLP DOI BibTeX RDF
16	R. M. Lea	WASP: A WSI Associative String Processor.	J. VLSI Signal Process.	1991	DBLP DOI BibTeX RDF
16	James B. Armstrong, Mark A. Nichols, Howard Jay Siegel, Leah H. Jamieson	Examining the effects of CU/PE overlap and synchronization overhead when using the complete sums approach to image correlation.	SPDP	1991	DBLP DOI BibTeX RDF
16	John L. Gustafson	Reevaluating Amdahl's Law.	Commun. ACM	1988	DBLP DOI BibTeX RDF
16	Roger Olmstead	Compilers and parallel architectures (abstract only): sequential to parallel mapping strategies.	ACM Conference on Computer Science	1987	DBLP DOI BibTeX RDF
13	Yonghua Hu, Wei Liang, Anxing Xie, Huifu Zhang, Huixiang Li	Investigation on the optimisation of Cholesky decomposition algorithm based on SIMD-DSP.	Int. J. Comput. Sci. Eng.	2024	DBLP DOI BibTeX RDF
13	Huixiang Li, Huifu Zhang, Anxing Xie, Yonghua Hu, Wei Liang	Investigation on the optimisation of Cholesky decomposition algorithm based on SIMD-DSP.	Int. J. Comput. Sci. Eng.	2024	DBLP DOI BibTeX RDF
13	Dheya Mustafa, Ruba Alkhasawneh, Fadi Obeidat, Ahmed S. Shatnawi	MIMD Programs Execution Support on SIMD Machines: A Holistic Survey.	IEEE Access	2024	DBLP DOI BibTeX RDF
13	Yuki Naganawa, Hirokazu Kamei, Yamato Kanetaka, Haruki Nogami, Yoshihiro Maeda, Norishige Fukushima	SIMD-Constrained Lookup Table for Accelerating Variable-Weighted Convolution on x86/64 CPUs.	IEEE Access	2024	DBLP DOI BibTeX RDF
13	Yue Yu, Zhe Zhao, Sian-Jheng Lin, Weihai Li	Accelerating Huffman Encoding Using 512-Bit SIMD Instructions.	IEEE Trans. Consumer Electron.	2024	DBLP DOI BibTeX RDF
13	Cyrus Zhou, Zack Hassman, Dhirpal Shah, Vaughn Richard, Yanjing Li	YFlows: Systematic Dataflow Exploration and Code Generation for Efficient Neural Network Inference using SIMD Architectures on CPUs.	CC	2024	DBLP DOI BibTeX RDF
13	Johannes Pietrzyk, Alexander Krause, Christian Faerber, Dirk Habich, Wolfgang Lehner	Program your (custom) SIMD instruction set on FPGA in C++.	CIDR	2024	DBLP BibTeX RDF
13	Shrey Pandey, Saikat Kumar Das, Hrishikesh V. Ganu, Satyajeet Singh	Rethinking 'Complement' Recommendations at Scale with SIMD.	ICPE	2024	DBLP DOI BibTeX RDF
13	Haotian Zhai, Bernd-Peter Paris	Accurate and Efficient Implementations of Recursive Filtering based on SIMD and Cascaded Form.	CCWC	2024	DBLP DOI BibTeX RDF
13	Juliana Hildebrandt, Johannes Pietrzyk, Alexander Krause, Dirk Habich, Wolfgang Lehner	Partition-based SIMD Processing and its Application to Columnar Database Systems.	Datenbank-Spektrum	2023	DBLP DOI BibTeX RDF
13	Kaushik Ravichandran 0002, Akshara Subramaniasivam, P. S. Aishwarya, N. S. Kumar	Chapter Eight - Fast exact triangle counting in large graphs using SIMD acceleration.	Adv. Comput.	2023	DBLP DOI BibTeX RDF
13	Ramazan Duvar, Ayhan Küçükmanisa, Orhan Akbulut, Aysun Tasyapi Çelebi, Oguzhan Urhan	SIMD-based low bit-depth motion estimation with application to HEVC.	Signal Image Video Process.	2023	DBLP DOI BibTeX RDF
13	Jianda Wang, Zhen Wang, Yang Hu 0001	Towards an Efficient SIMD Virtual Radio Access Network (vRAN) and Edge Cloud System.	IEEE Trans. Cloud Comput.	2023	DBLP DOI BibTeX RDF
13	Ekaterina O. Rybakova, Anton Trusov, Elena Limonova, Natalya S. Skoryukina, Konstantin B. Bulatov, Dmitry P. Nikolaev	PESAC, the Generalized Framework for RANSAC-Based Methods on SIMD Computing Platforms.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Martin Joachim Kühn, Johannes Holke, Annette Lutz, Jonas Thies, Melven Röhrig-Zöllner, Alexander Bleh, Jan Backhaus, Achim Basermann	SIMD vectorization for simultaneous solution of locally varying linear systems with multiple right-hand sides.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
13	Saeedeh Jahanshahi, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi	uLog: a software-based approximate logarithmic number system for computations on SIMD processors.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
13	Se Hee Lee, Heewon Kye	Efficient MIP volume rendering via fast SIMD interpolation and memory access reordering.	Multim. Tools Appl.	2023	DBLP DOI BibTeX RDF
13	Xianduo Li, Xiaoli Gong, Dong Wang 0040, Jin Zhang 0003, Thar Baker, Jin Zhou, Tingjuan Lu	ABM-SpConv-SIMD: Accelerating Convolutional Neural Network Inference for Industrial IoT Applications on Edge Devices.	IEEE Trans. Netw. Sci. Eng.	2023	DBLP DOI BibTeX RDF
13	Stephen Timcheck, Jeremy Buhler	Interruptible Nodes: Reducing Queueing Costs in Irregular Streaming Dataflow Applications on Wide-SIMD Architectures.	Int. J. Parallel Program.	2023	DBLP DOI BibTeX RDF
13	Zhuo Su 0005, Dongyan Wang, Zehong Yu, Yixiao Yang, Yu Jiang 0001, Rui Wang 0024, Wanli Chang 0001, Wen Li, Aiguo Cui, Jia-Guang Sun 0001	PHCG: Optimizing Simulink Code Generation for Embedded System With SIMD Instructions.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
13	Chen Yin, Naifeng Jing, Jianfei Jiang 0001, Qin Wang 0009, Zhigang Mao	A Reschedulable Dataflow-SIMD Execution for Increased Utilization in CGRA Cross-Domain Acceleration.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
13	Daniel Liu, Martin Steinegger	Block Aligner: an adaptive SIMD-accelerated aligner for sequences and position-specific scoring matrices.	Bioinform.	2023	DBLP DOI BibTeX RDF
13	Chun-Chieh Yang, Yi-Ru Chen, Hui-Hsin Liao, Yuan-Ming Chang, Jenq-Kuen Lee	Auto-tuning Fixed-point Precision with TVM on RISC-V Packed SIMD Extension.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
13	Wangda Zhang, Yanbin Wang, Kenneth A. Ross	Parallel Prefix Sum with SIMD.	CoRR	2023	DBLP DOI BibTeX RDF
13	Zhengyang Liu 0003, Stefan Mada, John Regehr	Minotaur: A SIMD-Oriented Synthesizing Superoptimizer.	CoRR	2023	DBLP DOI BibTeX RDF
13	Shuai Lu, Jun Chu, Xu T. Liu	Im2win: Memory Efficient Convolution On SIMD Architectures.	CoRR	2023	DBLP DOI BibTeX RDF
13	Ju-Hung Li, Jhih-Kuan Lin, Yung-Cheng Su, Chi-Wei Chu, Lai-Tak Kuok, Hung-Ming Lai, Chao-Lin Lee, Jenq-Kuen Lee	SIMD Everywhere Optimization from ARM NEON to RISC-V Vector Extensions.	CoRR	2023	DBLP DOI BibTeX RDF
13	Yeasir Rayhan, Walid G. Aref	SIMD-ified R-tree Query Processing and Optimization.	CoRR	2023	DBLP DOI BibTeX RDF
13	Pengchang Ren, Reiji Suda, Vorapong Suppakitpaisarn	Efficient Additions and Montgomery Reductions of Large Integers for SIMD.	CoRR	2023	DBLP DOI BibTeX RDF
13	Sungho Shin, François Pacaud, Mihai Anitescu	Accelerating Optimal Power Flow with GPUs: SIMD Abstraction of Nonlinear Programs and Condensed-Space Interior-Point Methods.	CoRR	2023	DBLP DOI BibTeX RDF
13	Cyrus Zhou, Zack Hassman, Ruize Xu, Dhirpal Shah, Vaughn Richard, Yanjing Li	SIMD Dataflow Co-optimization for Efficient Neural Networks Inferences on CPUs.	CoRR	2023	DBLP DOI BibTeX RDF
13	Fabio Cannizzo	VMT19937: A SIMD-Friendly Pseudo Random Number Generator based on Mersenne Twister 19937.	CoRR	2023	DBLP DOI BibTeX RDF