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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3406 occurrences of 1738 keywords
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Results
Found 5152 publication records. Showing 5152 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
17 | Sid Ahmed Ali Touati, Christine Eisenbeis |
Early Control of Register Pressure for Software Pipelined Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CC ![In: Compiler Construction, 12th International Conference, CC 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings, pp. 17-32, 2003, Springer, 3-540-00904-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | David E. Singh, María J. Martín, Francisco F. Rivera |
Increasing the Parallelism of Irregular Loops with Dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 287-296, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Volodymyr Beletskyy |
Finding Synchronization-Free Parallelism for Non-uniform Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2003, International Conference, Melbourne, Australia and St. Petersburg, Russia, June 2-4, 2003. Proceedings, Part II, pp. 925-934, 2003, Springer, 3-540-40195-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Daniel J. Quinlan, Markus Schordan, Qing Yi, Bronis R. de Supinski |
Semantic-Driven Parallelization of Loops Operating on User-Defined Containers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 16th International Workshop, LCPC 2003, College Station, TX, USA, October 2-4, 2003, Revised Papers, pp. 524-538, 2003, Springer, 3-540-21199-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Youtao Zhang, Jun Yang 0002 |
Procedural Level Address Offset Assignment of DSP Applications with Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 32nd International Conference on Parallel Processing (ICPP 2003), 6-9 October 2003, Kaohsiung, Taiwan, pp. 21-28, 2003, IEEE Computer Society, 0-7695-2017-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Matthieu Martel |
Improving the Static Analysis of Loops by Dynamic Partitioning Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCAM ![In: 3rd IEEE International Workshop on Source Code Analysis and Manipulation (SCAM 2003), 26-27 September 2003, Amsterdam, The Netherlands, pp. 13-21, 2003, IEEE Computer Society, 0-7695-2005-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Narasimhan Ramasubramanian, Ram Subramanian, Santosh Pande |
Automatic Compilation of Loops to Exploit Operator Parallelism on Configurable Arithmetic Logic Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 13(1), pp. 45-66, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
operator parallelism, FPGAs, parallel computing, Compilers, loop transformation, reconfigurable systems |
17 | G. Ramalingam |
On loops, dominators, and dominance frontiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 24(5), pp. 455-490, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
irreducible graph, iterated dominance frontier, least common ancestor, loop nesting forest, sparse evaluation, graph transformation, Dominator, loop |
17 | Ioannis Drositis, Theodore Andronikos, George Manis, George K. Papakonstantinou, Nectarios Koziris |
Geometric Scheduling of 2-D UET-UCT Uniform Dependence Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 10th Euromicro Workshop on Parallel, Distributed and Network-Based Processing (PDP 2002), 9-11 January 2002, Canary Islands, Spain, pp. 343-, 2002, IEEE Computer Society, 0-7695-1444-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
UET-UCT loop scheduling |
17 | Francisco Cardells-Tormo, Javier Valls-Coquillat, Vicenc Almenar-Terre, Vicente Torres-Carot |
Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 102-111, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | María J. Martín, David E. Singh, Juan Touriño, Francisco F. Rivera |
Improving Locality in the Parallelization of Doacross Loops (Research Note). ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference Paderborn, Germany, August 27-30, 2002, Proceedings, pp. 275-279, 2002, Springer, 3-540-44049-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Gayathri Krishnamurthy, Elana D. Granston, Eric Stotzer |
Affinity-based cluster assignment for unrolled loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 107-116, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
affinity-based clustering (ABC) algorithms, homogeneous clusters, partitioned register files, software pipelining, loop optimizations, loop scheduling, VLIW architectures, loop unrolling, cluster assignment |
17 | Volodymyr Beletskyy, R. Drazkowski, Marcin Liersz |
An Approach to Parallelizing Non-Uniform Loops with the Omega Calculator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 119-122, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
non-uniform dependences, Presburger formulas, loop parallelization |
17 | Chi Ta Wu, TingTing Hwang |
Instruction buffering for nested loops in low power design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 81-84, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Andrey V. Mezhiba, Eby G. Friedman |
Properties of on-chip inductive current loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002, pp. 12-17, 2002, ACM, 1-58113-462-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
loop inductance, inductance, inductive coupling |
17 | Tian Xia, Jien-Chung Lo |
On-Chip Jitter Measurement for Phase Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings, pp. 399-407, 2002, IEEE Computer Society, 0-7695-1831-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Geoffrey Canright |
Ants and Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ant Algorithms ![In: Ant Algorithms, Third International Workshop, ANTS 2002, Brussels, Belgium, September 12-14, 2002, Proceedings, pp. 235-242, 2002, Springer, 3-540-44146-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Maria Athanasaki, Aristidis Sotiropoulos, Georgios Tsoukalas, Nectarios Koziris |
Pipelined scheduling of tiled nested loops onto clusters of SMPs using memory mapped network interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, USA, November 16-22, 2002, CD-ROM, pp. 41:1-41:13, 2002, IEEE Computer Society, 0-7695-1524-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
memory mapped network interfaces, tile grouping, SMPs, DMA, pipelined schedules, communication overlapping |
17 | Nicholas G. Hall, Chelliah Sriskandarajah, Tharmarajah Ganesharajah |
Operational Decisions in AGV-Served Flowshop Loops: Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 107(1-4), pp. 161-188, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
scheduling, heuristics, manufacturing, automated guided vehicles |
17 | G. X. Tyson, M. Smelyanskyi, Edward S. Davidson |
Evaluating the Use of Register Queues in Software Pipelined Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(8), pp. 769-783, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
modulo variable expansion, rotating register file, register queues, register connection, Software pipelining, VLIW |
17 | André Stauffer, Moshe Sipper |
Externally Controllable and Destructible Self-Replicating Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECAL ![In: Advances in Artificial Life, 6th European Conference, ECAL 2001, Prague, Czech Republic, September 10-14, 2001, Proceedings, pp. 282-291, 2001, Springer, 3-540-42567-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Tom Egan, Samiha Mourad |
Verification of Embedded Phase-Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA, pp. 290-295, 2001, IEEE Computer Society, 0-7695-1025-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Uma Mahadevan, Kevin Nomura, Roy Dz-Ching Ju, Rick Hank |
Applying Data Speculation in Modulo Scheduled Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 169-178, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Alain Darte, Georges-André Silber |
Temporary Arrays for Distribution of Loops with Control Dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference, Munich, Germany, August 29 - September 1, 2000, Proceedings., pp. 357-367, 2000, Springer, 3-540-67956-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Qing Yi, Vikram S. Adve, Ken Kennedy |
Transforming loops to recursion for multi-level memory hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2000 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Vancouver, Britith Columbia, Canada, June 18-21, 2000, pp. 169-181, 2000, ACM, 1-58113-199-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Pranav Ashar, Anand Raghunathan, Aarti Gupta, Subhrajit Bhattacharya |
Verification of Scheduling in the Presence of Loops Using Uninterpreted Symbolic Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 458-466, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Yonghong Song, Zhiyuan Li 0001 |
A Compiler Framework for Tiling Imperfectly-Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 12th International Workshop, LCPC'99, La Jolla/San Diego, CA, USA, August 4-6, 1999, Proceedings, pp. 185-200, 1999, Springer, 3-540-67858-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Lizhong Sun, Tad A. Kwasniewski, Kris Iniewski |
A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 176-179, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Antti Mäntyniemi, Timo Rahkonen, Juha Kostamovaara |
A high resolution digital CMOS time-to-digital converter based on nested delay locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 537-540, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Edward Mutafungwa, Kamugisha Kazaura |
Assessing Opportunities for Broadband Optical Wireless Local Loops in an Unbundled Access Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MDA ![In: Mobile Data Access, First International Conference, MDA'99, Hong Kong, China, December 16-17, 1999, Proceedings, pp. 34-44, 1999, Springer, 3-540-66878-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Abhijit Ghosh, Sandeep K. Lodha, Ranga Vemuri |
Hierarchical Scheduling in High Level Synthesis Using Resource Sharing Across Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 140-143, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Nihal J. Godambe, C.-J. Richard Shi |
Behavioral Level Noise Modeling and Jitter Simulation of Phase-Locked Loops with Faults Using VHDL-AMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 13(1), pp. 7-17, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
behavioral fault modeling, noise, fault modeling, fault simulation, jitter, analog test |
17 | Pierre Boulet, Paul Feautrier |
Scanning Polyhedra without Do-loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, Paris, France, October 12-18, 1998, pp. 4-11, 1998, IEEE Computer Society, 0-8186-8591-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
PIP, polyheron scanning, linearly bounded lattices, code generation, integer programming, Automatic parallelization |
17 | Burghard von Karger |
A Proof Rule for Control Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MPC ![In: Mathematics of Program Construction, MPC'98, Marstrand, Sweden, June 15-17, 1998, Proceedings, pp. 7-22, 1998, Springer, 3-540-64591-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Kiran Bondalapati, Viktor K. Prasanna |
Mapping Loops onto Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings, pp. 268-277, 1998, Springer, 3-540-64948-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Denis Hommais, Frédéric Pétrot |
Efficient Combinational Loops Handling for Cycle Precise Simulation of System on a Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 24th EUROMICRO '98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden, pp. 10051-10054, 1998, IEEE Computer Society, 0-8186-8646-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Benoît R. Veillette, Gordon W. Roberts |
Stimulus generation for built-in self-test of charge-pump phase-locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 698-707, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Michelle Mills Strout, Larry Carter, Jeanne Ferrante, Beth Simon |
Schedule-Independent Storage Mapping for Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 24-33, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Gao Nianshu, Zhaoqing Zhang, Ruliang Qiao |
Precise Dependence Test for Scalar within Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APDC ![In: Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), March 19-21, 1997, Shanghai, China, pp. 356-361, 1997, IEEE Computer Society, 0-8186-7876-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Martin Beaudry, François Lemieux, Denis Thérien |
Finite Loops Recognize Exactly the Regular Open Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 24th International Colloquium, ICALP'97, Bologna, Italy, 7-11 July 1997, Proceedings, pp. 110-120, 1997, Springer, 3-540-63165-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Radu Calinescu |
A BSP Approach to the Scheduling of Tightly-Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 549-553, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Cheng-Zhong Xu 0001, Vipin Chaudhary |
Time-Stamping Algorithms for Parallelization of Loops at Run-Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 443-450, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Chul-Kwon Cho, Mann-Ho Lee |
A Loop Parallelization Method for Nested Loops with Non-uniform Dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 314-321, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske |
Low Power Design of FSMs by State Assignment and Disabling Self-Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 323-330, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
FSM synthesis, encoding constraints, low power design, clock gating, state assignment |
17 | Chun Gong, Rami G. Melhem, Rajiv Gupta 0001 |
Loop Transformations for Fault Detection in Regular Loops on Massively Parallel Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(12), pp. 1238-1249, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Compiler-assisted approach, duplicating execution, execution pattern, fault detection, distributed-memory systems, loop transformation, data dependence analysis |
17 | Alain Darte, Frédéric Vivien |
On the Optimality of Allen and Kennedy's Algorithm for Parallel Extraction in Nested Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. I ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume I, pp. 379-388, 1996, Springer, 3-540-61626-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Martin Griebl, Christian Lengauer |
Classifying Loops for Space-Time Mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. I ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume I, pp. 467-474, 1996, Springer, 3-540-61626-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Shih-Hung Kao, Chao-Tung Yang, Shian-Shyong Tseng |
Run-Time Parallelization for Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 29th Annual Hawaii International Conference on System Sciences (HICSS-29), January 3-6, 1996, Maui, Hawaii, USA, pp. 233-242, 1996, IEEE Computer Society, 0-8186-7324-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Christine Fricker, Olivier Temam, William Jalby |
Influence of Cross-Interferences on Blocked Loops: A Case Study with Matric-Vector Multiply ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 17(4), pp. 561-575, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
cache conflicts (interferences), data locality optimization, blocking, cache performance, numerical codes |
17 | Steve Carr 0001, Ken Kennedy |
Improving the Ratio of Memory Operations to Floating-Point Operations in Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 16(6), pp. 1768-1810, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
unroll-and-jam, balance |
17 | B. Ramakrishna Rau |
Iterative modulo scheduling: an algorithm for software pipelining loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30 - December 2, 1994, pp. 63-74, 1994, ACM / IEEE Computer Society, 0-89791-707-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
software pipelining, instruction scheduling, modulo scheduling, loop scheduling |
17 | Martin Griebl, Christian Lengauer |
On Scanning Space-Time Mapped While Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONPAR ![In: Parallel Processing: CONPAR 94 - VAPP VI, Third Joint International Conference on Vector and Parallel Processing, Linz, Austria, September 6-8, 1994, Proceedings, pp. 677-688, 1994, Springer, 3-540-58430-7. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
while loop, parallelizing compilation, loop parallelization, space-time mapping |
17 | Yeong-Sheng Chen, Sheng-De Wang, Chien-Min Wang |
Compiler techniques for maximizing fine-grain and coarse-grain parallelism in loops with uniform dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994, pp. 204-213, 1994, ACM, 0-89791-665-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Takashi Matsumoto 0002, Kei Hiraki |
Dynamic Switching of Coherent Cache Protocols and its Effects on Doacross Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 7th international conference on Supercomputing, ICS 1993, Tokyo, Japan, July 20-22, 1993, pp. 328-337, 1993, ACM, 0-89791-600-X. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
17 | John F. Beetem |
Hierarchical topological sorting of apparent loops via partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(5), pp. 607-619, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
17 | David E. Hudak, Santosh G. Abraham |
Compiler techniques for data partitioning of sequentially iterated parallel loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 4th international conference on Supercomputing, ICS 1990, Amsterdam, The Netherlands, June 11-15, 1990, pp. 187-200, 1990, ACM, 0-89791-369-8. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
17 | David C. Cann, John Feo |
SISAL versus FORTRAN: a comparison using the Livermore loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, pp. 626-636, 1990, IEEE Computer Society, 0-89791-412-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
FORTRAN, SISAL |
17 | Jyh-Herng Chow, Williams Ludwell Harrison III |
Switch-stacks: a scheme for microtasking nested parallel loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, pp. 190-199, 1990, IEEE Computer Society, 0-89791-412-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
17 | Joseph de Kerf |
A note on the Power Operators "loops are harmful". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGPLAN Notices ![In: ACM SIGPLAN Notices 24(11), pp. 102-108, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
17 | Jesús Labarta, Eduard Ayguadé |
GTS: Extracting Full Parallelism Out of DO Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE (2) ![In: PARLE '89: Parallel Architectures and Languages Europe, Volume II: Parallel Languages, Eindhoven, The Netherlands, June 12-16, 1989, Proceedings, pp. 43-54, 1989, Springer, 3-540-51285-3. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
17 | Claire Hanen |
Optimizing microprograms for recurrent loops on pipelined architectures using timed Petri nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
European Workshop on Applications and Theory in Petri Nets ![In: Advances in Petri Nets 1989, covers the 9th European Workshop on Applications and Theory in Petri Nets, held in Venice, Italy in June 1988, selected papers, pp. 236-261, 1988, Springer, 3-540-52494-0. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
Key-words Timed Petri nets, software pipelining, cyclic scheduling |
17 | Claire Hanen |
Optimizing horizontal microprograms for vectorial loops with timed petri nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 2nd international conference on Supercomputing, ICS 1988, Saint Malo, France, July 4-8, 1988, pp. 466-477, 1988, ACM, 0-89791-272-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
17 | Kemal Ebcioglu |
A compilation technique for software pipelining of loops with conditional jumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987, Colorado Springs, Colorado, USA, December 1-4, 1987, pp. 69-79, 1987, ACM/IEEE, 0-89791-250-0. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
17 | Jialu Huang, Arun Raman, Thomas B. Jablin, Yun Zhang 0005, Tzu-Han Hung, David I. August |
Decoupled software pipelining creates parallelization opportunities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010, pp. 121-130, 2010, ACM, 978-1-60558-635-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DSWP, enabling transformation, parallelization, multicore, speculation |
17 | Sumit Gulwani, Florian Zuleger |
The reachability-bound problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2010 ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2010, Toronto, Ontario, Canada, June 5-10, 2010, pp. 292-304, 2010, ACM, 978-1-4503-0019-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
disjunctive invariants, resource bound analysis, pattern matching, transitive closure, ranking functions |
17 | Mohammad Ali Ghodrat, Tony Givargis |
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 203-210, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
algorithmic loop transformation, compiler optimization for low power, dynamic voltage/frequency scaling |
17 | Gábor Rétvári, Felician Németh, Ranganai Chaparadza, Róbert Szabó |
OSPF for Implementing Self-adaptive Routing in Autonomic Networks: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MACE ![In: Modelling Autonomic Communications Environments, Fourth IEEE International Workshop, MACE 2009, Venice, Italy, October 26-27, 2009. Proceedings, pp. 72-85, 2009, Springer, 978-3-642-05005-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Autonomic/Self-managing Networks, autonomic routing functionality, self-adaptation, OSPF |
17 | Kieron Turkington, Turkington A. Constantinides, Kostas Masselos, Peter Y. K. Cheung |
Outer Loop Pipelining for Application Specific Datapaths in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(10), pp. 1268-1280, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Yasumi Kawamura, Md. Shahidul Islam, Yoichi Sumi |
A strategy of automatic hexahedral mesh generation by using an improved whisker-weaving method with a surface mesh modification procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eng. Comput. ![In: Eng. Comput. 24(3), pp. 215-229, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Hexahedral mesh generation, Surface mesh modification, Whisker-weaving, Sheet loop, Self-intersection |
17 | Diego R. Llanos Ferraris, David Orden, Belén Palop |
Just-In-Time Scheduling for Loop-based Speculative Parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 16th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2008), 13-15 February 2008, Toulouse, France, pp. 334-342, 2008, IEEE Computer Society, 978-0-7695-3089-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
loop-based speculation, scheduling, speculative multithreading, Speculative parallelization |
17 | Alain Ketterlin, Philippe Clauss |
Prediction and trace compression of data access addresses through nested loop recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Sixth International Symposium on Code Generation and Optimization (CGO 2008), April 5-9, 2008, Boston, MA, USA, pp. 94-103, 2008, ACM, 978-1-59593-978-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
nested loop recognition, value prediction, data access, trace analysis, trace compression |
17 | Paul Lokuciejewski, Heiko Falk, Peter Marwedel, Henrik Theiling |
WCET-driven, code-size critical procedure cloning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Proceedings of the 11th International Workshop on Software and Compilers for Embedded Systems, Munich, Germany, March 13-14, 2008, pp. 21-30, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Aldo Balestrino, Emanuele Crisostomi, Alberto Landi, Alessandro Menicagli |
ARGA loop pairing criteria for multivariable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC ![In: Proceedings of the 47th IEEE Conference on Decision and Control, CDC 2008, December 9-11, 2008, Cancún, Mexico, pp. 5668-5673, 2008, IEEE, 978-1-4244-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Ward Douglas Maurer |
Removing backward go-to statements from Ada programs: possibilities and problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGAda ![In: Proceedings of the 2008 Annual ACM SIGAda International Conference on Ada, Portland, OR, USA, October 26-30, 2008, pp. 105-108, 2008, ACM, 978-1-60558-274-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ada compilers, go-to statements, loop trees, directed graphs |
17 | Navodaya Garepalli, Kartik Gopalan, Ping Yang 0002 |
Control Message Reduction Techniques in Backward Learning Ad Hoc Routing Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the 17th International Conference on Computer Communications and Networks, IEEE ICCCN 2008, St. Thomas, U.S. Virgin Islands, August 3-7, 2008, pp. 125-130, 2008, IEEE, 978-1-4244-2390-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Mabel Iglesias Ham, Adrian Ion, Walter G. Kropatsch, Edel B. García Reyes |
Delineating Homology Generators in Graph Pyramids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIARP ![In: Progress in Pattern Recognition, Image Analysis and Applications, 13th Iberoamerican Congress on Pattern Recognition, CIARP 2008, Havana, Cuba, September 9-12, 2008. Proceedings, pp. 576-584, 2008, Springer, 978-3-540-85919-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
graphs pyramids, pyramid drawing, homology generators |
17 | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
Cache-aware iteration space partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2008, Salt Lake City, UT, USA, February 20-23, 2008, pp. 269-270, 2008, ACM, 978-1-59593-795-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
load balancing, caches |
17 | Qin Zhu, Lei Lin, Holger M. Kienle, Hausi A. Müller |
Characterizing maintainability concerns in autonomic element design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSM ![In: 24th IEEE International Conference on Software Maintenance (ICSM 2008), September 28 - October 4, 2008, Beijing, China, pp. 197-206, 2008, IEEE Computer Society, 978-1-4244-2613-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Piotr Augustyniak |
Optimal Coding of Vectorcardiographic Sequences Using Spatial Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Technol. Biomed. ![In: IEEE Trans. Inf. Technol. Biomed. 11(3), pp. 305-311, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Yosi Ben-Asher, Moshe Yuda |
Source Level Merging of Independent Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 402, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Neil Vachharajani, Ram Rangan, Easwaran Raman, Matthew J. Bridges, Guilherme Ottoni, David I. August |
Speculative Decoupled Software Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 49-59, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Paul Lokuciejewski, Heiko Falk, Martin Schwarzer, Peter Marwedel, Henrik Theiling |
Influence of procedure cloning on WCET prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 137-142, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
WCET minimization, context-sensitive WCET-analysis, compiler optimizations |
17 | Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ramesh Peri |
Identifying potential parallelism via loop-centric profiling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 143-152, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
loop profiling, parallelization |
17 | Pierre Fransson, Lenka Carr-Motycková |
Loop-Free Link-State Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the 16th International Conference on Computer Communications and Networks, IEEE ICCCN 2007, Turtle Bay Resort, Honolulu, Hawaii, USA, August 13-16, 2007, pp. 905-911, 2007, IEEE, 978-1-4244-1251-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Konstantinos Kyriakopoulos, Anthony T. Chronopoulos, Lionel M. Ni |
An optimal scheduling scheme for tiling in distributed systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2007 IEEE International Conference on Cluster Computing, 17-20 September 2007, Austin, Texas, USA, pp. 267-274, 2007, IEEE Computer Society, 978-1-4244-1387-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Aman Shaikh, Rohit Dube, Anujan Varma |
Avoiding instability during graceful shutdown of multiple OSPF routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 14(3), pp. 532-542, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
hitless upgrade, intra-domain routing, network maintenance, routing, OSPF |
17 | Richard Gault, Iain A. Stewart |
An Infinite Hierarchy in a Class of Polynomial-Time Program Schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theory Comput. Syst. ![In: Theory Comput. Syst. 39(5), pp. 753-783, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Howard Bowman, Rodolfo Gómez 0001 |
How to stop time stopping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Aspects Comput. ![In: Formal Aspects Comput. 18(4), pp. 459-493, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Zeno-timelocks, Non-zenoness conditions, Model checking, Timed automata |
17 | Kuang-che Wu, Shun-chin Hsu, Tsan-sheng Hsu |
The Graph-History Interaction Problem in Chinese Chess. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACG ![In: Advances in Computer Games, 11th International Conference, ACG 2005, Taipei, Taiwan, September 6-9, 2005. Revised Papers, pp. 165-179, 2006, Springer, 3-540-48887-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Tobias Gedell, Reiner Hähnle |
Verification by Parallelization of Parametric Code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algebraic and Proof-theoretic Aspects of Non-classical Logics ![In: Algebraic and Proof-theoretic Aspects of Non-classical Logics, Papers in Honor of Daniele Mundici on the Occasion of His 60th birthday, pp. 138-159, 2006, Springer, 978-3-540-75938-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | D. Kebbal |
Automatic Flow Analysis Using Symbolic Execution and Path Enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 2006 International Conference on Parallel Processing Workshops (ICPP Workshops 2006), 14-18 August 2006, Columbus, Ohio, USA, pp. 397-404, 2006, IEEE Computer Society, 0-7695-2637-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
static WCET analysis, automatic parametric flow analysis, block-based symbolic execution, path enumeration, hard real-time systems |
17 | Jeanne Bickford, Jason Hibbeler, Markus Bühler, Jürgen Koehl, Dirk Müller 0003, Sven Peyer, Christian Schulte 0002 |
Yield Improvement by Local Wiring Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 473-478, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Ayon Basumallik, Rudolf Eigenmann |
Optimizing irregular shared-memory applications for distributed-memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2006, New York, New York, USA, March 29-31, 2006, pp. 119-128, 2006, ACM, 1-59593-189-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
computation-communication overlap, iteration reordering, performance, MPI, OpenMP, compiler techniques |
17 | Eric Hung-Yu Tseng, Jean-Luc Gaudiot |
Automatic Array Partitioning Based on the Smith Normal Form. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 33(1), pp. 35-56, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Data partitioning, communication optimization, parallel loop, Smith-normal-form |
17 | Mary W. Hall, Saman P. Amarasinghe, Brian R. Murphy, Shih-Wei Liao, Monica S. Lam |
Interprocedural parallelization analysis in SUIF. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 27(4), pp. 662-731, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
parallelization, symbolic analysis, Data dependence analysis, interprocedural data-flow analysis |
17 | Mary Poppendieck, Tom Poppendieck |
Introduction to Lean Software Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
XP ![In: Extreme Programming and Agile Processes in Software Engineering, 6th International Conference, XP 2005, Sheffield, UK, June 18-23, 2005, Proceedings, pp. 280, 2005, Springer, 3-540-26277-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Won So, Alexander G. Dean |
Complementing software pipelining with software thread integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05), Chicago, Illinois, USA, June 15-17, 2005, pp. 137-146, 2005, ACM, 1-59593-018-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
TI C6000, DSP, software pipelining, VLIW, stream programming, coarse-grain parallelism, software thread integration |
17 | Arun Kejariwal, Alexandru Nicolau |
An Efficient Load Balancing Scheme for Grid-based High Performance Scientific Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC ![In: 4th International Symposium on Parallel and Distributed Computing (ISPDC 2005), 4-6 July 2005, Lille, France, pp. 217-225, 2005, IEEE Computer Society, 0-7695-2434-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Peng Wu 0001, Alexandre E. Eichenberger, Amy Wang |
Efficient SIMD Code Generation for Runtime Alignment and Length Conversion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA, pp. 153-164, 2005, IEEE Computer Society, 0-7695-2298-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Frank te Beest, Ad M. G. Peeters |
A Multiplexor Based Test Method for Self-Timed Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 14-16 March 2005, New York, NY, USA, pp. 166-175, 2005, IEEE Computer Society, 0-7695-2305-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
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