Search results for "Arithmetic"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
24	Thomas Chabrier, Arnaud Tisserand	On-the-Fly Multi-base Recoding for ECC Scalar Multiplication without Pre-computations.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn	Floating Point Architecture Extensions for Optimized Matrix Factorization.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Nicolas Brisebarre, Marc Mezzarobba, Jean-Michel Muller, Christoph Quirin Lauter	Comparison between Binary64 and Decimal64 Floating-Point Numbers.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	M. G. Edmunds	The Antikythera Mechanism and the early history of mechanical computing.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Jérémie Detrey, Pierrick Gaudry, Marion Videau	Relation Collection for the Function Field Sieve.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Jean-Claude Bajard, Julien Eynard, Filippo Gandino	Fault Detection in RNS Montgomery Modular Multiplication.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Sylvain Chevillard, Marc Mezzarobba	Multiple-Precision Evaluation of the Airy Ai Function with Reduced Cancellation.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Michael B. Sullivan 0001, Earl E. Swartzlander Jr.	Truncated Logarithmic Approximation.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Hao Jiang 0001, Stef Graillat, Roberto Barrio	Accurate and Fast Evaluation of Elementary Symmetric Functions.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Vincent Lefèvre	SIPE: Small Integer Plus Exponent.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Jongwook Sohn, Earl E. Swartzlander Jr.	Improved Architectures for a Floating-Point Fused Dot Product Unit.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Vassil S. Dimitrov, Kimmo Järvinen 0001	Another Look at Inversions over Binary Fields.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Susanne Engels, Elif Bilge Kavun, Christof Paar, Tolga Yalçin, Hristina Mihajloska	A Non-Linear/Linear Instruction Set Extension for Lightweight Ciphers.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Marius Cornea	Precision, Accuracy, and Rounding Error Propagation in Exascale Computing.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Petr Kurka, Martin Delacourt	The Unary Arithmetical Algorithm in Bimodular Number Systems.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Edin Kadric, Paul Gurniak, André DeHon	Accurate Parallel Floating-Point Accumulation.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Pascal Giorgi, Laurent Imbert, Thomas Izard	Parallel Modular Multiplication on Multi-core Processors.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	James Demmel, Hong Diep Nguyen	Fast Reproducible Floating-Point Summation.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	David H. Bailey	High-precision computation: Applications and challenges [Keynote I].	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Sylvie Boldo	How to Compute the Area of a Triangle: A Formal Revisit.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Claude-Pierre Jeannerod, Nicolas Louvet, Jean-Michel Muller	On the Componentwise Accuracy of Complex Floating-Point Division with an FMA.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	James Demmel, Hong Diep Nguyen	Numerical Reproducibility and Accuracy at ExaScale.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Suresh Srinivasan, Ketan Bhudiya, Rajaraman Ramanarayanan, P. Sahit Babu, Tiju Jacob, Sanu Mathew, Ram Krishnamurthy 0001, Vasantha Erraguntla	Split-Path Fused Floating Point Multiply Accumulate (FPMAC).	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Sameh Galal, Ofer Shacham, John S. Brunhaver, Jing Pu, Artem Vassiliev, Mark Horowitz	FPU Generator for Design Space Exploration.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Jeff Rupley, John King, Eric Quinnell, Frank Galloway, Ken Patton, Peter-Michael Seidel, James Dinh, Hai Bui, Anasua Bhowmik	The Floating-Point Unit of the Jaguar x86 Core.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Bilgiday Yuce, H. Fatih Ugurdag, Sezer Gören 0001, Günhan Dündar	A Fast Circuit Topology for Finding the Maximum of N k-bit Numbers.	IEEE Symposium on Computer Arithmetic	2013	DBLP DOI BibTeX RDF
24	Elisardo Antelo, David Hough 0001, Paolo Ienne (eds.)	20th IEEE Symposium on Computer Arithmetic, ARITH 2011, Tübingen, Germany, 25-27 July 2011	IEEE Symposium on Computer Arithmetic	2011	DBLP BibTeX RDF
24	Robert G. Dimond, Sébastien Racanière, Oliver Pell	Accelerating Large-Scale HPC Applications Using FPGAs.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Christophe Mouilleron, Guillaume Revy	Automatic Generation of Fast and Certified Code for Polynomial Evaluation.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Omid Sarbishei, Katarzyna Radecka	On the Fixed-Point Accuracy Analysis and Optimization of FFT Units with CORDIC Multipliers.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Rizalafande Che Ismail, J. Nicholas Coleman	ROM-less LNS.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Ping Tak Peter Tang, J. Adam Butts, Ron O. Dror, David E. Shaw	Tight Certification Techniques for Digit-by-Rounding Algorithms with Application to a New 1/sqrt(x) Design.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Filippo Gandino, Fabrizio Lamberti, Paolo Montuschi, Jean-Claude Bajard	A General Approach for Improving RNS Montgomery Exponentiation Using Pre-processing.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Steven R. Carlough, Adam Collura, Silvia M. Müller, Michael Kroener	The IBM zEnterprise-196 Decimal Floating-Point Accelerator.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Saeid Gorgin 0001, Ghassem Jaberipur	A Family of High Radix Signed Digit Adders.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Neil Burgess	Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Sameh Galal, Mark Horowitz	Latency Sensitive FMA Design.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Nicolas Brisebarre, Mioara Joldes, Peter Kornerup, Érik Martin-Dorel, Jean-Michel Muller	Augmented Precision Square Roots and 2-D Norms, and Discussion on Correctly Rounding sqrt(x^2+y^2).	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Sylvie Boldo, Guillaume Melquiond	Flocq: A Unified Library for Proving Floating-Point Algorithms in Coq.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	J. Adam Butts, Ping Tak Peter Tang, Ron O. Dror, David E. Shaw	Radix-8 Digit-by-Rounding: Achieving High-Performance Reciprocals, Square Roots, and Reciprocal Square Roots.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Thomas B. Preußer, Martin Zabel, Rainer G. Spallek	Accelerating Computations on FPGA Carry Chains by Operand Compaction.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Sylvain Chevillard	Automatic Generation of Code for the Evaluation of Constant Expressions at Any Precision with a Guaranteed Error Bound.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Álvaro Vázquez, Javier D. Bruguera	Composite Iterative Algorithm and Architecture for q-th Root Calculation.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Timothy Anderson, Duc Bui, Shriram Moharil, Soujanya Narnur, Mujibur Rahman, Anthony Lell, Eric Biscondi, Ashish Shrivastava, Peter Dent, Mingjian Yan, Hasan Mahmood	A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Marco Bodrato	High Degree Toom'n'Half for Balanced and Unbalanced Multiplication.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	David W. Matula, Mihai T. Panu	A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Martin Langhammer	Teraflop FPGA Design.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Christophe Monat, Guillaume Revy	How to Square Floats Accurately and Efficiently on the ST231 Integer Processor.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Billy Bob Brumley, Dan Page	Bit-Sliced Binary Normal Basis Multiplication.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	David Harvey, Paul Zimmermann	Short Division of Long Integers.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Daniel Lipetz, Eric Schwarz	Self Checking in Current Floating-Point Units.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Maarten Boersma, Michael Kroener, Christophe Layer, Petra Leber, Silvia M. Müller, Kerstin Schelm	The POWER7 Binary Floating-Point Unit.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Ralf Fischer	High Intelligence Computing: The New Era of High Performance Computing.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Mark G. Arnold, John R. Cowles, Vassilis Paliouras, Ioannis Kouretas	Towards a Quaternion Complex Logarithmic Number System.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	David Raymond Lutz	Fused Multiply-Add Microarchitecture Comprising Separate Early-Normalizing Multiply and Add Pipelines.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Alberto Nannarelli	Radix-16 Combined Division and Square Root Unit.	IEEE Symposium on Computer Arithmetic	2011	DBLP DOI BibTeX RDF
24	Javier D. Bruguera, Marius Cornea, Debjit Das Sarma, John Harrison 0001 (eds.)	19th IEEE Symposium on Computer Arithmetic, ARITH 2009, Portland, Oregon, USA, 9-10 June 2009	IEEE Symposium on Computer Arithmetic	2009	DBLP BibTeX RDF
24	John Harrison 0001	Fast and Accurate Bessel Function Computation.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Elena Guralnik, Ariel J. Birnbaum, Anatoly Koyfman, Avi Kaplan	Implementation Specific Verification of Divide and Square Root Instructions.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	David W. Matula	Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Jean-Claude Bajard, Marcelo E. Kaihara, Thomas Plantard	Selected RNS Bases for Modular Multiplication.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Peter Kornerup, Vincent Lefèvre, Nicolas Louvet, Jean-Michel Muller	On the Computation of Correctly-Rounded Sums.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Jean Vuillemin	Efficient Data Structure and Algorithms for Sparse Integers, Sets and Predicates.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Mark G. Arnold, Caroline Collange	A Dual-Purpose Real/Complex Logarithmic Number System ALU.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Jithra Adikari, Vassil S. Dimitrov, Laurent Imbert	Hybrid Binary-Ternary Joint Form and Its Application in Elliptic Curve Cryptography.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	William W. Edmonson, Guillaume Melquiond	IEEE Interval Standard Working Group - P1788: Current Status.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Álvaro Vázquez, Elisardo Antelo	A High-Performance Significand BCD Adder with IEEE 754-2008 Decimal Rounding.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Liang-Kai Wang, Michael J. Schulte	A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	John Harrison 0001	Decimal Transcendentals via Binary.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	M. Anwar Hasan, Christophe Nègre	Subquadratic Space Complexity Multiplier for a Class of Binary Fields Using Toeplitz Matrix Approach.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Jochen Preiss, Maarten Boersma, Silvia Melitta Müller	Advanced Clockgating Schemes for Fused-Multiply-Add-Type Floating-Point Units.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	David E. Shaw	Anton: A Specialized Machine for Millisecond-Scale Molecular Dynamics Simulations of Proteins.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Ghassem Jaberipur, Behrooz Parhami	Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Sylvain Chevillard, Mioara Joldes, Christoph Quirin Lauter	Certified and Fast Computation of Supremum Norms of Approximation Errors.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Chung-Kuan Cheng	Design Space Exploration for Power-Efficient Mixed-Radix Ling Adders.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Dongdong Chen 0002, Yu Zhang, Younhee Choi, Moon Ho Lee, Seok-Bum Ko	A 32-bit Decimal Floating-Point Logarithmic Converter.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Álvaro Vázquez, Julio Villalba, Elisardo Antelo	Computation of Decimal Transcendental Functions Using the CORDIC Algorithm.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Murat Cenk, Çetin Kaya Koç, Ferruh Özbudak	Polynomial Multiplication over Finite Fields Using Field Extensions and Interpolation.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Marius Cornea	IEEE 754-2008 Decimal Floating-Point for Intel.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Reto Zimmermann	Datapath Synthesis for Standard-Cell Design.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Alexandre F. Tenca	Multi-operand Floating-Point Addition.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Hossam A. H. Fahmy, Ramy Raafat, Amira M. Abdel-Majeed, Rodina Samy, Tarek ElDeeb, Yasmin Farouk	Energy and Delay Improvement via Decimal Floating Point Units.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24	Claude-Pierre Jeannerod, Herve Knochel, Christophe Monat, Guillaume Revy, Gilles Villard	A New Binary Floating-Point Division Algorithm and Its Software Implementation on the ST231 Processor.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
24		18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 25-27 June 2007, Montpellier, France	IEEE Symposium on Computer Arithmetic	2007	DBLP BibTeX RDF
24	Katsuki Kobayashi, Naofumi Takagi, Kazuyoshi Takagi	An Algorithm for Inversion in GF(2^m) Suitable for Implementation Using a Polynomial Multiply Instruction on GF(2).	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Gökay Saldamli, Çetin Kaya Koç	Spectral Modular Exponentiation.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Libo Huang, Li Shen 0007, Kui Dai, Zhiying Wang 0003	A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto	An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF	nT pairing, FPGA, elliptic curve, hardware accelerator, Tate pairing, characteristic three
24	William Hasenplaugh, Gunnar Gaubatz, Vinodh Gopal	Fast Modular Reduction.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Jérémie Detrey, Florent de Dinechin, Xavier Pujol	Return of the hardware floating-point elementary function.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF	Floating-point elementary functions, hardware operator, FPGA, exponential, logarithm
24	Nicolas Brisebarre, Guillaume Hanrot	Floating-point L2-approximations to functions.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Jaewook Chung, M. Anwar Hasan	Montgomery Reduction Algorithm for Modular Multiplication Using Low-Weight Polynomial Form Integers.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF	More generalized Mersenne numbers, Low-weight polynomial form integers, adapted modular number system, polynomial modular number system, Montgomery reduction algorithm
24	Heumpil Cho, Earl E. Swartzlander Jr.	Serial Parallel Multiplier Design in Quantum-dot Cellular Automata.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi	A New Family of High.Performance Parallel Decimal Multipliers.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Guillaume Hanrot, Vincent Lefèvre, Damien Stehlé, Paul Zimmermann	Worst Cases of a Periodic Function for Large Arguments.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Neil Burgess, Chris N. Hinds	Design of the ARM VFP11 Divide and Square Root Synthesisable Macrocell.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman	Robust Energy-Efficient Adder Topologies.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Simon Knowles	The Return of Silicon Efficiency.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Vassil S. Dimitrov, Laurent Imbert, Andrew Zakaluzny	Multiplication by a Constant is Sublinear.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Laurent Fousse	Accurate Multiple-Precision Gauss-Legendre Quadrature.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF