Search results for "CORDIC"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
17	Herbert Dawid, Heinrich Meyr	The Differential CORDIC Algorithm: Constant Scale Factor Redundant Implementation without Correcting Iterations.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF
17	Dulal C. Kar, V. V. Bapeswara Rao	A CORDIC-based unified systolic architecture for sliding window applications of discrete transforms.	IEEE Trans. Signal Process.	1996	DBLP DOI BibTeX RDF
17	Shen-Fu Hsiao, Jean-Marc Delosme	Parallel singular value decomposition of complex matrices using multidimensional CORDIC algorithms.	IEEE Trans. Signal Process.	1996	DBLP DOI BibTeX RDF
17	Shaoyun Wang, Vincenzo Piuri, Earl E. Swartzlander Jr.	Granularly-pipelined CORDIC processors for sine and cosine generators.	ICASSP	1996	DBLP DOI BibTeX RDF
17	Spiros Nikolaidis 0001, D. E. Metafas	CORDIC versus conventional logic for realisation of normalised lattice all-pass filters.	ICECS	1996	DBLP DOI BibTeX RDF
17	Jarkko Vuori, Jorma Skyttä	Implementation of a European paging system receiver using CORDIC algorithm.	EUSIPCO	1996	DBLP BibTeX RDF
17	Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen	High throughput CORDIC-based systolic array design for the discrete cosine transform.	IEEE Trans. Circuits Syst. Video Technol.	1995	DBLP DOI BibTeX RDF
17	Yu Hen Hu, Zhenyang Wu	An efficient CORDIC array structure for the implementation of discrete cosine transform.	IEEE Trans. Signal Process.	1995	DBLP DOI BibTeX RDF
17	Finn T. Møller, Jack Bukholdt Andersen, Hans Roelsgaard Jensen, Ole Olsen, Flemming K. Fink	PSEUDEC: implementation of the computation-intensive PARTRAN functionality using a dedicated on-line CORDIC co-processor.	ICASSP	1995	DBLP DOI BibTeX RDF
17	Steven R. Freeman, Matthew O'Donnell	A complex arithmetic digital signal processor using CORDIC rotators.	ICASSP	1995	DBLP DOI BibTeX RDF
17	Hao-Yung Lo, Hsiu-Feng Lin, Kuen-Shiuh Yang	A New Method of Implementation of VLSI CORDIC for Sine and Cosine Computation.	ISCAS	1995	DBLP DOI BibTeX RDF
17	Shaoyun Wang, Earl E. Swartzlander Jr.	Merged CORDIC Algorithm.	ISCAS	1995	DBLP DOI BibTeX RDF
17	Uwe Meyer-Bäse, Anke Meyer-Bäse, Wolfgang Hilberg	COordinate Rotation DIgital Computer (CORDIC) Synthesis for FPGA.	FPL	1994	DBLP DOI BibTeX RDF
17	Roberto Sarmiento, Kamran Eshraghian	Implementation of a CORDIC Processor for CFFT Computation in Gallium Arsenide Technology.	EDAC-ETC-EUROASIC	1994	DBLP DOI BibTeX RDF
17	Evaggelinos P. Mariatos, Michael K. Birbas, Alexios N. Birbas	A reconfigurable DSP board based on CORDIC elements.	RSP	1994	DBLP DOI BibTeX RDF
17	Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen	High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform.	ISCAS	1994	DBLP DOI BibTeX RDF
17	Evaggelinos P. Mariatos, D. E. Metafas, John Ant. Hallas, Constantinos E. Goutis	A Fast DCT Processor, Based on Special Purpose CORDIC Rotators.	ISCAS	1994	DBLP DOI BibTeX RDF
17	Shen-Fu Hsiao, Jean-Marc Delosme	Parallel processing of complex data using quaternion and pseudo-quaternion CORDIC algorithms.	ASAP	1994	DBLP DOI BibTeX RDF
17	Jeong-A Lee, Mubashir Ahmad	VLSI implementation of CORDIC angle units.	Great Lakes Symposium on VLSI	1994	DBLP DOI BibTeX RDF
17	V. K. Anuradha, V. Visvanathan	A CORDIC Based Programmable DXT Processor Array.	VLSI Design	1994	DBLP DOI BibTeX RDF
17	Ulrich Wolff	Simulationen eines elastischen Mehrgelenk-Manipulators unter Verwendung von CORDIC-Algorithmen.		1994	RDF
17	Christophe Mazenc, Xavier Merrheim, Jean-Michel Muller	Computing Functions cos^{-1} and sin^{-1} Using Cordic.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF
17	Xiaobo Hu 0001, Steven C. Bass, Ronald G. Harber	An Efficient Implementation of Singular Value Decomposition Rotation Transformations with CORDIC Processors.	J. Parallel Distributed Comput.	1993	DBLP DOI BibTeX RDF
17	Javier D. Bruguera, Elisardo Antelo, Emilio L. Zapata	Design of a Pipelined Radix 4 CORDIC Processor.	Parallel Comput.	1993	DBLP DOI BibTeX RDF
17	D. E. Metafas, Spiridon Nikolaidis 0001, Constantinos E. Goutis	Real time Cepstrum computation based on an Advanced CORDIC processor.	Microprocess. Microprogramming	1993	DBLP DOI BibTeX RDF
17	Dorin Panescu, Yu Hen Hu, Willis J. Tompkins	A fast pipelined CORDIC-based adaptive lattice filter.	ICASSP (3)	1993	DBLP DOI BibTeX RDF
17	Jürgen Götze, Steffen Paul, Matthias Sauer 0001	A CORDIC-based Jacobi-like algorithm for eigenvalue computation.	ICASSP (3)	1993	DBLP DOI BibTeX RDF
17	Xiaobo Hu 0001, Steven C. Bass	A neglected error source in the CORDIC algorithm.	ISCAS	1993	DBLP BibTeX RDF
17	Spiridon Nikolaidis 0001, D. E. Metafas, Constantinos E. Goutis	CORDIC Based Pipeline Architecture for All-pass Filters.	ISCAS	1993	DBLP BibTeX RDF
17	Matthias Sauer 0001, Ernst G. Bernard, Josef A. Nossek	Block Sequential CORDIC Architectures.	ISCAS	1993	DBLP BibTeX RDF
17	Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen	A CORDIC-based VLSI Array for Computing 2-D Discrete Hartley Transform.	ISCAS	1993	DBLP BibTeX RDF
17	Ed F. Deprettere, Richard Heusdens, Hendrik Theunis	Subband filtering: Cordic modulation and systolic quadrature mirror filter tree.	ASAP	1993	DBLP DOI BibTeX RDF
17	Yu Hen Hu	The quantization effects of the CORDIC algorithm.	IEEE Trans. Signal Process.	1992	DBLP DOI BibTeX RDF
17	Yu Hen Hu, H. E. Liao	CALF: a CORDIC adaptive lattice filter.	IEEE Trans. Signal Process.	1992	DBLP DOI BibTeX RDF
17	Yu-Hen Hu	CORDIC-based VLSI architectures for digital signal processing.	IEEE Signal Process. Mag.	1992	DBLP DOI BibTeX RDF
17	David H. Kitabjian, Prabhakar R. Chitrapu	The suboptimality of angle coding in the CORDIC algorithm.	ICASSP	1992	DBLP DOI BibTeX RDF
17	Y. H. Hu, H. E. Liao	CALF: a CORDIC adaptive lattice filter.	ICASSP	1992	DBLP DOI BibTeX RDF
17	Herbert Dawid, Heinrich Meyr	High speed bit-level pipelined architectures for redundant CORDIC implementation.	ASAP	1992	DBLP DOI BibTeX RDF
17	Dirk Timmermann, Helmut Hahn, Bedrich J. Hosticka, Bernold Rix	A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms.	Integr.	1991	DBLP DOI BibTeX RDF
17	Naofumi Takagi, Tohru Asada, Shuzo Yajima	Redundant CORDIC Methods with a Constant Scale Factor for Sine and Cosine Computation.	IEEE Trans. Computers	1991	DBLP DOI BibTeX RDF
17	Cesare Alippi	The determination of angular values and parameters in flat surfaces: from the mathematical approach to the CORDIC architecture.	Microprocessing and Microprogramming	1991	DBLP DOI BibTeX RDF
17	Steven C. Bass, G. M. Butler, R. L. Williams, F. Barlos, D. R. Miller	A bit-serial, floating point CORDIC processor in VLSI.	ICASSP	1991	DBLP DOI BibTeX RDF
17	Alfons A. J. de Lange, Ed F. Deprettere	Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
17	Jeong-A Lee, Tomás Lang	SVD by constant-factor-redundant-CORDIC.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
17	Shen-Fu Hsiao, Jean-Marc Delosme	The CORDIC Householder algorithm.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
17	John A. Harding, Tomás Lang, Jeong-A Lee	A Comparison of Redundant CORDIC Rotation Engines.	ICCD	1991	DBLP DOI BibTeX RDF
17	Jeong-A Lee, Kiseon Kim	Discrete Fourier transform processors using CORDIC.	Great Lakes Symposium on VLSI	1991	DBLP DOI BibTeX RDF
17	Helmut Hahn	Untersuchung und Integration von Berechnungsverfahren elementarer Funktionen auf CORDIC-Basis mit Anwendungen in der adaptiven Signalverarbeitung.		1991	RDF
17	Hai-Xiang Lin, Henk J. Sips	On-Line CORDIC Algorithms.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF
17	Yu Hen Hu, S. Naganathan	A novel implementation of a chirp Z-transform using a CORDIC processor.	IEEE Trans. Acoust. Speech Signal Process.	1990	DBLP DOI BibTeX RDF
17	Dimitris E. Metafas, Costas E. Goutis	A DSP processor with a powerful set of elementary arithmetic operations based on cordic and CCM algorithms.	Microprocessing and Microprogramming	1990	DBLP DOI BibTeX RDF
17	Alfons A. J. de Lange, Ed F. Deprettere, Alle-Jan van der Veen, Jichun Bu	Real time application of the floating point pipeline CORDIC processor in massive-parallel pipelined DSP algorithms.	ICASSP	1990	DBLP DOI BibTeX RDF
17	Yu Hen Hu, Homer H. M. Chern	An efficient VLSI CORDIC array structure implementation of Toeplitz eigensystem solvers.	ICASSP	1990	DBLP DOI BibTeX RDF
17	Ferenc Kocsis, Johann F. Böhme	Some Possible Applications of CORDIC Processors in Computer Graphics.	Eurographics	1990	DBLP DOI BibTeX RDF
17	Dirk Timmermann	CORDIC-Algorithmen, Architekturen und monolithische Realisierungen mit Anwendungen in der Bildverarbeitung.		1990	RDF
17	Vincent Considine	CORDIC trigonometric function generator for DSP.	ICASSP	1989	DBLP DOI BibTeX RDF
17	Hassan M. Ahmed, Kin-Ho Fu	A VLSI array CORDIC architecture.	ICASSP	1989	DBLP DOI BibTeX RDF
17	Hai-Xiang Lin, Henk J. Sips	On-line CORDIC algorithms.	IEEE Symposium on Computer Arithmetic	1989	DBLP DOI BibTeX RDF
17	Joseph R. Cavallaro, Franklin T. Luk	CORDIC Arithmetic for an SVD Processor.	J. Parallel Distributed Comput.	1988	DBLP DOI BibTeX RDF
17	Ronald G. Harber, Xiaobo Sharon Hu, J. Li, Steven C. Bass	The application of bit-serial CORDIC computational units to the design of inverse kinematics processors.	ICRA	1988	DBLP DOI BibTeX RDF
17	Yu Hen Hu	The quantization effects of the CORDIC algorithm [coordinate rotation digital computer].	ICASSP	1988	DBLP DOI BibTeX RDF
17	Joseph R. Cavallaro, Franklin T. Luk	Floating point CORDIC for matrix computations.	ICCD	1988	DBLP DOI BibTeX RDF
17	Raymond Vachss	The Cordic Magnification Function.	IEEE Micro	1987	DBLP DOI BibTeX RDF
17	C. S. George Lee, Po Rong Chang	A maximum pipelined CORDIC architecture for inverse kinematic position computation.	IEEE J. Robotics Autom.	1987	DBLP DOI BibTeX RDF
17	Joseph R. Cavallaro, Franklin T. Luk	CORDIC arithmetic for an SVD processor.	IEEE Symposium on Computer Arithmetic	1987	DBLP DOI BibTeX RDF
17	T. W. Curtis, Paul Allison, James A. Howard	A Cordic Processor for Laser Trimming.	IEEE Micro	1986	DBLP DOI BibTeX RDF
17	Tze-Yun Sung, Yu-Hen Hu, H. J. Yu	Doubly pipelined Cordic array for digital signal processing algorithms.	ICASSP	1986	DBLP DOI BibTeX RDF
17	Asif Naseem, P. David Fisher	The modified CORDIC algorithm.	IEEE Symposium on Computer Arithmetic	1985	DBLP DOI BibTeX RDF
17	Ed F. Deprettere, Patrick M. Dewilde, R. Udo	Pipelined cordic architectures for fast VLSI filtering and array processing.	ICASSP	1984	DBLP DOI BibTeX RDF
17	Daniel T. L. Lee, Martin Morf	Generalized CORDIC for digital signal processing.	ICASSP	1982	DBLP DOI BibTeX RDF
17	Gene L. Haviland, Al A. Tuszynski	A CORDIC Arithmethic Processor Chip.	IEEE Trans. Computers	1980	DBLP DOI BibTeX RDF
17	Alvin M. Despain	Fourier Transform Computers Using CORDIC Iterations.	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
17	Jack E. Volder	The CORDIC Trigonometric Computing Technique.	IRE Trans. Electron. Comput.	1959	DBLP DOI BibTeX RDF
17	Dan H. Daggett	Decimal-Binary Conversions in CORDIC.	IRE Trans. Electron. Comput.	1959	DBLP DOI BibTeX RDF
17	Jack E. Volder	The CORDIC computing technique.	IRE-AIEE-ACM Computer Conference (Western)	1959	DBLP DOI BibTeX RDF
12	Hun-sik Kang, Kwang-Eui Pyun, Sin-Chong Park	A hardware implementation of AGC and synchronization for OFDM-based WLAN.	ICHIT	2009	DBLP DOI BibTeX RDF	AGC, preamble, synchronization, OFDM, matched filter, phase estimation
12	Marta Ruiz-Llata, Mar Yébenes-Calvino	FPGA Implementation of Support Vector Machines for 3D Object Identification.	ICANN (1)	2009	DBLP DOI BibTeX RDF	Support Vector Machines, image processing, embedded systems
12	Laurent Boher, Rodrigue Rabineau, Maryline Hélard	FPGA Implementation of an Iterative Receiver for MIMO-OFDM Systems.	IEEE J. Sel. Areas Commun.	2008	DBLP DOI BibTeX RDF
12	Jesus Selva	Convolution-Based Trigonometric Interpolation of Band-Limited Signals.	IEEE Trans. Signal Process.	2008	DBLP DOI BibTeX RDF
12	Xiaojun Wang, Miriam Leeser	Efficient FPGA implementation of qr decomposition using a systolic array architecture.	FPGA	2008	DBLP DOI BibTeX RDF	FPGA
12	Lei Ma 0012, Kevin Dickson, John McAllister, John V. McCanny	Modified givens rotations and their application to matrix inversion.	ICASSP	2008	DBLP DOI BibTeX RDF
12	Martin Kumm, M. Shahab Sanjari	Digital hilbert transformers for FPGA-based phase-locked loops.	FPL	2008	DBLP DOI BibTeX RDF
12	Vanderlei Bonato, Eduardo Marques, George A. Constantinides	A Parallel Hardware Architecture for Image Feature Detection.	ARC	2008	DBLP DOI BibTeX RDF
12	Khurram Waheed, Robert Bogdan Staszewski, Sameh Rezeq	Curse of digital polar transmission: Precise delay alignment in amplitude and phase modulation paths.	ISCAS	2008	DBLP DOI BibTeX RDF
12	Yin-Tsung Hwang, Wei-Da Chen	A low complexity complex QR factorization design for signal detection in MIMO OFDM systems.	ISCAS	2008	DBLP DOI BibTeX RDF
12	Ferney Amaya-Fernandez, Jaime Velasco-Medina	Design of a baseband processor for software radio using FPGAs.	SoCC	2008	DBLP DOI BibTeX RDF
12	Jose Marcelo Lima Duarte, Francisco das Chagas Mota, Manoel J. M. Carvalho	Digital PM demodulator for brazilian data collecting system.	SBCCI	2007	DBLP DOI BibTeX RDF	BDCS, control system theory, FPGA, PLL, phase locked loop
12	Pramod Kumar Meher	Systolic Designs for DCT Using a Low-Complexity Concurrent Convolutional Formulation.	IEEE Trans. Circuits Syst. Video Technol.	2006	DBLP DOI BibTeX RDF
12	Davide Anguita, Stefano Pischiutta, Sandro Ridella, Dario Sterpi	Feed-Forward Support Vector Machine Without Multipliers.	IEEE Trans. Neural Networks	2006	DBLP DOI BibTeX RDF
12	Emeric K. Jolly, Martin Fleury	Parallel Multi-Sector Algorithm for the General Hough Transform.	PDP	2006	DBLP DOI BibTeX RDF
12	Xiangjian He, Wenjing Jia, Namho Hur, Qiang Wu 0001, Jinwoong Kim	Image Translation and Rotation on Hexagonal Structure.	CIT	2006	DBLP DOI BibTeX RDF
12	Xi Chen, Gaofeng Wang, Wei Zhou, Sheng Chang, Shilei Sun	Efficient Sigmoid Function for Neural Networks Based FPGA Design.	ICIC (1)	2006	DBLP DOI BibTeX RDF
12	Hongzhi Wang 0003, Pierre Leray, Jacques Palicot	A Reconfigurable Architecture for MIMO Square Root Decoder.	ARC	2006	DBLP DOI BibTeX RDF
12	Xin Cai, Martin A. Brooke	A compact CPU architecture for sensor signal processing.	ISCAS	2006	DBLP DOI BibTeX RDF
12	Alexander Maltsev 0001, V. Pestretsov, Roman Maslennikov, Alexey Khoryaev	Triangular systolic array with reduced latency for QR-decomposition of complex matrices.	ISCAS	2006	DBLP DOI BibTeX RDF
12	Fariborz Sobhanmanesh, Saeid Nooshabadi	VLSI architecture for 4×4 16-QAM V-BLAST decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
12	Alireza Heidar-barghi, Saeed Gazor	A Digital Architecture for Direct Digital-to-RF Converters.	CCECE	2006	DBLP DOI BibTeX RDF
12	Tze-Yun Sung, Mao-Jen Sun, Yaw-Shih Shieh, Hsi-Chin Hsin	Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation.	PSIVT	2006	DBLP DOI BibTeX RDF	parallel-pipelined architecture, memory-efficiency, DCT, high-performances, IDCT
12	Wei Zhong, Zhigang Mao	Design and VLSI Architecture of a Channel Equalizer Based on Adaptive Modulation for IEEE 802.11a WLAN.	APCCAS	2006	DBLP DOI BibTeX RDF
12	Marko Kosunen, Jouko Vankka, Mikko Waltari, Kari Halonen	A multicarrier QAM modulator for WCDMA base-station with on-chip D/A converter.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF