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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6978 occurrences of 2230 keywords
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Results
Found 6322 publication records. Showing 6322 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
19 | Hassan Gomaa, Daniel A. Menascé |
Design and performance modeling of component interconnection patterns for distributed software architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Software and Performance ![In: Second International Workshop on Software and Performance, WOSP 2000, Ottawa, Canada, September 17-20, 2000., pp. 117-126, 2000, ACM, 1-58113-195-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
component interconnection patterns, XML, UML, software architecture, performance model, queuing networks |
19 | Qian-Ping Gu, Shietung Peng |
Efficient Protocols for Permutation Routing on All-Optical Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: Proceedings of the 2000 International Conference on Parallel Processing, ICPP 2000, Toronto, Canada, August 21-24, 2000, pp. 513-520, 2000, IEEE Computer Society, 0-7695-0768-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
WDM all-optical networks, routing algorithms, multistage interconnection networks, Permutation routing, edge-disjoint paths, BPC permutations |
19 | Oleg G. Monakhov, Emilia A. Monakhova |
Parametrically Described Regular Semigroup Interconnection Networks for Large-Scale Multicomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 5th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN 2000), 7-10 December 2000, Dallas / Richardson, TX, USA, pp. 202-209, 2000, IEEE Computer Society, 0-7695-0936-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Regular interconnection networks, circulant networks, parallel systems, hypercube topologies |
19 | Ch'ng Shi Baw, Roger D. Chamberlain, Mark A. Franklin |
Fair Scheduling in an Optical Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 1999, Proceedings of the 7th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 24-28 October, 1999, College Park, Maryland, USA, pp. 56-65, 1999, IEEE Computer Society, 0-7695-0381-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Fair Scheduling, Optical Interconnection Networks |
19 | Aaron Harwood, Hong Shen 0001 |
A Method of Trading Diameter for Reduced Degree to Construct Low Cost Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 1999 ACM Symposium on Applied Computing, SAC'99, San Antonio, Texas, USA, February 28 - March 2, 1999, pp. 474-480, 1999, ACM, 1-58113-086-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
interconnection network, cost, diameter, degree |
19 | Yuanyuan Yang 0001 |
A Class of Interconnection Networks for Multicasting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(8), pp. 899-906, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
multicast, Interconnection networks, routing algorithms, collective communication, nonblocking |
19 | Sipra Das Bit, Arnab Chaudhuri |
Fault Diagnosis in a Benes Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 9(7), pp. 700-703, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Redundant interconnection network, switching element fault, stuck-at fault, Benes network |
19 | Suresh K. Bhogavilli, Hosame Abu-Amara |
Design and Analysis of High Performance Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(1), pp. 110-117, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
performance analysis, delay, throughput, Multistage interconnection networks, clock cycle |
19 | Jean-Claude Bermond, Miriam Di Ianni, Michele Flammini, Stephane Perennes |
Acyclic Orientations for Deadlock Prevention in Interconnection Networks (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
WG ![In: Graph-Theoretic Concepts in Computer Science, 23rd International Workshop, WG '97, Berlin, Germany, June 18-20, 1997, Proceedings, pp. 52-64, 1997, Springer, 3-540-63757-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
communication in interconnection networks, routing, parallel algorithms, graph theory, computational and structural complexity |
19 | Ding-Ming Kwai, Behrooz Parhami |
A Class of Fixed-Degree Cayley-Graph Interconnection Networks Derived by Pruning k-ary n-cubes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 1997 International Conference on Parallel Processing (ICPP '97), August 11-15, 1997, Bloomington, IL, USA, Proceedings, pp. 92-95, 1997, IEEE Computer Society, 0-8186-8108-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fixed-degree network, pruning strategy, interconnection network, Cayley graph, k-ary n-cube, cube-connected cycles |
19 | Ming-Hsing Chiu, Mostafa A. Bassiouni |
A Fair Congestion Control Scheme for LAN Interconnection via ATM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1997 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '97), 18-20 December 1997, Taipei, Taiwan, pp. 397-403, 1997, IEEE Computer Society, 0-8186-8259-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Feedback congestion control, credit-based, optimal buffer sizing, Max-min fairness, LAN interconnection |
19 | Rafic A. Ayoubi, Qutaibah M. Malluhi, Magdy A. Bayoumi |
The Extended Cube Connected Cycles: An Efficient Interconnection for Massively Parallel Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(5), pp. 609-614, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
routing, interconnection network, broadcasting, Hypercube, divide and conquer, cube connected cycles |
19 | Ernst G. Bernard |
Efficient Fault Locations for Globally Controlled and Comparison-Based Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(12), pp. 1420-1425, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Bitonic merging networks, global and distributed control, built-in self test, multistage interconnection networks, fault location |
19 | Prasant Mohapatra, Chansu Yu, Chita R. Das |
Allocation and Mapping Based Reliability Analysis of Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(5), pp. 600-606, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Allocation-based reliability, cubic allocation schemes, performance-related reliability, reliability, multistage interconnection network, mapping algorithms |
19 | Paul Dietrich, Ramesh R. Rao |
Request Resubmission in a Blocking, Circuit-Switched, Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(11), pp. 1282-1293, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
resubmission, performance, Parallel processing, protocols, interconnection network, nonblocking |
19 | David M. Koppelman |
A Family of Interconnection Networks for Nonuniform Traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(5), pp. 486-492, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
simulation, interconnection networks, Congestion, omega networks, nonuniform traffic |
19 | José Miguel-Alonso, Agustin Arruabarrena, Ramón Beivide, José A. B. Fortes |
An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), January 24-26, 1996, Portugal, pp. 219-226, 1996, IEEE Computer Society, 0-8186-7376-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
interconnnection networks, synchronous simulation, Intel Paragon multicomputer, model decomposition, collaborative logical processes, process synchronization overhead, causal restrictions, message-passing network models, performance threshold, load level, scalability, parallel programming, virtual machines, message passing, multiprocessor interconnection networks, discrete event simulation, synchronisation, software performance evaluation, workload, empirical evaluation, parallel discrete-event simulation, optimistic simulation, network size, model parameters, simulator performance, message length, conservative simulation, processor number |
19 | Faris N. Abuali, Roger L. Wainwright, Dale A. Schoenefeld |
Solving the subset interconnection design problem using genetic algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 1996 ACM Symposium on Applied Computing, SAC'96, Philadelphia, PA, USA, February 17-19, 1996, pp. 299-304, 1996, ACM, 0-89791-820-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
interconnection design problem, genetic algorithms, minimum spanning tree |
19 | C. Y. Roger Chen, Shuo-Hsien Hsiao, Abdulaziz S. Almazyad |
A new model for the performance evaluation of synchronous circuit switched multistage interconnection networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 3(6), pp. 708-715, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
performance evaluation, queueing theory, multistage interconnection networks, circuit switching |
19 | Wei-Kuo Liao, Chung-Ta King |
Valved Routing: Efficient Flow Control for Adaptive Nonminimal Routing in Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 44(10), pp. 1181-1193, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
interconnection network, routing algorithm, Deadlock, flow control, starvation, router design |
19 | Shinichi Shionoya, Takafumi Aoki, Tatsuo Higuchi 0001 |
Multiwave Interconnection Networks for MCM-based Parallel Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '95 Parallel Processing, First International Euro-Par Conference, Stockholm, Sweden, August 29-31, 1995, Proceedings, pp. 593-607, 1995, Springer, 3-540-60247-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Multichip module (MCM), messagepassing multiprocessors, parallel processing, interconnection networks, optical interconnections, wavelength division multiplexing (WDM) |
19 | Patrick W. Dowd, Kalyani Bogineni, Khaled A. Aly, James A. Perreault |
Addendum to "Hierarchical Scalable Photonic Architectures for High-Performance Processor Interconnection". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(7), pp. 864, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
hierarchical scalable photonic architectures, high-performance processor interconnection, all-optical wavelength division multiplexed network, time multiplexed access protocol, static slot assignment, cycle synchronization, hypercube networks, wavelength division multiplexing, bandwidth allocation, optical information processing, distributed shared memory system, processor numbering |
19 | Sotirios G. Ziavras |
RH: A Versatile Family of Reduced Hypercube Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(11), pp. 1210-1220, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
reducedhypercube interconnection networks, RH, binary hypercube, lowdiameter, edge reduction technique, lower complexity, reduced hypercube topology, popularcube-connected cycles network, computational complexity, VLSI, parallel computers, parallel architectures, topology, hypercube networks, communication channels, very large scale integration complexity |
19 | Minze V. Chien, A. Yavuz Oruç |
Adaptive Binary Sorting Schemes and Associated Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(6), pp. 561-572, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
adaptive binary sorting schemes, cost complexity, AKS sorting network, parallel algorithms, parallel processing, interconnection networks, sorting, communication complexity, binary sequences, concentration, permutation networks, routing problems, permutation problems, sorting problems |
19 | Michael D. Rice, Stephen B. Seidman |
A Formal Model for Module Interconnection Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 20(1), pp. 88-101, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
module interconnection languages, hierarchical module structure design, Z schema type definitions, generic parameters, application-specific declarations, STILE, graphical design environment, formal specification, constraints, programming environments, specification languages, specification language, systems analysis, formal model, development environment, Conic, configuration language |
19 | Patrick W. Dowd, Kalyani Bogineni, Khaled A. Aly, James A. Perreault |
Hierarchical Scalable Photonic Architectures for High-Performance Processor Interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(9), pp. 1105-1120, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
photonic architectures, optical structures, processor interconnection, single-hop, optical fiber communication, parallel architectures, discrete-event simulation, discrete event simulation, analytic models, wavelength division multiplexing, wavelength division multiplexing, optical interconnections, hierarchical, parallel computer architecture, hierarchical architectures |
19 | Ching-Tien Ho |
An Observation on the Bisectional Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(7), pp. 873-877, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
bisectional interconnection networks, n-dimensional folded hypercube, bitwise Exclusive-OR, predefined bit string patterns, observation, hypercube networks, Hamming distance, isomorphism, binary matrix |
19 | Patrick W. Dowd |
Wavelength Division Multiple Access Channel Hypercube Processor Interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(10), pp. 1223-1241, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
wavelength division multiple access channel, hypercube-based structure, optical multiple access channels, star-coupled configurations, optical self-routing characteristic, optical fibres, performance, performance analysis, parallel architectures, computer networks, multiprocessor interconnection networks, hypercube networks, wavelength division multiplexing, optical communication, optical communication, system complexity |
19 | Arif Ghafoor, Theodore R. Bashkow |
A Study of Odd Graphs as Fault-Tolerant Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(2), pp. 225-232, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
odd graphs, fault-tolerant interconnection networks, binary n-cube, flip-trees, self-routing algorithms, maximal fault tolerance, partitioning property, self-diagnostics, parallel architectures, fault tolerant computing, mesh, resilience, persistence, ring, star, chordal ring, Hadamard matrices |
19 | Insup Lee 0001, David Smitley |
A Synthesis Algorithm for Reconfigurable Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(6), pp. 691-699, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
reconfigurable interconnection networks, target parallel system, average-case performance prediction, simulation, performance evaluation, performance, parallel algorithm, parallel algorithms, graph theory, task graph, synthesis algorithm |
19 | Sudhakar Yalamanchili, Jake K. Aggarwal |
A Characterization and Analysis of Parallel Processor Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(6), pp. 680-691, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
single-stage networks, Combinatorial power, near neighbor meshes, interconnection networks, permutations, ring networks, multistage networks, permutation groups |
19 | William J. Dally, Charles L. Seitz |
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(5), pp. 547-553, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
message passing multiprocessors, parallel processing, interconnection networks, Communication networks, graph model, concurrent computation |
19 | Pinaki Mazumder |
Evaluation of On-Chip Static Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(3), pp. 365-369, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
static interconnection networks, Binary tree, VLSI implementation, cube connected cycles, two-dimensional meshes |
19 | Kathleen M. Nichols, David G. Messerschmitt |
Traffic-Specific Interconnection Networks for Multicomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(10), pp. 1183-1196, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
Algorithm-specific architectures, heuristic topology generation, interconnection network architectures, multi- computers, parallel processing, multiprocessors |
19 | Ted H. Szymanski, V. Carl Hamacher |
On the Permutation Capability of Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(7), pp. 810-822, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
performance analysis, multistage interconnection networks, Banyan networks, crossbar networks |
19 | Lois Wright Hawkes |
A Regular Fault-Tolerant Architecture for Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(7), pp. 677-680, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
fault tolerance, Architecture, interconnection network, fault diagnosis, distributed, graph, topology |
19 | Nam Sung Woo, Ashok K. Agrawala |
A Symmetric Tree Structure Interconnection Network and its Message Traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(8), pp. 765-769, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
top-down/left-right symmetric tree structure, Extended even-odd node numbering, interconnection network for VLSI implementation, message traffic analysis |
19 | A. Yavuz Oruç, M. Yaman Oruç, Norman Balabanian |
Reconfiguration Alfoithms for Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(8), pp. 773-776, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
permutation map, Conjugation map, cycle map, interconnection network, functional equivalence |
19 | Laxmi N. Bhuyan |
An Analysis of Processor-Memory Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(3), pp. 279-283, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
multiprocessor performance, favorite memories, Bandwidth, multistage interconnection networks, crossbar switches |
19 | John Paul Shen, John P. Hayes |
Fault-Tolerance of Dynamic-Full-Access Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 33(3), pp. 241-248, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
Eulerian graphs, fault-tolerance, parallel processing, interconnection networks, fault diagnosis |
19 | Clyde P. Kruskal, Marc Snir |
The Performance of Multistage Interconnection Networks for Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(12), pp. 1091-1098, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
uniform network, bidelta network, buffered network, dilated network, replicated network, square network, unbuffered network, simulation, performance analysis, throughput, Bandwidth, multistage interconnection network, packet-switching network, banyan network, circuit-switching network, delta network, crossbar network |
19 | Krishnan Padmanabhan, Duncan H. Lawrie |
A Class of Redundant Path Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(12), pp. 1099-1108, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
redundant path networks, nonblocking networks, fault tolerance, parallel processing, interconnection networks, multiprocessor systems, Array processors, Omega networks |
19 | Laxmi N. Bhuyan, Dharma P. Agrawal |
Design and Performance of Generalized Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(12), pp. 1081-1090, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
probability of acceptance, cost factor, generalized shuffle, m-shuffle, mixed radix number system, Bandwidth, multistage interconnection networks, network optimization, permutation and combination |
19 | Mark A. Franklin, Donald F. Wann, William J. Thomas |
Pin Limitations and Partitioning of VLSI Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(11), pp. 1109-1116, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
Banyan, pin limitations, synchronization, interconnection networks, multiprocessors, crossbar |
19 | George B. Adams III, Howard Jay Siegel |
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(5), pp. 443-454, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
supersystems, Extra Stage Cube, Generalized Cube, indirect binary n-cube, PUMPS, fault tolerance, parallel processing, interconnection network, Distributed processing, omega, shuffle-exchange, PASM |
19 | Will E. Leland, Marvin H. Solomon |
Dense Trivalent Graphs for Processor Interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(3), pp. 219-222, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
multicomputer, undirected graphs, interconnection topology, Cubic graphs |
19 | Shyue B. Wu, Ming T. Liu |
A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 30(4), pp. 254-264, 1981. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
Bus load, cluster structure, large multimicrocomputer systems, interconnection network, distributed processing, topological optimization, traffic congestion, message delay |
19 | Tse-Yun Feng, Chuan-lin Wu |
Fault-Diagnosis for a Class of Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 30(10), pp. 743-758, 1981. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
Baseline network, fault detection and location, parallel processing, fault model, multistage interconnection networks, multiple faults, single fault |
19 | Chuan-lin Wu, Tse-Yun Feng |
On a Class of Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 29(8), pp. 694-702, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
routing techniques, parallel processing, interconnection networks, computer architecture, conflict resolution, network configurations, SIMD machine, Array processing, multiple- processor systems, MIMD machine |
18 | Chi-Ping Lee, Jiun-Shiou Deng, Ming-Feng Lu, Chien-Ping Chang, Yang-Tung Huang, Ping-Yu Kuei |
Multicast Network with MMI-Based Optical Switches on Active Splitter/Active Combiner Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: The 10th International Symposium on Pervasive Systems, Algorithms, and Networks, ISPAN 2009, Kaohsiung, Taiwan, December 14-16, 2009, pp. 579-585, 2009, IEEE Computer Society, 978-0-7695-3908-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
active splitter/active combiner (AS/AC) network, multimode interference (MMI), Multicast, multistage interconnection network (MIN), optical interconnection network |
18 | Thomas William Ainsworth, Timothy Mark Pinkston |
Characterizing the Cell EIB On-Chip Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 27(5), pp. 6-14, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multiple data stream architectures, multiprocessors, multicore architectures, interconnection architectures, on-chip interconnection networks |
18 | Samuel T. Chanson, Wantao Deng, Chi-Chung Hui, Xueyan Tang, Ming Yan To |
Multidomain Load Balancing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: Eighth Annual International Conference on Network Protocols, ICNP 2000, 14-17 November, 2000, Osaka, Japan, pp. 315-324, 2000, IEEE Computer Society, 0-7695-0921-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
multidomain load balancing, Internet communication speed, lag time, load information updating, job transfer, least load scheduler, update techniques, machine load, BALANCE testbed, performance evaluation, Internet, delays, local area networks, system performance, hierarchical structure, LAN interconnection, LAN interconnection, network cost, load balancing algorithms, limited bandwidth |
18 | Tadayoshi Horita, Itsuo Takanami |
A System for Efficiently Self-Reconstructing E-1½-Track Switch Torus Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 5th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN 2000), 7-10 December 2000, Dallas / Richardson, TX, USA, pp. 44-49, 2000, IEEE Computer Society, 0-7695-0936-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Hierarchical interconnection, Wafer scale integration (WSI), 3D stacked implementation, Peak number of vertical links, Interconnection networks, Massively parallel computer |
18 | Jens Lienig |
Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 27-31, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
minimized crosstalk, interconnection routing, interconnection crosstalk, VLSI channel routing, VLSI switchbox routing, distributed workstation network, VLSI, VLSI design, parallel genetic algorithm |
18 | Sang-Bang Choi, Arun K. Somani |
Desgin and Performance Analysis of Load-Distributing Fault-Tolerant Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(5), pp. 540-551, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
cube interconnection network (CIN), extra link MIN (ELMIN), extra link CIN (ELCIN), packet switching, Multistage interconnection network (MIN), redundant paths |
18 | H. Bekker, E. J. Dijkstra |
Delay-Insensitive Synchronization on a Message-Passing Architecture with an Open Collector Bus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), January 24-26, 1996, Portugal, pp. 75-79, 1996, IEEE Computer Society, 0-8186-7376-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
delay-insensitive synchronization, open collector bus, high latency, constraint algorithm, SHAKE, Constraint Molecular Dynamics simulation, ring architecture, delay insensitive algorithm, performance evaluation, performance, parallel algorithms, parallel algorithms, parallel architectures, message passing, multiprocessor interconnection networks, multiprocessor interconnection networks, synchronisation, digital simulation, physics computing, system buses, communication time, message passing architecture |
18 | Anjan K. Venkatramani, Timothy Mark Pinkston, José Duato |
Generalized Theory for Deadlock-Free Adaptive Wormhole Routing and its Application to Disha Concurrent. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 815-821, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
deadlock-free adaptive wormhole routing, Disha Concurrent, central buffers, sequential recovery, resource cost, mutual exclusive access, deadlock-free lane, tree-based networks, performance evaluation, parallel architectures, fault tolerant computing, concurrency control, multiprocessor interconnection networks, multiprocessor interconnection networks, network routing, system recovery, edge, Token, Hamiltonian path, deadlock recovery, k-ary n-cube networks |
18 | Ming-Yang Su, Gen-Huey Chen, Dyi-Rong Duh |
A linear-time algorithm for computing the diameters of the incomplete WK-recursive networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 90-97, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
multistage graphs, prune-and-search technique, interconnection network, multiprocessor system, multistage interconnection networks, linear-time algorithm, WK-recursive networks |
18 | Jon M. Kleinberg, Éva Tardos |
Disjoint Paths in Densely Embedded Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 36th Annual Symposium on Foundations of Computer Science, Milwaukee, Wisconsin, USA, 23-25 October 1995, pp. 52-61, 1995, IEEE Computer Society, 0-8186-7183-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
densely embedded graphs, communication paths, nearly-Eulerian graphs, locally planar interconnection networks, constant-factor approximation algorithm, maximum disjoint paths, on-line setting, routing, computational geometry, heuristics, multiprocessor interconnection networks, trees (mathematics), high-speed networks, operations research, disjoint paths, two-dimensional mesh |
18 | Nabanita Das 0001, Jayasree Dattagupta |
A fault location technique and alternate routing in Benes network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 71-, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
fault location technique, single switch fault, recirculation, source-destination path, routing technique, exact locations, multiple switch fault detection, one bit test vectors, equivalent fault set, fault diagnosis, fault tolerant computing, reconfiguration, reconfigurable architectures, multistage interconnection networks, multistage interconnection networks, network routing, Benes network, rearrangeable network, alternate routing |
18 | Daw-Jong Shyu, Biing-Feng Wang, Chuan Yi Tang |
The emulation problem on trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 251-255, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
emulation problem, optimal emulation, X-trees, m-ary trees, parallel algorithms, parallel algorithms, interconnection networks, multiprocessor interconnection networks, trees, pyramids |
18 | Richard Games, Arkady Kanevsky, Peter C. Krupp, Leonard Monk |
Real-time communications scheduling for massively parallel processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 1st IEEE Real-Time Technology and Applications Symposium, Chicago, Illinois, USA, May 15-17, 1995, pp. 76-85, 1995, IEEE Computer Society, 0-8186-6980-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
real-time communications scheduling, computationally intensive, lifecycle costs, large-scale scientific computing, software challenges, processing nodes, real-time application benchmarks, scheduling, performance evaluation, fault tolerance, real-time systems, parallel processing, multiprocessor interconnection networks, multiprocessor interconnection networks, real-time scheduling, processor scheduling, real-time applications, massively parallel processors, multi-level security |
18 | Robert Cypher, Luis Gravano |
Storage-Efficient, Deadlock-Free Packet Routing Algorithms for Torus Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(12), pp. 1376-1385, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
deadlock-free packet routing algorithms, torus interconnection networks, minimal length packet routing, VLSI, multiprocessor interconnection networks, packet switching, VLSI implementation, torus networks |
18 | Prasant Mohapatra, Chita R. Das, Tse-Yun Feng |
Performance Analysis of Cluster-Based Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(1), pp. 109-114, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
cluster-based multiprocessors, M/D/1/L queues, finite buffer behavior, system level analysis, results validation, buffer length, bottleneck centre identification, design configurations, simulation, simulation, performance evaluation, performance analysis, interconnection network, throughput, multiprocessor interconnection networks, queueing theory, multiprocessing systems, buffer storage, queueing model, design alternatives, decomposition technique, subsystems, processor utilization, average delay, deterministic service time |
18 | Tse-Yun Feng, Seung-Woo Seo |
A New Routing Algorithm for a Class of Rearrangeable Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(11), pp. 1270-1280, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
butterfly connections, symmetric networks, looping algorithm, center-stage connection patterns, topological equivalence, interchangeable group, destination-tag scheme, multiprocessor interconnection networks, routing algorithm, reconfigurable architectures, multistage interconnection networks, network routing, Omega networks, rearrangeable networks |
18 | Annette Lagman, Walid A. Najjar, Pradip K. Srimani |
An Analysis of Edge Fault Tolerance in Recursively Decomposable Regular Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(4), pp. 470-475, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
edge fault tolerance, recursively decomposable, edge failures, fault tolerance measures, restricted resilience, probabilistic fault tolerance measures, reliability, interconnection networks, fault tolerant computing, multiprocessor interconnection networks, network topology, network topologies, resilience, topological properties, regular networks, probabilistic measures, large scale multiprocessor |
18 | Shahram Latifi |
Task Allocation in the Star Graph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(11), pp. 1220-1224, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
processor interconnection, special subgraphs, substars, star code, statically optimal, recognition ability, substarrecognition, graph theory, resource allocation, parallel architectures, multiprocessor interconnection networks, task allocation, star graph, topological features |
18 | Dilip D. Kandlur, Kang G. Shin, Domenico Ferrari |
Real-Time Communication in Multihop Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(10), pp. 1044-1056, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
unpredictable delays, task execution, predictable interprocess communication, point-to-point interconnection networks, maximum delivery time, unidirectional connection, source-destination communication, sensor station, communications subsystem, delivery time guarantees, scheduling, scheduling, performance evaluation, real-time systems, real-time systems, reliability, parallel architectures, fault tolerant computing, message passing, multiprocessor interconnection networks, real-time communication, multihop networks, performance requirements, buffer allocation, real-time channel, message delivery |
18 | Khaled Day, Anand R. Tripathi |
Embedding of Cycles in Arrangement Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(8), pp. 1002-1006, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
cycles embeddings, large multiprocessor systems, node disjoint cycles, multiprocessor interconnection networks, Hamiltonian cycles, interconnection topology, arrangement graphs |
18 | Anujan Varma, Suresh Chalasani |
Fault-Tolerance Analysis of One-Sided Crosspoint Switching Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(2), pp. 143-158, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
one-sided crosspoint switching networks, crosspoint faults, multiple-bus interconnection networks, multiple-bus configurations, fault set, nonblocking switch matrix, fault-tolerance, fault tolerant computing, connectivity, multiprocessor interconnection networks, upper bounds, ports, rearrangeable |
18 | David Goldfeld, Tuvi Etzion |
UPP Graphs and UMFA Networks-Architecture for Parallel Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(11), pp. 1479-1483, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
UMFA networks, unique path property, uniform minimal full access, interconnection networks, parallel architectures, lower bound, multiprocessor interconnection networks, isomorphism, Omega network, rearrangeability |
18 | De-Lei Lee |
Architecture of an Array Processor Using a Nonlinear Skewing Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(4), pp. 499-505, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
nonlinear skewing scheme, array processor architecture, interconnection network, parallel architectures, multiprocessor interconnection networks, cellular arrays, array processor, skewing schemes |
18 | Hong Jiang, Kenneth C. Smith |
PPMB: A Partial-Multiple-Bus Multiprocessor Architecture with Improved Cost-Effectiveness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(3), pp. 361-366, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
PPMB, partial-multiple-bus multiprocessor architecture, processor-oriented partial-multiple-bus, memory-oriented partial-multiple-bus, system bandwidth, simulation, performance evaluation, design, performance analysis, interconnection networks, computer architecture, multiprocessor interconnection networks, cost-effectiveness, arbitration |
18 | Ashwani Kumar Ramani, Pradip K. Chande, Pramod C. Sharma |
A General Model for Performance Investigations of Priority Based Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(6), pp. 747-754, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
discrete time semi-Markov model, task priorities, crossbar interconnection network, performance evaluation, load balancing, multiprocessor interconnection networks, Markov processes, performance measures, multiprocessing systems, multiprocessor system, task scheduling, performance optimization, system performance |
18 | Yuanyuan Yang 0001, Gerald M. Masson |
Nonblocking Broadcast Switching Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(9), pp. 1005-1015, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
processor interconnection, network control algorithm, multiprocessor interconnection networks, switching networks, nonblocking, broadcast networks, parallel processing systems, multistage |
18 | Ming-Syan Chen, Kang G. Shin, Dilip D. Kandlur |
Addressing, Routing, and Broadcasting in Hexagonal Mesh Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(1), pp. 10-18, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
hexagonal mesh multiprocessors, six-regular graphs, H-meshes, square meshes, routing, graph theory, broadcasting, hypercubes, multiprocessor interconnection network, multiprocessor interconnection networks, trees, addressing |
18 | Hyunsoo Yoon, Kyungsook Y. Lee, Ming T. Liu |
Performance Analysis of Multibuffered Packet-Switching Networks in Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(3), pp. 319-327, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
multibuffered packet-switching networks, single-buffered delta networks, performance evaluation, interconnection networks, virtual machines, multiprocessor interconnection networks, packet switching, multiprocessor systems, simulation results, state transition diagram |
18 | Jyh-Charn Liu, Kang G. Shin |
Polynomial Testing of Packet Switching Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(2), pp. 202-217, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
polynomial testing, multiple stuck-at fault model, functional testing method, network level, switch level, network-level testing, built-in tester, multiprocessor interconnection networks, packet switching, multiprocessor systems, automatic testing, polynomials, multistage interconnection networks, packet switching networks, routing dynamic |
18 | Woei Lin, Chuan-lin Wu |
A Fault-Tolerant Mapping Scheme for a Configurable Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(2), pp. 227-237, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
fault-tolerant mapping scheme, configurable multiprocessor system, interprocessor connections, linear address space, parallel computation, fault tolerant computing, multiprocessor interconnection networks, configurability, multistage interconnection networks |
18 | Arif Ghafoor, Theodore R. Bashkow, Imran Ghafoor |
Bisectionla Fault-Tolerant Communication Archtecture for Supercomputer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(10), pp. 1425-1446, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
supercomputer systems, bisectional interconnection network, symmetric balanced incomplete block design, SBIBD, fault tolerance, fault tolerant computing, partitioning, multiprocessor interconnection networks, communication architecture, self-routing, combinatorial structure |
18 | Laxmi N. Bhuyan, Dipak Ghosal, Qing Yang 0001 |
Approximate Analysis of Single and Multiple Ring Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(7), pp. 1027-1040, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
asynchronous packet switched interconnection networks, single ring networks, multiple ring networks, register-insertion-ring protocols, uniform analysis, M/G/1 queuing model, symmetric ring structure, nonexhaustive service policy, infinite queue length, simulation, performance evaluation, performance evaluation, protocols, performance models, multiprocessor interconnection networks, packet switching, analytical models, multiprocessing, decentralized control, token-ring, slotted-ring, data-flow architectures |
18 | Hungwen Li, Massimo Maresca |
Polymorphic-Torus Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(9), pp. 1345-1351, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
polymorphic-torus network, parallel fine-grained, circuit-switching capability, wiring complexity, interpackage wiring, max/min, sum operations, interconnection network, multiprocessor interconnection networks, SIMD, communication bandwidth, Boolean |
18 | P. Bruce Berra, Arif Ghafoor, Pericles A. Mitkas, Slawomir J. Marcinkowski, Mohsen Guizani |
The Impact of Optics on Data and Knowledge Base Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 1(1), pp. 111-132, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
optical database machines, optical knowledge base machines, optical disks, page-oriented holographic memories, optical content addressable memories, full text processing, optical processing, digital optical device development, knowledge base systems, knowledge based systems, database management systems, interconnection, processing, storage, database systems, optical interconnection, data communication, optics, optical information processing, optoelectronic, optical storage |
18 | Dalibor F. Vrsalovic, Daniel P. Siewiorek, Zary Segall, Edward F. Gehringer |
Performance Prediction and Calibration for a Class of Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(11), pp. 1353-1365, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
predicting multiprocessor performance, experimental measurements, performance evaluation, parallel algorithms, interconnection network, parallel architectures, multiprocessor interconnection networks, iterative methods, calibration, performance prediction, iterative algorithms, access time, processing time |
18 | Howard P. Katseff |
Incomplete Hypercubes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(5), pp. 604-608, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
k-dimensional hypercube, routing, multiprocessor interconnection networks, broadcast algorithms, interconnection topology, deadlock-free, incomplete hypercubes |
18 | Shing-Tsaan Huang, Satish K. Tripathi |
Self-Routing Technique in Perfect-Shuffle Networks Using Control Tags. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(2), pp. 251-256, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
unscrambling, control tags, self-routing technique, multiple-pass perfect-shuffle networks, bit-permute-complement permutations, inverse-omega-realizing sets, computational complexity, computational complexity, multiprocessor interconnection networks, multiprocessor interconnection networks, set theory, permutation networks, set intersections |
18 | Nathalie Homobono, Claudine Peyrat |
Connectivity of Imase and Itoh Digraphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(11), pp. 1459-1461, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
Itoh digraphs, interconnection networks, fault tolerant computing, multiprocessor interconnection networks, directed graphs, digraphs |
16 | Aharon J. Agranat, Noam Sapiens, Larry Rudolph |
Dynamic Optical Circuit Switching Applied to Storage Area Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OSC ![In: Optical SuperComputing, Second International Workshop, OSC 2009, Bertinoro, Italy, November 18-20, 2009. Proceedings, pp. 144, 2009, Springer, 978-3-642-10441-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Cees T. A. M. de Laat, Chris Develder, Admela Jukan, Joe Mambretti |
Introduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009. Proceedings, pp. 1013-1014, 2009, Springer, 978-3-642-03868-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Ricardo S. Ferreira 0001, Marcone Laure, Antonio Carlos Schneider Beck, Thiago Lo, Mateus B. Rutzig, Luigi Carro |
A low cost and adaptable routing network for reconfigurable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Dietmar Tutsch, Miroslaw Malek |
Comparison of network-on-chip topologies for multicore systems considering multicast and local traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SimuTools ![In: Proceedings of the 2nd International Conference on Simulation Tools and Techniques for Communications, Networks and Systems, SimuTools 2009, Rome, Italy, March 2-6, 2009, pp. 23, 2009, ICST/ACM, 978-963-9799-45-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
simulation, performance, multicast, network-on-chip, multicore processor |
16 | Dohoon Kim |
An architecture for internet inter-domain interconnections and bandwidth trading towards effective NGN deployment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. des Télécommunications ![In: Ann. des Télécommunications 63(11-12), pp. 607-619, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Internet interconnections, Bandwidth trading, Hub-and-spoke network, Network operations and management, NGN, Inter-Domain routing, End-to-end QoS, Network economics |
16 | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk |
High-throughput interconnect wave-pipelining for global communication in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 258, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Johan Koopman, Dimitri Jeltsema, Michel Verhaegen |
Port-Hamiltonian formulation and analysis of the LuGre friction model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC ![In: Proceedings of the 47th IEEE Conference on Decision and Control, CDC 2008, December 9-11, 2008, Cancún, Mexico, pp. 3181-3186, 2008, IEEE, 978-1-4244-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Shakith Fernando, Xiaolei Chen, Yajun Ha |
sFPGA - A scalable switch based FPGA architecture and design methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 95-100, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Alberto Ros 0001, Manuel E. Acacio, José M. García 0001 |
DiCo-CMP: Efficient cache coherency in tiled CMP architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-11, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Vytautas Valancius, Nick Feamster, Ramesh Johari, Vijay V. Vazirani |
MINT: a Market for INternet Transit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoNEXT ![In: Proceedings of the 2008 ACM Conference on Emerging Network Experiment and Technology, CoNEXT 2008, Madrid, Spain, December 9-12, 2008, pp. 70, 2008, ACM, 978-1-60558-210-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Pere Martí-Puig, Ramón Reig Bolaño, Vicenç Parisi Baradad |
Radix-R FFT and IFFT Factorizations for Parallel Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCAI ![In: International Symposium on Distributed Computing and Artificial Intelligence, DCAI 2008, University of Salamanca, Spain, 22th-24th October 2008, pp. 152-160, 2008, Springer, 978-3-540-85862-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Parallel algorithms, Fast Fourier Transform, Fast algorithms |
16 | Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis |
Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 40(2), pp. 127-157, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Coarse-grained reconfigurable arrays, Data bandwidth bottleneck, Reconfigurable computing, Data reuse, Compiler techniques |
16 | Anup Gangwar, M. Balakrishnan, Anshul Kumar |
Impact of intercluster communication mechanisms on ILP in clustered VLIW architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(1), pp. 1:1-1:29, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
performance evaluation, VLIW, ASIP, clustered VLIW processors |
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