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Found 2273 publication records. Showing 2273 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Thibaut Gurne, Maarten Strackx, Maarten Tytgat, Jan Cools, Patrick Reynaert |
A 20Gbps 1.2GHz full-duplex integrated AFE in 28nm CMOS for copper access.  |
ESSCIRC  |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Amayreh, Yiannos Manoli, Matthias Keller |
A 1.85 fA/√Hz fully integrated read-out interface for sub-pA current sensing applications. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Simone Del Cesta, Andrea Ria, Roberto Simmarano, Massimo Piotto, Paolo Bruschi |
A compact programmable differential voltage reference with unbuffered 4 mA output current capability and ±0.4 % untrimmed spread. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Lorenzo Pedala, Cagri Gurleyuk, Sining Pan, Fabio Sebastiano, Kofi A. A. Makinwa |
A frequency-locked loop based on an oxide electrothermal filter in standard CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Minuk Heo, Sunghyun Bae, Jayeol Lee, Cheonsu Kim, Minjae Lee |
Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibration. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingu Kang, Sujan K. Gonugondla, Naresh R. Shanbhag |
A 19.4 nJ/decision 364K decisions/s in-memory random forest classifier in 6T SRAM array. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Henning Schütz, Stefan Gambach, Hans Kaim, Albrecht Rothermel |
Pixel array with 5×5 spatial highpass filter for a retinal implant. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sven Mattisson |
Overview of 5G requirements and future wireless networks. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Guan-Cheng Wang, Yan Zhu 0001, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins |
A missing-code-detection gain error calibration achieving 63dB SNR for an 11-bit ADC. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sirma Orguc, Harneet Singh Khurana, Hae-Seung Lee, Anantha P. Chandrakasan |
0.3 V ultra-low power sensor interface for EMG. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Joao Pedro Cerqueira, Mingoo Seok |
A 0.17-mm2 3.19-nJ/transform 256-point fast fourier transform core based on spatiotemporally fine-grained active leakage suppression. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Harijot Singh Bindra, Anne-Johan Annema, Simon M. Louwsma, Ed J. M. van Tuijl, Bram Nauta |
An energy reduced sampling technique applied to a 10b 1MS/s SAR ADC. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hechen Wang, Fa Foster Dai |
A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | |
43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017, Leuven, Belgium, September 11-14, 2017 |
ESSCIRC |
2017 |
DBLP BibTeX RDF |
|
| 1 | Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski |
A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Takashi Oshima, Taizo Yamawaki, Koji Maeda |
A 0.11mm2 164dB-FOM 0.18μm CMOS pipelined ADC with novel passive amplification. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Henna Ruokamo, Lauri Hallman, Harri Rapakko, Juha Kostamovaara |
An 80 × 25 pixel CMOS single-photon range image sensor with a flexible on-chip time gating topology for solid state 3D scanning. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Zhao 0003, Yong Lian 0001, Ali M. Niknejad, Chun-Huat Heng |
A low-power compact IEEE 802.15.6 compatible human body communication transceiver with digital sigma-delta IIR mask shaping. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Preet Garcha, Dina El-Damak, Nachiket V. Desai, Jorge Troncoso, Erika Mazotti, Joyce Mullenix, Shaoping Tang, Django Trombley, Dennis Buss, Jeffrey H. Lang, Anantha P. Chandrakasan |
A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran |
A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Athanasios Ramkaj, Maarten Strackx, Michiel Steyaert, Filip Tavernier |
A 36.4dB SNDR @ 5GHz 1.25GS/s 7b 3.56mW single-channel SAR ADC in 28nm bulk CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Giuseppe E. Biccario, Massimo de Vittorio, Stefano D'Amico |
A 2.4μW input power electronic interface circuit for piezoelectric MEMS harvesters. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Dennis Oland Larsen, Martin Vinter, Ivan H. H. Jørgensen |
Switched capacitor DC-DC converter with switch conductance modulation and Pesudo-fixed frequency control. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Anthony Quelen, Franck Badets, Gaël Pillonnet |
A sub-100nW power supply unit embedding untrimmed timing and voltage references for duty-cycled μW-range load in FDSOI 28nm. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Guanhua Wang, Kexu Sun, Qing Zhang 0021, Salam Elahmadi, Ping Gui |
A 43.6-dB SNDR 1-GS/s single-channel SAR ADC using coarse and fine comparators with background comparator offset calibration. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Samar Elsaegh, Hans Zappe, Yiannos Manoli, Hagen Klauk, Ute Zschieschang |
A 1.6μW tunable organic transimpedance amplifier for photodetector applications based on gain-boosted common-gate input stage and voltage-controlled resistor with ±0.5% nonlinearity. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyung-Gi Kim, Dong-Woo Jee |
A <25 μW CMOS monolithic photoplethysmographic sensor with distributed 1b delta-sigma light-to-digital convertor. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Sheng Ma, Wen-Hau Yang, Yen-Ting Lin, Hsin Chen, Li-Chi Lin, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai, Jui-Lung Chen |
A low quiescent current and cross regulation single-inductor dual-output converter with stacking MOSFET driving technique. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan |
Single-BAW multi-channel transmitter with low power and fast start-up time. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Danilo Montanari, Danilo Manstretta, Rinaldo Castello, Gerardo Castellano |
A 0.7-2 GHz auxiliary receiver with enhanced compression for SAW-less FDD. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Kwantae Kim, Kiseok Song, Kyeongryeol Bong, Jaehyuk Lee, Kwonjoon Lee, Yongsu Lee, Unsoo Ha, Hoi-Jun Yoo |
A 24 μW 38.51 mΩrms resolution bio-impedance sensor with dual path instrumentation amplifier. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastien Leroy, Stefan Rigert, Arnaud Laville, Andrea Ajbl, Gael F. Close |
Integrated hall-based magnetic platform for position sensing. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Reyserhove, Wim Dehaene |
Design margin elimination in a near-threshold timing error masking-aware 32-bit ARM Cortex M0 in 40nm CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Ramnarayanan Muthukaruppan, Tarun Mahajan, Harish Kumar Krishnamurthy, Sumedha Mangal, Am Dhanashekar, Rupak Ghayal, Vivek De |
A digitally controlled linear regulator for per-core wide-range DVFS of atom™ cores in 14nm tri-gate CMOS featuring non-linear control, adaptive gain and code roaming. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Seongjong Kim, Joao Pedro Cerqueira, Mingoo Seok |
Near-Vt adaptive microprocessor and power-management-unit system based on direct error regulation. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems |
A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Rohan Sehgal, Frank M. L. van der Goes, Klaas Bult |
A 13mW 64dB SNDR 280MS/s pipelined ADC using linearized open-loop class-AB amplifiers. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Fuhrmann, J. Moreira, P. Osmann, Andreas Springer, Robert Weigel, Harald Pretl |
A 15-bit 28nm CMOS fully-integrated 1.6W digital power amplifier for LTE IoT. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyoohyun Lim, Sang-Hoon Lee, Byeongmoo Moon, Hwahyeong Shin, Kisub Kang, Yongha Lee, Seungbeom Kim, Jinhyeok Lee, Hyungsuk Lee, Hyunchul Shim, Cheolhoon Sung, Geumyoung Park, Garam Lee, Minjung Kim, Seokyoung Park, Hyosun Jung, Jong-Ryul Lee |
A 65nm CMOS 2×2 MIMO multi-band LTE RF transceiver for small cell base stations. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Yifeng Cai, Yiannos Manoli |
A piezoelectric energy harvester interface circuit with adaptive conjugate impedance matching, self-startup and 71% broader bandwidth. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Staffan Ek, Tony Påhlsson, Anders Carlsson, Andreas Axholt, Anna-Karin Stenman, Henrik Sjöland |
A 16-20 GHz LO system with 115 fs jitter for 24-30 GHz 5G in 28 nm FD-SOI CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Kunal Datta, James E. Jaussi, Bryan Casper |
A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Rui Ma, Peiyong Zhang, Xiaolang Yan, Yu Wang 0046, Mingyu Wang, Hao Min, C.-J. Richard Shi |
OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Saurabh Agarwal, Mark Ingels, Marianna Pantouvaki, Michiel Steyaert, Philippe Absil, Joris Van Campenhout |
Highly integrated wavelength-locked Si photonic ring transmitter using direct monitoring of drop-port OMA. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Arvind Singh, Monodeep Kar, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay |
Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage dithering. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Pasotti, Marcella Carissimi, Chantal Auricchio, Donatella Brambilla, Emanuela Calvetti, Laura Capecchi, Luigi Croce, Daniele Gallinari, Cristina Mazzaglia, Vikas Rana, Riccardo Zurla, Alessandro Cabrini, Guido Torelli |
A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Christopher Sutardja, Jan M. Rabaey |
Isolator-less near-field RFID reader for sub-cranial powering/data link of mm-sized implants. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Robin Ying, Matthew Morton, Alyosha C. Molnar |
A HBT-based 300 MHz-12 GHz blocker-tolerant mixer-first receiver. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan A. Leñero-Bardallo, José María Guerrero-Rodríguez, Lukasz Farian, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez |
A sun sensor implemented with an asynchronous luminance vision sensor. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel |
1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Hsien Wu, Liang-Yun Chen, Chia-Ling Wei |
Wide-input-voltage-range and high-efficiency energy harvester with a 155-mV startup voltage for solar power. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Wang 0023, Xiaoyang Wang 0003, Jiwoong Park, Abbas Barfidokht, Joseph Wang 0002, Patrick P. Mercier |
A 5.5 nW battery-powered wireless ion sensing system. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Qing Dong 0001, Inhee Lee, Kaiyuan Yang 0001, David T. Blaauw, Dennis Sylvester |
A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Changhyeon Kim, Kyeongryeol Bong, Injoon Hong, Kyuho Jason Lee, Sungpill Choi, Hoi-Jun Yoo |
An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Wu 0007, Dai Jiang, Peter J. Langlois, Richard H. Bayford, Andreas Demosthenous |
A CMOS current driver with built-in common-mode signal reduction capability for EIT. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdel Martinez Alonso, Masaya Miyahara, Akira Matsuzawa |
A 7GS/s direct digital frequency synthesizer with a two-times interleaved RDAC in 65nm CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Cheng-Hsueh Tsai, Giovanni Mangraviti, Qixian Shi, Khaled Khalaf, André Bourdoux, Piet Wambacq |
A 54-64.8 GHz subharmonically injection-locked frequency synthesizer with transmitter EVM between -26.5 dB and -28.8 dB in 28 nm CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Francesco Conzatti, Lukas Dörrer, Patrick Torta, Claus Kropf, Dirk Patzold, Jacinto San Pablo Garcia, Venerando Rallos, Norbert Schembera |
A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed for robust blocker tolerance in 14nm FinFET. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefan Shopov, Ozan D. Gurbuz, Gabriel M. Rebeiz, Sorin P. Voinigescu |
A 13.2-dBm, 138-GHz I/Q RF-DAC with 64-QAM and OFDM free-space constellation formation. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Atsushi Shirane, Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Toshiya Mitomo, Hiroyuki Kobayashi, Hiroshi Yoshida, Hideaki Majima, Ryuichi Fujimoto, Hiroshi Tsurumi |
A low voltage 0.8V RF receiver in 28nm CMOS for 5GHz WLAN. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Philipp Salz, A. Frisch, Wolfgang Penth, J. Noack, T. Kalla, Rolf Sautter, Michael Kugel, Otto A. Torreiter, G. Sapp, Mike Lee, Eric Fluhr, A. Rozenfeld, Jürgen Pille, Dieter F. Wendel |
A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technology. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Scaramuzza, Carlo Rubino, Marc Tiebout, Michele Caruso, Markus Ortner, Andrea Neviani, Andrea Bevilacqua |
Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systems. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Haine, Quoc-Khoi Nguyen, François Stas, Ludovic Moreau, Denis Flandre, David Bol |
An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Juergen Wittmann, Tobias Funk, Thoralf Rosahl, Bernhard Wicht |
A 12-48 V wide-vin 9-15 MHz soft-switching controlled resonant DCDC converter. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Wang 0023, Patrick P. Mercier |
A 1.6%/V 124.2 pW 9.3 Hz relaxation oscillator featuring a 49.7 pW voltage and current reference generator. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Adriano Sambucco, Emiliano A. Puia |
Push-pull amplifier with constant transconductance for a current sense application. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jialue Wang, Yang Jiang, Johan Dijkhuis, Guido Dolmans, Hao Gao 0001, Peter G. M. Baltus |
A 900 MHz RF energy harvesting system in 40 nm CMOS technology with efficiency peaking at 47% and higher than 30% over a 22dB wide input power range. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Harijot Singh Bindra, Chris E. Lokin, Anne-Johan Annema, Bram Nauta |
A 30fJ/comparison dynamic bias comparator. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander Sun, Enrique Alvarez-Fontecilla, A. G. Venkatesh, Eliah Aronoff Spencer, Drew A. Hall |
A 64×64 high-density redox amplified coulostatic discharge-based biosensor array in 180nm CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Yen-Ting Lin, Wen-Hau Yang, Yu-Sheng Ma, Yan-Jiun Lai, Hung-Wei Chen, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai |
Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Fahmy, Jun Liu 0038, Pavan Terdal, Ryan Madler, Rizwan Bashirullah, Nima Maghari |
A synthesizable time-based LDO using digital standard cells and analog pass transistor. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Niels Van Thienen, Patrick Reynaert |
A 120GHz in-band full-duplex PMF transceiver with tunable electrical-balance duplexer in 40nm CMOS. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Josip Mikulic, Gregor Schatzberger, Adrijan Baric |
A 1-MHz on-chip relaxation oscillator with comparator delay cancelation. |
ESSCIRC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Cheng Ju, Tsu-Ming Liu, Yung-Chang Chang, Chih-Ming Wang, Chia-Yun Cheng, Hue-Min Lin, Chun-Chia Chen, Min-Hao Chiu, Ping Chao, Ming-Long Wu, Meng-Jye Hu, Sheng-Jen Wang, Che-Hong Chen, Shun-Hsiang Chuang, Hsiu-Yi Lin, Fu-Chun Yeh, Chia-Hung Kao, Yi-Chang Chen, Chia-Lin Ho, Yenchieh Huang, Hsiao-En Chen, Chih-Wen Yang, Hsuan-Wen Peng |
A 2.6mm2 0.19nJ/pixel VP9 and multi-standard decoder LSI for Android 4K TV applications. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Saad Bin Nasir, Shreyas Sen, Arijit Raychowdhury |
A 130nm hybrid low dropout regulator based on switched mode control for digital load circuits. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeremy Constantin, Andrea Bonetti, Adam Teman, Thomas Christoph Müller, Lorenz Schmid, Andreas Burg |
DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolas Butzen, Michiel Steyaert |
MIMO Switched-Capacitor converter using only parasitic capacitance with Scalable Parasitic Charge Redistribution. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongsheng Yang 0002, Wei Deng 0001, Bangan Liu, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa |
An LC-DCO based synthesizable injection-locked PLL with an FoM of -250.3dB. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Loai G. Salem, James F. Buckwalter, Patrick P. Mercier |
A recursive house-of-cards digital power amplifier employing a λ/4-less Doherty power combiner in 65nm CMOS. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kan Takeuchi, Masaki Shimada, Takeshi Okagaki, Koji Shibutani, Koji Nii, Fumio Tsuchiya |
FEOL/BEOL wear-out estimator using stress-to-frequency conversion of voltage/temperature-sensitive ring oscillators for 28nm automotive MCUs. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Zen Chen, Po-I Kuo |
A ΔΣ TDC with sub-ps resolution for PLL built-in phase noise measurement. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Nandish Mehta, Chen Sun 0003, Mark T. Wade, Sen Lin, Milos A. Popovic, Vladimir Stojanovic |
A 12Gb/s, 8.6µApp input sensitivity, monolithic-integrated fully differential optical receiver in CMOS 45nm SOI process. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjuan Guo, Nan Sun 0003 |
A 12b-ENOB 61µW noise-shaping SAR ADC with a passive integrator. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaolin Lu, Il Han Kim, Ariton E. Xhafa, Jianwei Zhou |
WSN for Machine Area Network applications. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tetsuya Asai, Masafumi Mori, Toshiyuki Itou, Yasuhiro Take, Masayuki Ikebe, Tadahiro Kuroda, Masato Motomura |
Motion-vector estimation and cognitive classification on an image sensor/processor 3D stacked system featuring ThruChip interfaces. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Khondker Zakir Ahmed, Mohammad Faisal Amir, Jong Hwan Ko, Saibal Mukhopadhyay |
Reconfigurable 96×128 active pixel sensor with 2.1µW/mm2 power generation and regulated multi-domain power delivery for self-powered imaging. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhijie Chen, Masaya Miyahara, Akira Matsuzawa |
A stability-improved single-opamp third-order ΣΔ modulator by using a fully-passive noise-shaping SAR ADC and passive adder. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues |
A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Lutz, Peter Renz, Bernhard Wicht |
A 120/230 Vrms-to-3.3V micro power supply with a fully integrated 17V SC DCDC converter. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Qingrui Meng, Ramesh Harjani |
An easily extendable FFT based four-channel, four-beam receiver with progressive partial spatial filtering in 65nm. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Cheng-Ru Ho, Mike Shuo-Wei Chen |
Interference-induced DCO spur mitigation for digital phase locked loop in 65-nm CMOS. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Lorenzo Iotti, Andrea Mazzanti, Francesco Svelto |
A multi-core VCO and a frequency quadrupler for E-Band adaptive-modulation links in 55nm BiCMOS. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Ha Le-Thai, Adi Xhakoni, Georges G. E. Gielen |
A column-and-row-parallel CMOS image sensor with thermal and 1/f noise suppression techniques. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Teng Yang, Peter R. Kinget, Mingoo Seok |
Register file circuits and post-deployment framework to monitor aging effects in field. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Nathaniel Ross Pinckney, Dennis Sylvester, David T. Blaauw |
Supply boosting for high-performance processors in flip-chip packages. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Hans Reyserhove, Wim Dehaene |
A 16.07pJ/cycle 31MHz fully differential transmission gate logic ARM Cortex M0 core in 40nm CMOS. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Ahmad Bahai |
Ultra-low energy systems: Analog to information. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Zule Xu, Anugerah Firdauzi, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa |
A 2 GHz 3.1 mW type-I digital ring-based PLL. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Kwanyeob Chae, JongRyun Choi, Shinyoung Yi, Won Lee, Sanghoon Joo, Hyunhyuck Kim, Hyungkwon Yi, Yoonjee Nam, Jinho Choi, Sanghune Park, Sanghyun Lee |
A 690mV 4.4Gbps/pin all-digital LPDDR4 PHY in 10nm FinFET technology. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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| 1 | Harsh N. Patel, Abhishek Roy 0002, Farah B. Yahya, Ningxi Liu, Benton H. Calhoun, Kazuyuki Kumeno, Makoto Yasuda, Akihiko Harada, Taiji Ema |
A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for energy minimization in subthreshold SRAM and logic. |
ESSCIRC |
2016 |
DBLP DOI BibTeX RDF |
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