Search results for "FSM"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
17	Yannick Hervé	Simple Models for Complex Systems : A-FSM Template.	FDL	2003	DBLP BibTeX RDF
17	N. Venkateswaran 0002, V. Balaji, Venkataraman Mahalingam, T. L. Rajaprabhu	Analysis of Bit Transition Count for EDAC Encoded FSM.	IOLTS	2003	DBLP DOI BibTeX RDF
17	D. Breen, R. O'Neill, Tony D. Smith, A. Th. Schwarzbacher	VLSI implementation of a TSM/FSM algorithm.	MAVEBA	2003	DBLP BibTeX RDF
17	Khaled El-Fakih, Nina Yevtushenko 0001, Gregor von Bochmann	FSM-based Re-Testing Methods.	TestCom	2002	DBLP BibTeX RDF
17	Joerg Abke, Erich Barke	A Direct Mapping System for Datapath Module and FSM Implementation into LUT-Based FPGAs .	DATE	2002	DBLP DOI BibTeX RDF
17	Bengt Oelmann, Kalle Tammemäe, Margus Kruus, Mattias O'Nils	Automatic FSM Synthesis for Low-power Mixed Synchronous/Asynchronous Implementation.	VLSI Design	2001	DBLP DOI BibTeX RDF
17	Ik-Soon Hwang, Tae-Hyong Kim, Sung-Back Hong, Jai-Yong Lee	Test selection for a nondeterministic FSM.	Comput. Commun.	2001	DBLP DOI BibTeX RDF
17	Witold Jacak, Stephan Dreiseitl, Karin Pröll, Jerzy W. Rozenblit	Conflict management in multiagent robotic system: FSM and fuzzy logic approach.	SMC	2001	DBLP DOI BibTeX RDF
17	Anzhela Yu. Matrosova, K. Nikitin, Olga Goloubeva	Totally Self-Checking FSM Design Based on Multilevel Synthesis Methods and FPGA Implemetation.	IOLTW	2001	DBLP DOI BibTeX RDF
17	Witold Jacak, Karin Pröll, Stephan Dreiseitl	Conflict Management in an Intelligent Multiagent Robotics System Based on FSM Approach.	EUROCAST	2001	DBLP DOI BibTeX RDF
17	Takanori Mori, K. Tokuda, Harumasa Tada, Masahiro Higuchi, Teruo Higashino	A Method to Generate Conformance Test Sequences for FSM with Timer System Call.	FORTE	2001	DBLP BibTeX RDF
17	Anzhela Yu. Matrosova, Ilya Levin, Sergey Ostanin	Self-checking Synchronous FSM Network Design with Low Overhead.	VLSI Design	2000	DBLP DOI BibTeX RDF
17	Imtiaz Ahmad, Faridah M. Ali, Raza Ul-Mustafa	An integrated state assignment and flip-flop selection technique for FSM synthesis.	Microprocess. Microsystems	2000	DBLP DOI BibTeX RDF
17	José C. Monteiro 0001, Arlindo L. Oliveira	FSM decomposition by direct circuit manipulation applied to low power design.	ASP-DAC	2000	DBLP DOI BibTeX RDF
17	Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda	The General Product Machine: a New Model for Symbolic FSM Traversal.	Formal Methods Syst. Des.	1998	DBLP DOI BibTeX RDF
17	Klaus Feske, Steffen Rülke, Manfred Koegst	FPGA based prototyping using a target driven FSM partitioning strategy.	ICECS	1998	DBLP DOI BibTeX RDF
17	Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske	Multi-Criterial State Assignment for Low Power FSM Design.	EUROMICRO	1998	DBLP DOI BibTeX RDF
17	Gianpiero Cabodi, Paolo Camurati	Symbolic FSM traversals based on the transition relation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
17	Klaus Feske, Sven Mulka, Manfred Koegst, Günter Elst	Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs.	FPL	1997	DBLP DOI BibTeX RDF
17	T. Ramalingam, Anindya Das, Krishnaiyan Thulasiraman	Corrigendum to 'fault detection and diagnosis capabilities of test sequence selection methods based on the FSM model' : [Computer Comm. 18(1995) 113].	Comput. Commun.	1996	DBLP DOI BibTeX RDF
17	Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi	Algorithms for approximate FSM traversal based on state space decomposition.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
17	Juha Viskari, Risto Jokinen, Kari Hakkarainen	A Generic FSM Interpreter for Embedded Systems.	RTS	1996	DBLP DOI BibTeX RDF
17	Manfred Koegst, Klaus Feske, Günter Franke	State assignment for FSM low power design.	EURO-DAC	1996	DBLP DOI BibTeX RDF
17	Akhilesh Tyagi	Entropic bounds on FSM switching.	ISLPED	1996	DBLP DOI BibTeX RDF
17	Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich	Enhancing FSM Traversal by Temporary Re-Encoding.	ICCD	1996	DBLP DOI BibTeX RDF	Formal Verification, Computer-Aided Design
17	Lakshmikant Bhupathi, Liang-Fang Chao	Dichotomy-based Model for FSM Power Minimization.	ICCD	1996	DBLP DOI BibTeX RDF
17	Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto	Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques.	DAC	1996	DBLP DOI BibTeX RDF
17	Sunil P. Khatri, Amit Narayan, Sriram C. Krishnan, Kenneth L. McMillan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli	Engineering Change in a Non-Deterministic FSM Setting.	DAC	1996	DBLP DOI BibTeX RDF
17	T. Ramalingam, Anindya Das, Krishnaiyan Thulasiraman	Fault Detection and Diagnosis Capabilities of Test Sequence Selection Methods Based on the FSM Model.	Comput. Commun.	1995	DBLP BibTeX RDF
17	T. Ramalingam, Anindya Das, Krishnaiyan Thulasiraman	On Testing and Diagnosis of Communication Protocols Based on the FSM Model.	Comput. Commun.	1995	DBLP BibTeX RDF
17	Huey-Yih Wang, Robert K. Brayton	Multi-level logic optimization of FSM networks.	ICCAD	1995	DBLP DOI BibTeX RDF
17	Hsin-Chu Chen	Combining SAS with FSM for Plate-bending Problems.	PPSC	1995	DBLP BibTeX RDF
17	Teruo Higashino, Akio Nakata, Tatsuo Itoh, Kenichi Taniguchi	Verification of Liveness Property for Communicating FSM's with Conditional Transitions Depending on State Visiting Numbers.	FORTE	1995	DBLP BibTeX RDF
17	Andrzej Hlawiczka, Jacek Binda	Optimized Synthesis of Self-Testable Finite State Machines (FSM) Using BIST-PST Structures in Altera Structures.	FPL	1994	DBLP DOI BibTeX RDF
17	Chung-Shyan Liu, Kuo-Hua Su	An FSM-based program generator for communication protocol software.	COMPSAC	1994	DBLP DOI BibTeX RDF
17	Yosinori Watanabe, Robert K. Brayton	State Minimization of Pseudo Non-Deterministic FSM's.	EDAC-ETC-EUROASIC	1994	DBLP DOI BibTeX RDF
17	Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi	A State Space Decomposition Algorithm for Approximate FSM Traversal.	EDAC-ETC-EUROASIC	1994	DBLP DOI BibTeX RDF
17	Ming Yu Yao, Alexandre Petrenko, Gregor von Bochmann	Fault Coverage Analysis in Respect to an FSM Specification.	INFOCOM	1994	DBLP DOI BibTeX RDF
17	D. Schin, Yinan N. Shen, Fabrizio Lombardi	An Approach for UIO Generation for FSM Verification and Validation.	ISCAS	1994	DBLP DOI BibTeX RDF
17	Chunduri Rama Mohan, Partha Pratim Chakrabarti	A New Approach to Synthesis of PLA-Based FSM's.	VLSI Design	1994	DBLP DOI BibTeX RDF
17	Mahesh Mehendale, Biswadip Mitra	An Integrated Approach to State Assignment and Sequential Element Selection for FSM Synthesis.	VLSI Design	1994	DBLP DOI BibTeX RDF
17	Huey-Yih Wang, Robert K. Brayton	Permissible Observability Relations in FSM Networks.	DAC	1994	DBLP DOI BibTeX RDF
17	Wayne H. Wolf	FSM decomposition for pipelined data.	Integr.	1993	DBLP DOI BibTeX RDF
17	Cristiana Bolchini, Franco Fummi	FSM fault models impact on test performances.	Microprocess. Microprogramming	1993	DBLP DOI BibTeX RDF
17	Stefan Krischer	The Backward Walk Approach in FSM Verification.	CHDL	1993	DBLP BibTeX RDF
17	Wen-Lin Yang, Robert Michael Owens, Mary Jane Irwin	Multi-way FSM decomposition based on interconnect complexity.	EURO-DAC	1993	DBLP DOI BibTeX RDF
17	Yosinori Watanabe, Robert K. Brayton	The maximum set of permissible behaviors for FSM networks.	ICCAD	1993	DBLP DOI BibTeX RDF
17	Debaditya Mukherjee, Massoud Pedram, Melvin A. Breuer	Merging multiple FSM controllers for DFT/BIST hardware.	ICCAD	1993	DBLP DOI BibTeX RDF
17	Huey-Yih Wang, Robert K. Brayton	Input don't care sequences in FSM networks.	ICCAD	1993	DBLP DOI BibTeX RDF
17	Gianpiero Cabodi, Paolo Camurati	Exploiting Cofactoring for Efficient FSM Symbolic Traversal Based on the Transition Relation.	ICCD	1993	DBLP DOI BibTeX RDF
17	Teruo Higashino, Kozo Okano, Hiroshi Imajo, Kenichi Taniguchi	Deriving Protocol Specifications from Service Specifications in Extended FSM Models.	ICDCS	1993	DBLP DOI BibTeX RDF
17	Raphaël Rochet, Régis Leveugle, Gabriele Saucier	Analysis and Comparison of Fault Tolerant FSM Architectures Based on SEC Codes.	DFT	1993	DBLP BibTeX RDF
17	Zafar Hasan, Maciej J. Ciesielski	Functional verification and simulation of FSM networks.	VTS	1993	DBLP DOI BibTeX RDF
17	S. Raman 0001, M. M. Hasan	A PLA-Based FSM Design Technique.	VLSI Design	1993	DBLP DOI BibTeX RDF
17	Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi	Algorithms for Approximate FSM Traversal.	DAC	1993	DBLP DOI BibTeX RDF
17	Akiko Nakahara, Hitoshi Aida, Tadao Saito	Performance evaluation of communication networks based on FSM specifications of protocols.	Syst. Comput. Jpn.	1992	DBLP DOI BibTeX RDF
17	Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda	Cross-fertilizing FSM verification techniques and sequential diagnosis.	EURO-DAC	1992	DBLP DOI BibTeX RDF
17	Alexandre Petrenko, Nina Yevtushenko 0001	Test Suite Generation from a FSM with a Given Type of Implementation Errors.	PSTV	1992	DBLP BibTeX RDF
17	Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri	Estimating the Complexity of Synthesized Designs from FSM Specifications.	VLSI Design	1992	DBLP DOI BibTeX RDF
17	T. Ramalingam, Anindya Das, Krishnaiyan Thulasiraman	On Conformance Test and Fault Resolution of Protocols based on FSM Model.	NETWORKS	1992	DBLP BibTeX RDF
17	M. Puchhammer, R. Schlöglhofer	A Rule-oriented FSM Design System with Prototyping Capabilities.	ICLP	1991	DBLP BibTeX RDF
17	Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri	A Flexible Scheme for State Assignment Based on Characteristics of the FSM.	ICCAD	1991	DBLP DOI BibTeX RDF
17	Seon-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi	Variable Ordering and Selection for FSM Traversal.	ICCAD	1991	DBLP DOI BibTeX RDF
17	Carl Pixley, Gary Beihl, Ernesto Pacas-Skewes	Automatic Derivation of FSM Specification to Implementation Encoding.	ICCD	1991	DBLP DOI BibTeX RDF
17	Maciej J. Ciesielski, Jia-Jye Shen, Marc Davio	A Unified Approach to Input-Output Encoding for FSM State Assignment.	DAC	1991	DBLP DOI BibTeX RDF
17	Martin Geiger, Thomas Müller-Wipperfürth	FSM Decomposition Revisited: Algebraic Structure Theory Applied to MCNC Benchmark FSMs.	DAC	1991	DBLP DOI BibTeX RDF
17	Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi	ATPG Aspects of FSM Verification.	ICCAD	1990	DBLP DOI BibTeX RDF
17	A. Butti, Aldo Lora, G. C. Macchi	The FSM and Message Communication: Impact on Software Testing.	ICC (3)	1984	DBLP BibTeX RDF
17	M. J. Meyer, Prathima Agrawal, R. G. Pfister	A VLSI FSM design system.	DAC	1984	DBLP BibTeX RDF
17	Sheue-Ling Hwang, Che-Wei Chang	On-Line Communication Interface Design for Visually Impaired Users.	HCI (7)	2009	DBLP DOI BibTeX RDF	on-line meeting, FSM-GOMS, auditory interface, Visually impaired users
17	M. Ümit Uyar, Samrat S. Batth, Yu Wang 0012, Mariusz A. Fecko	Algorithms for Modeling a Class of Single Timing Faults in Communication Protocols.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Finite State Machine (FSM), Extended Finite State Machine (EFSM), Timed EFSM, Fault Modeling, Conformance Testing, Timers
17	Neil Walkinshaw, Kirill Bogdanov 0002, Ken Johnson	Evaluation and Comparison of Inferred Regular Grammars.	ICGI	2008	DBLP DOI BibTeX RDF	State-Merging, FSM Testing, Evaluation, Model-Based Testing, Precision and Recall
17	Rajeev Kumar 0004, Amit Gupta, B. S. Pankaj, Mrinmoy Ghosh, P. P. Chakrabarti 0001	Post-compilation optimization for multiple gains with pattern matching.	ACM SIGPLAN Notices	2005	DBLP DOI BibTeX RDF	instruction set FSM, peephole optimization, post-compilation optimization, pattern matching
17	Florentin Ipate, Mike Holcombe	Testing Conditions for Communicating Stream X-machine Systems.	Formal Aspects Comput.	2002	DBLP DOI BibTeX RDF	Communicating (extended) fsm, Communicating (stream) X-machines, Design for test-conditions, Testing
17	Samrat Goswami, Anupam Chanda, D. Roy Choudhury	Generation of an Ordered Sequence of Test Vectors for Single State Transition Faults in Large Sequential Machines.	Asian Test Symposium	2001	DBLP DOI BibTeX RDF	Testing FSM, Single State Transition Fault Model, Sequential Machine
17	Franco Fummi, Donatella Sciuto	A Hierarchical Test Generation Approach for Large Controllers.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	hierarchical FSM, sequential circuits, automatic test pattern generation, Functional testing, functional fault model
17	Diana Marculescu, Radu Marculescu, Massoud Pedram	Trace-Driven Steady-State Probability Estimation in FSMs with Application to Power Estimation.	DATE	1998	DBLP DOI BibTeX RDF	Probabilistic FSM analysis, high-order Markov chains, power estimation
17	Harry Hsieh, Alberto L. Sangiovanni-Vincentelli	Modeling micro-controller peripherals for high-level co-simulation and synthesis.	CODES	1997	DBLP DOI BibTeX RDF	micro-controllers, FSM synthesis, co-simulation, peripherals, co-synthesis
17	Santonu Sarkar, Anupam Basu, Arun K. Majumdar	Analyzing Controllability of a Hardware Circuit for its Reuse.	VLSI Design	1997	DBLP DOI BibTeX RDF	hardware circuit controllability, external controllability, FSM model, finite state machines, finite state machine model
17	Tomoo Inoue, Toshimitsu Masuzawa, Hiroshi Youra, Hideo Fujiwara	An Approach To The Synthesis Of Synchronizable Finite State Machines With Partial Scan.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	synchronizable finite state machines, sequential circuits synthesis, extended synchronizing sequence, scan inputs, normal inputs, MCNC'91 benchmark FSM, minimum-length extended synchronizing sequence, test generation, finite state machines, DFT, heuristic algorithm, minimization, partial scan, synthesis for testability, state assignment, state transition, state encoding
17	Yatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell	Automated verification of temporal properties specified as state machines in VHDL.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	automated verification methodology, correctness specifications, Viper microprocessor, Mealy FSM, compatible states, formal specification, formal verification, high level synthesis, finite state machines, VHDL, sequential circuits, state machines, hardware description languages, microprocessor chips, synchronous sequential circuit, temporal properties, liveness properties
9	Fatih Turkmen, Bruno Crispo, Pietro Mazzoleni	A service-based context management framework for cross-enterprise collaboration.	SAC	2010	DBLP DOI BibTeX RDF	SOA, mobile devices, context
9	Lang Xie, Poul E. Heegaard, Jin Zhang, Jie Xiang 0001	System state aware admission control scheme for IEEE 802.16e WiMAX-based healthcare system.	IWCMC	2010	DBLP DOI BibTeX RDF	IEEE 802.16e WiMAX, admission control, healthcare
9	Alexandros Papangelis, Georgios Galatas, Shahina Ferdous, Sarantos Kapidakis, Fillia Makedon	Computer aided sensor placement and automatic state definition.	PETRA	2010	DBLP DOI BibTeX RDF	decision support, information fusion, sensor placement, assistive environment, graphical tool
9	Grzegorz Borowik, Tadeusz Luba, Bogdan J. Falkowski	Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories.	DDECS	2009	DBLP DOI BibTeX RDF
9	Pablo Rabanal, Ismael Rodríguez, Fernando Rubio 0001	A Formal Approach to Heuristically Test Restorable Systems.	ICTAC	2009	DBLP DOI BibTeX RDF
9	Xueqiang Gong, Jing Liu 0012, Miaomiao Zhang, Jueliang Hu	Formal Analysis of Services Compatibility.	COMPSAC (2)	2009	DBLP DOI BibTeX RDF
9	Lucas Vespa, Mini Mathew, Ning Weng	P3FSM: Portable Predictive Pattern Matching Finite State Machine.	ASAP	2009	DBLP DOI BibTeX RDF
9	Grzegorz Borowik, Tadeusz Luba	Decomposing Pattern Matching Circuit.	EUROCAST	2009	DBLP DOI BibTeX RDF	FPGA, Pattern matching, Finite state machine, Decomposition, Logic synthesis, Embedded memory, Address generator
9	Hai Yu, Michael Nicolaidis, Lorena Anghel	An effective approach to detect logic soft errors in digital circuits based on GRAAL.	ISQED	2009	DBLP DOI BibTeX RDF
9	Guy-Vincent Jourdan, Gregor von Bochmann	On Testing 1-Safe Petri Nets.	TASE	2009	DBLP DOI BibTeX RDF
9	Yi Lu 0002, Serge Vaudenay	Cryptanalysis of an E0-like Combiner with Memory.	J. Cryptol.	2008	DBLP DOI BibTeX RDF	E0, Stream cipher, Bluetooth, Correlation, Combiner
9	Kui Cai 0001, Kees A. Schouhamer Immink	A general construction of constrained parity-check codes for optical recording.	IEEE Trans. Commun.	2008	DBLP DOI BibTeX RDF
9	Asli Celikyilmaz, I. Burhan Türksen	Enhanced Fuzzy System Models With Improved Fuzzy Clustering Algorithm.	IEEE Trans. Fuzzy Syst.	2008	DBLP DOI BibTeX RDF
9	Claudio Talarico, David Freiberger, Tyler Jones, Brandon Hopkins, Charlie Herr, Min-Sung Koh, Esteban Rodriguez-Marek	A Hybrid Approach for Modeling and Assessing Performance of Embedded Systems in a Biologically Critical Application.	ECBS	2008	DBLP DOI BibTeX RDF
9	Per Kristian Lehre, Xin Yao 0001	Crossover Can Be Constructive When Computing Unique Input Output Sequences.	SEAL	2008	DBLP DOI BibTeX RDF
9	Ramy Ragab Hassen, Lhouari Nourine, Farouk Toumani	Protocol-Based Web Service Composition.	ICSOC	2008	DBLP DOI BibTeX RDF
9	Jaeseung Chang, Marie-Luce Bourguet	Usability framework for the design and evaluation of multimodal interaction.	BCS HCI (2)	2008	DBLP DOI BibTeX RDF	modelling, interaction design, finite state machine, multimodality, usability evaluation
9	Lisane B. de Brisolara, Marcio F. da S. Oliveira, Ricardo Miotto Redin, Luís C. Lamb, Luigi Carro, Flávio Rech Wagner	Using UML as Front-end for Heterogeneous Software Code Generation Strategies.	DATE	2008	DBLP DOI BibTeX RDF
9	ChangRyul Yun, DongSoo Kang, YoungHwan Bae, Hanhn Cho, KyoungSon Jhang	Automatic interface synthesis based on the classification of interface protocols of IPs.	ASP-DAC	2008	DBLP DOI BibTeX RDF