Search results for "IOLTS"

Hits ?▲	Authors	Title	Venue	Year	Link
44	Taiki Uemura, Takashi Kato, Hideya Matsuyama, Keiji Takahisa, Mitsuhiro Fukuda, Kichiji Hatanaka	Investigation of multi cell upset in sequential logic and validity of redundancy technique.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Armin Krieg, Johannes Grinschgl, Christian Steger, Reinhold Weiss, Josef Haid	A side channel attack countermeasure using system-on-chip power profile scrambling.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Matthias Sauer 0002, Victor Tomashevich, Jörg Müller 0004, Matthew Lewis 0004, Andreas Spilla, Ilia Polian, Bernd Becker 0001, Wolfram Burgard	An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Hayk T. Grigoryan, Gurgen Harutunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian	Generic BIST architecture for testing of content addressable memories.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Marco Paolieri, Riccardo Mariani	Towards functional-safe timing-dependable real-time architectures.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Rance Rodrigues, Sandip Kundu	On graceful degradation of microprocessors in presence of faults via resource banking.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Renato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov	Self-checking test circuits for latches and flip-flops.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Yuriy Shiyanovskii, Aravind Rajendran, Christos A. Papachristou	A novel radiation tolerant SRAM design based on synergetic functional component separation for nanoscale CMOS.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Rshdee Alhakim, Emmanuel Simeu, Kosai Raoof	Internal model control for a self-tuning Delay-Locked Loop in UWB communication systems.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González 0001, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio 0001, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber	New reliability mechanisms in memory design for sub-22nm technologies.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Matthias Sauer 0002, Alejandro Czutro, Ilia Polian, Bernd Becker 0001	Estimation of component criticality in early design steps.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Michael E. Imhof, Hans-Joachim Wunderlich	Soft error correction in embedded storage elements.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Cédric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache	Loopback output router for reliable Network on Chip.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Jaume Abella 0001, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot 0001, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat	Towards improved survivability in safety-critical systems.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Ingrid Verbauwhede	The cost of cryptography: Is low budget possible?	IOLTS	2011	DBLP DOI BibTeX RDF
44	Ronak Salamat, Hamid R. Zarandi	Fault-tolerance assessment and enhancement in SoCWire interface: A system-on-chip wire.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Enrico Costenaro, Massimo Violante, Dan Alexandrescu	A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories.	IOLTS	2011	DBLP DOI BibTeX RDF
44	V. Prasanth, Virendra Singh, Rubin A. Parekhji	Reduced overhead soft error mitigation using error control coding techniques.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Fabien Chaix, Gilles Bizot, Michael Nicolaidis, Nacer-Eddine Zergainoh	Variability-aware task mapping strategies for many-cores processor chips.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Paolo Bernardi, Lyl M. Ciganda, Ernesto Sánchez 0001, Matteo Sonza Reorda	An effective methodology for on-line testing of embedded microprocessors.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Navid Khoshavi, Hamid R. Zarandi, Mohammad Maghsoudloo	Control-flow error recovery using commodity multi-core architecture features.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas, Krishnendu Chakrabarty	A BIST scheme for testing and repair of multi-mode power switches.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Kedar Karmarkar, Spyros Tragoudas	Error correction encoding for multi-threshold capture mechanism.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Gabriele Boschi, Riccardo Mariani, Stefano Lorenzini	A verification strategy for fault-detection and fault-tolerance circuits.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Taiga Takata, Yusuke Matsunaga	A robust algorithm for pessimistic analysis of logic masking effects in combinational circuits.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Dhiego Silva, Letícia Maria Veiras Bolzani, Fabian Vargas 0001	An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Zhen Wang 0001, Mark G. Karpovsky	Algebraic manipulation detection codes and their applications for design of secure cryptographic devices.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Shusuke Yoshimoto, Takuro Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto	Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Seyab Khan, Said Hamdioui	Modeling and mitigating NBTI in nanoscale circuits.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Aravind Rajendran, Yuriy Shiyanovskii, Frank Wolff, Christos A. Papachristou	Noise margin, critical charge and power-delay tradeoffs for SRAM design.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Lilia Zaourar, Yann Kieffer, Arnaud Wenzel	A multi-objective optimization for memory BIST sharing using a genetic algorithm.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Honorio Martín, Enrique San Millán, Luis Entrena, Julio César Hernández Castro, Pedro Peris-Lopez	AKARI-X: A pseudorandom number generator for secure lightweight systems.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Daniel Sánchez 0004, Yiannakis Sazeides, Juan L. Aragón, José M. García 0001	An analytical model for the calculation of the Expected Miss Ratio in faulty caches.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Jayaram Natarajan, Shreyas Sen, Abhijit Chatterjee	Real time cross-layer adaptation for minimum energy wireless image transport using bit error rate control.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Paolo Maistri	Countermeasures against fault attacks: The good, the bad, and the ugly.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Luke Pierce, Spyros Tragoudas	Multi-level secure JTAG architecture.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche	An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Rafal Baranowski, Hans-Joachim Wunderlich	Fail-safety in core-based system design.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Cristiana Bolchini, Chiara Sandionigi, Luca Fossati, David Merodio Codinachs	A reliable fault classifier for dependable systems on SRAM-based FPGAs.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Mikhail Baklashov	An on-line memory state validation using shadow memory cloning.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Berk Sunar	Rise of the hardware Trojans.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Aymen Fradi, Michael Nicolaidis, Lorena Anghel	Memory BIST with address programmability.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Ronaldo Rodrigues Ferreira, Álvaro Freitas Moreira, Luigi Carro	Matrix control-flow algorithm-based fault tolerance.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Dan Alexandrescu	A comprehensive soft error analysis methodology for SoCs/ASICs memory instances.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Osnat Keren, Ilya Levin, Vladimir Sinelnikov	Detection of Trojan HW by using hidden information on the system.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Michael Augustin, Michael Gössel, Rolf Kraemer	Selective fault tolerance for finite state machines.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Michael Linder, Alfred Eder, Klaus Oberländer, Martin Huch	Variations of fault manifestation during Burn-In - A case study on industrial SRAM test results.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Anna Vaskova, Celia López-Ongil, Enrique San Millán, Alejandro Jiménez-Horas, Luis Entrena	Accelerating secure circuit design with hardware implementation of Diehard Battery of tests of randomness.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Anna Vaskova, Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena	Evaluation techniques for on-line testing of robust systems based on critical tasks distribution.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Jaume Abella 0001, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides	RVC-based time-predictable faulty caches for safety-critical systems.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Eberhard Böhl, Paul Duplys	Fault attack resistant deterministic random bit generator usable for key randomization.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Madalin Neagu, Liviu Miclea, Joan Figueras	Unidirectional error detection, localization and correction for DRAMs: Application to on-line DRAM repair strategies.	IOLTS	2011	DBLP DOI BibTeX RDF
44	Rance Rodrigues, Sandip Kundu	On graceful degradation of chip multiprocessors in presence of faults via flexible pooling of critical execution units.	IOLTS	2011	DBLP DOI BibTeX RDF
44		16th IEEE International On-Line Testing Symposium (IOLTS 2010), 5-7 July, 2010, Corfu, Greece	IOLTS	2010	DBLP BibTeX RDF
44	Irith Pomeranz, Sudhakar M. Reddy	Selecting state variables for improved on-line testability through output response comparison of identical circuits.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Ali Shahabi, S. Behdad Hosseini, Hasan Sohofi, Zainalabedin Navabi	A partitioning approach to improve reconfigurable neuron-inspired online BIST.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Steffen Zeidler 0001, Alexandre V. Bystrov, Milos Krstic, Rolf Kraemer	On-line testing of bundled-data asynchronous handshake protocols.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Josep Altet, Diego Mateo, Eduardo Aldrete-Vidrio	Thermal coupling in ICs: Applications to the test and characterization of analogue and RF circuits.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Michael G. Dimopoulos, Alexios Spyronasios, Alkis A. Hatzopoulos	Wavelet analysis of measurements for on-line testing analog & mixed-signal circuits.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni	Timing error tolerance in nanometer ICs.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Samuel Evain, Yannick Bonhomme, Valentin Gherman	Programmable restricted SEC codes to mask permanent faults in semiconductor memories.	IOLTS	2010	DBLP DOI BibTeX RDF
44	George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos	A software-based self-test methodology for in-system testing of processor cache tag arrays.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Michael N. Skoufis, Spyros Tragoudas	On-line detection of random voltage perturbations in buses with multiple-threshold receivers.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Michael Nicolaidis, Vladimir Pasca, Lorena Anghel	Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Zhen Zhang, Alain Greiner, Mounir Benabdenbi	Fully distributed initialization procedure for a 2D-Mesh NoC, including off-line BIST and partial deactivation of faulty components.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Steffen Tarnick	Design of embedded constant weight code checkers based on averaging operations.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Sreenivas Gangadhar, Spyros Tragoudas	Probabilistic methods for the impact of an SET in combinational logic.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Long Wang 0003, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Arun Iyengar	Checkpointing virtual machines against transient errors.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Salvatore Campagna, Massimo Violante	A framework to support the design of COTS-based reliable space computers for on-board data handling.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Shyam Kumar Devarakond, Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan, Abhijit Chatterjee	Built-in performance monitoring of mixed-signal/RF front ends using real-time parameter estimation.	IOLTS	2010	DBLP DOI BibTeX RDF
44	A. Richardson	Concepts for fault tolerant sensor systems.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Vitaly Ocheretny	Self-checking arithmetic logic unit with duplicated outputs.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Sebastià A. Bota, Gabriel Torrens, Bartomeu Alorda, Jaume Verd, Jaume Segura 0001	Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Paul Duplys, Eberhard Böhl, Wolfgang Rosenstiel	Key randomization using a power analysis resistant deterministic random bit generator.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Josep Rius 0001	A method for detecting resistive opens in buses.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Martin Rozkovec, Jiri Jenícek, Ondrej Novák	Application dependent FPGA testing method using compressed deterministic test vectors.	IOLTS	2010	DBLP DOI BibTeX RDF
44	V. Prasanth, Virendra Singh, Rubin A. Parekhji	Robust detection of soft errors using delayed capture methodology.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis 0001, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira 0001	Predictive error detection by on-line aging monitoring.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Tiago R. Balen, Marcelo Lubaszewski	Radiation effects on programmable analog devices and mitigation techniques.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Georgios Karakonstantis, Charles Augustine, Kaushik Roy 0001	A self-consistent model to estimate NBTI degradation and a comprehensive on-line system lifetime enhancement technique.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	Evaluation of concurrent error detection techniques on the advanced encryption standard.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Seyab Khan, Said Hamdioui	Temperature dependence of NBTI induced delay.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Yervant Zorian	Test and reliability concerns for 3D-ICs.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal	3D integration: Circuit design, test, and reliability challenges.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Michel Pignol, Florence Malou, Corinne Aicardi	Qualification and relifing testing for space applications applied to the agilent G-Link components.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis 0001	Evaluating transient-fault effects on traditional C-element's implementations.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Etienne Faure, Mounir Benabdenbi, François Pêcheux	Distributed online software monitoring of manycore architectures.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Andreas Merentitis, Dionisis Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos	SBST for on-line detection of hard faults in multiprocessor applications under energy constraints.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris	An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Hyunbean Yi, Tomokazu Yoneda, Michiko Inoue, Yasuo Sato, Seiji Kajihara, Hideo Fujiwara	Aging test strategy and adaptive test scheduling for SoC failure prediction.	IOLTS	2010	DBLP DOI BibTeX RDF
44	David R. McIntyre, Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia	Trustworthy computing in a multi-core system using distributed scheduling.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Zhen Wang 0001, Mark G. Karpovsky	Robust FSMs for cryptographic devices resilient to strong fault injection attacks.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Claudia Rusu, Lorena Anghel, Dimiter Avresky	RILM: Reconfigurable inter-layer routing mechanism for 3D multi-layer networks-on-chip.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Michael Augustin, Michael Gössel, Rolf Kraemer	Reducing the area overhead of TMR-systems by protecting specific signals.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Olivier Héron, Julien Guilhemsang, Nicolas Ventroux, Alain Giulieri	Analysis of on-line self-testing policies for real-time embedded multiprocessors in DSM technologies.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue	An FPGA-based fail-soft system with adaptive reconfiguration.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi	Configurable serial fault-tolerant link for communication in 3D integrated systems.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Niccolò Battezzati, Davide Serrone, Massimo Violante	A new framework for the automatic insertion of mitigation structures in circuits netlists.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu	Reconfigurable low-power Concurrent Error Detection in logic circuits.	IOLTS	2010	DBLP DOI BibTeX RDF
44	Nicholas Axelos, Kiamal Z. Pekmestzi	A bit level area aware cache-based architecture for memory repairs.	IOLTS	2010	DBLP DOI BibTeX RDF