|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 3961 occurrences of 1777 keywords
|
|
|
Results
Found 46124 publication records. Showing 46122 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
23 | Praveen Bhojwani, Rabi N. Mahapatra |
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey |
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
23 | N. Alaraje, Guy Hembroff |
Impact of NoFPGA IP router architecture on link bandwidth. |
EIT |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Bjørn Olav Hogstad, Matthias Pätzold 0001 |
On the Stationarity of Sum-of-Cisoids-Based Mobile Fading Channel Simulators. |
VTC Spring |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Matthias Pätzold 0001, Carlos A. Gutiérrez-Díaz-de-León |
Level-Crossing Rate and Average Duration of Fades of the Envelope of a Sum-of-Cisoids. |
VTC Spring |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Sukumar Jairam, S. M. Stalin, Jean-Yves Oberle, H. Udayakumar |
An SSO Based Methodology for EM Emission Estimation from SoCs. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Yinong Chen, Xiaoying Bai |
On Robotics Applications in Service-Oriented Architecture. |
ICDCS Workshops |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty |
Wafer-Level Modular Testing of Core-Based SoCs. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Kees Goossens, Bart Vermeulen, Remco van Steeden, Martijn T. Bennebroek |
Transaction-Based Communication-Centric Debug. |
NOCS |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Raimon Casanova, Ángel Dieguez, Andreu Sanuy, Anna Arbat, Oscar Alonso, Joan Canals, Manel Puig, Josep Samitier |
Enabling swarm behavior in mm3-sized robots with specific designed integrated electronics. |
IROS |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Ahmed Amine Jerraya |
HW/SW implementation from abstract architecture models. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Letícia Maria Veiras Bolzani, Ernesto Sánchez 0001, Massimiliano Schillaci, Giovanni Squillero |
Co-evolution of test programs and stimuli vectors for testing of embedded peripheral cores. |
IEEE Congress on Evolutionary Computation |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Masaitsu Nakajima, Takao Yamamoto, Masayuki Yamasaki, Tetsu Hosoki, Masaya Sumita |
Low Power Techniques for Mobile Application SoCs Based on Integrated Platform "UniPhier". |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Soo Ho Chang, Soo Dong Kim |
A Variability Modeling Method for Adaptable Services in Service-Oriented Computing. |
SPLC |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshminarayana |
The LOTTERYBUS on-chip communication architecture. |
IEEE Trans. Very Large Scale Integr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey |
Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Dmitry Akselrod, Asaf Ashkenazi, Yossi Amon |
Platform independent debug port controller architecture with security protection for multi-processor system-on-chip ICs. |
DATE Designers' Forum |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Torsten Kempf, Kingshuk Karuri, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr |
A SW performance estimation framework for early system-level-design using fine-grained instrumentation. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Martijn Coenen, Srinivasan Murali, Andrei Radulescu, Kees Goossens, Giovanni De Micheli |
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. |
CODES+ISSS |
2006 |
DBLP DOI BibTeX RDF |
systems-on-chip, networks-on-chip, buffers, area |
23 | Bastien Chopard, Philippe Combes, Julien Zory |
A Conservative Approach to SystemC Parallelization. |
International Conference on Computational Science (4) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Celene Navarrete, Esperanza Huerta |
A Bridge Home: The Use of the Internet by Transnational Communities of Immigrants. |
HICSS |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann 0001, Walter Stechele |
Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. |
BICC |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ronen |
Scheduling-based test-case generation for verification of multimedia SoCs. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
test generation, system on a chip, functional verification |
23 | Francisco Curbera |
A Programming Model for Service Oriented Applications. |
FASE |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Ozgur Sinanoglu, Alex Orailoglu |
Test power reductions through computationally efficient, decoupled scan chain modifications. |
IEEE Trans. Reliab. |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Mounir Benabdenbi, Alain Greiner, François Pêcheux, Emmanuel Viaud, Matthieu Tuna |
STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Krishna Sekar, Kanishka Lahiri, Sujit Dey |
Configurable Platforms With Dynamic Platform Management: An Efficient Alternative to Application-Specific System-on-Chips. |
VLSI Design |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Rashid Rashidzadeh, Majid Ahmadi, William C. Miller |
A tester-on-chip implementation in 0.18µ CMOS utilizing a MEMS interface. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Rubin A. Parekhji |
Testing Embedded Cores and SOCs-DFT, ATPG and BIST Solutions. |
VLSI Design |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Philippe Magarshack, Pierre G. Paulin |
System-on-chip beyond the nanometer wall. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
design automation tools, embedded software technologies, system-on-chip, network-on-chip, reconfigurable systems, multi-processor systems |
23 | Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno |
Cosimulation-based power estimation for system-on-chip design. |
IEEE Trans. Very Large Scale Integr. Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
23 | Maurizio Palesi, Tony Givargis |
Multi-objective design space exploration using genetic algorithms. |
CODES |
2002 |
DBLP DOI BibTeX RDF |
Pareto-optimal configurations, system-on-a-chip architectures, genetic algorithms, low power design, design space exploration |
23 | H. Bernhard Pogge |
The next chip challenge: effective methods for viable mixed technology SoCs. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
SoCs (System on a Chip), chip fabrication methods, chip subsector concepts, chip/packing integration |
23 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen |
Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
|
23 | Tomokazu Yoneda, Hideo Fujiwara |
A DFT Method for Core-Based Systems-on-a-Chip Based on Consecutive Testability. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
consecutive transparency, core-based systems-on-a-chip, design for testability, test access mechanism, consecutive testability |
23 | Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno |
Efficient Power Co-Estimation Techniques for System-on-Chip Design. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Xiaohong Jiang 0001, Susumu Horiguchi, Yue Hao |
Predicting the Yield Efficacy of a Defect-Tolerant Embedded Core. |
DFT |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Dirk Desmet, Diederik Verkest, Hugo De Man |
Operating system based software generation for systems-on-chip. |
DAC |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Qiang Xu 0001, Yubin Zhang, Krishnendu Chakrabarty |
SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Core-based system-on-chip, test scheduling, test-access mechanism (TAM), interconnect testing |
22 | Dragos Truscan, Torbjörn Lundkvist, Marcus Alanen, Kim Sandström, Ivan Porres, Johan Lilius |
MDE for SoC design. |
Innov. Syst. Softw. Eng. |
2009 |
DBLP DOI BibTeX RDF |
System on chip, Model transformation, Domain-specific language, Metamodel, Model-driven engineering |
22 | Nobuyuki Itoh, Mototsugu Hamada |
RF-analog circuit design in scaled SoC. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang |
An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Rosario Pugliese, Francesco Tiezzi 0001, Nobuko Yoshida |
On Observing Dynamic Prioritised Actions in SOC. |
ICALP (2) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Xu Guo 0001, Patrick Schaumont |
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform. |
ARC |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha |
Handling mixed-criticality in SoC-based real-time embedded systems. |
EMSOFT |
2009 |
DBLP DOI BibTeX RDF |
mixed-criticality, system-on-chip, runtime monitoring, platform-based design, AADL |
22 | Minsik Cho, David Z. Pan |
Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Alberto Bosio, Patrick Girard 0001, Serge Pravossoudovitch, Paolo Bernardi |
SoC Symbolic Simulation: a case study on delay fault testing. |
DDECS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Ching-Te Chiu, Tsun-Hsien Wang, Wei-Ming Ke, Chen-Yu Chuang, Jhih-Rong Chen, Rong Yang, Ren-Song Tsay |
Design optimization of a global/local tone mapping processor on arm SOC platform for real-time high dynamic range video. |
ICIP |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Xiao Zheng, Junzhou Luo, Aibo Song |
A Scalable and Adaptive Distributed Service Discovery Mechanism in SOC Environments. |
NPC |
2008 |
DBLP DOI BibTeX RDF |
multi-agent system, service discovery, P2P network, ant algorithm |
22 | Pieter van der Wolf, Tomas Henriksson |
Video Processing Requirements on SoC Infrastructures. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Andrea Marongiu, Luca Benini, Andrea Acquaviva, Andrea Bartolini |
Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology. |
DSD |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Pramod Chandraiah, Rainer Dömer |
Automatic re-coding of reference code into structured and analyzable SoC models. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Fabio Campi, Luca Ciccarelli, Claudio Mucci |
Sustainable (re-) configurable solutions for the high volume SoC market. |
IPDPS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | David Dickin, Lesley Shannon |
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Chih-Chi Cheng, Chia-Hua Lin, Chung-Te Li, Samuel C. Chang, Liang-Gee Chen |
iVisual: an intelligent visual sensor SoC with 2790fps CMOS image sensor and 205GOPS/W vision processor. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
vision processor, VLSI, video analysis, SIMD, intelligent sensor |
22 | Lesley Shannon, Paul Chow |
SIMPPL: An Adaptable SoC Framework Using a Programmable Controller IP Interface to Facilitate Design Reuse. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Marek Tudruj, Lukasz Masko |
Dynamic SMP Clusters with Communication on the Fly in SoC Technology Applied for Medium-Grain Parallel Matrix Multiplication. |
PDP |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Riccardo Mariani, Gabriele Boschi, Federico Colucci |
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Tohru Furuyama |
Keynote address: Challenges of digital consumer and mobile SoC's: more Moore possible? |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Ryo Watanabe, Masaaki Kondo, Masashi Imai, Hiroshi Nakamura, Takashi Nanya |
Interactive presentation: Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Ying Wang 0032, Weinan Chen, Xiao-Wei Wang, Hong-Jun You, Chenglian Peng |
Enabling Reconfigurable SoC in Multimedia Processing. |
CIT |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Pramod Chandraiah, Junyu Peng, Rainer Dömer |
Creating Explicit Communication in SoC Models Using Interactive Re-Coding. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Sikun Li, Dawei Wang 0020, Tun Li, Yong Dou |
Distributed Collaborative Partition Method of Reconfigurable SoC Using Ant Colony Optimization. |
CSCWD |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto |
A novel SoC design methodology combining adaptive software and reconfigurable hardware. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Behnam Amelifard, Massoud Pedram |
Design of an efficient power delivery network in an soc to enable dynamic power management. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
power delivery network, voltage regulator, low-power design, DC-DC converter |
22 | Jer-Min Hsiao, Chun-Jen Tsai |
Analysis of an SOC Architecture for MPEG Reconfigurable Video Coding Framework. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan |
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Hirokazu Tohya, Noritaka Toya |
A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Xiaotao Chang, Mingming Zhang, Ge Zhang 0007, Zhimin Zhang, Jun Wang |
Adaptive Clock Gating Technique for Low Power IP Core in SoC Design. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Qiang Xu 0001, Yubin Zhang, Krishnendu Chakrabarty |
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Yung-Chi Chang, Wei-Min Chao, Chih-Wei Hsu, Liang-Gee Chen |
Platform-Based MPEG-4 SOC Design for Video Communications. |
J. VLSI Signal Process. |
2006 |
DBLP DOI BibTeX RDF |
platform-based architecture, video encoder, MPEG-4 video |
22 | Chantal Ykman-Couvreur, Vincent Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management. |
ICSAMOS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Olivier Benny, Damien Lyonnard, Bruno Lavigueur, David Lo 0002 |
Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Gang Zeng, Hideo Ito |
Concurrent core test for SOC using shared test set and scan chain disable. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Ying Wang 0032, Xuegong Zhou, Bo Zhou, Liang Liang, Chenglian Peng |
A MDA based SoC Modeling Approach using UML and SystemC. |
CIT |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Mário P. Véstias, Horácio C. Neto |
Co-synthesis of a configurable SoC platform based on a network on chip architecture. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo |
PowerViP: Soc power estimation framework at transaction level. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen |
Evaluating SoC Network Performance in MPEG-4 Encoder. |
SiPS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie 0001, Chita R. Das, Vijay Degalahal |
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, Cheng-Mu Wu, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng, Jia-Jin Chen |
An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Moonvin Song, Yunmo Chung |
SoC Design of Speaker Connection System by Efficient Cosimulation. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Jyh-Shin Pan, Hao-Cheng Chen, Bing-Yu Hsieh, Hong-Ching Chen, Roger Lee, Ching-Ho Chu, Yuan-Chin Liu, Chuan Liu, Lily Huang, Chang-Long Wu, Meng-Hsueh Lin, Chun-Yiu Lin, Shang-Nien Tsai, Jenn-Ning Yang, Chang-Po Ma, Yung Cheng, Shu-Hung Chou, Hsiu-Chen Peng, Peng-Chuan Huang, Benjamin Chiu, Alex Ho |
A CMOS SoC for 56/18/16 CD/DVD-dual/RAM applications. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
DVD-RAM, SATA, WSR, CMOS, optical storage |
22 | Kun-Bin Lee, Tzu-Chieh Lin, Chein-Wei Jen |
An Efficient Quality-Aware Memory Controller for Multimedia Platform SoC. |
IEEE Trans. Circuits Syst. Video Technol. |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Nicola Bombieri, Andrea Fedeli, Franco Fummi |
On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling. |
MTV |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Qiang Zhu 0005, Ryosuke Oishi, Takashi Hasegawa, Tsuneo Nakata |
Integrating UML into SoC Design Process. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Yves Vanderperren, Wim Dehaene |
UML 2 and SysML: An Approach to Deal with Complexity in SoC/NoC Design. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema |
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Tom Waayers, Erik Jan Marinissen, Maurice Lousberg |
IEEE Std 1500 Compliant Infrastructure forModular SOC Testing. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Luca Benini |
Advanced power management of SoC platforms. |
SBCCI |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann 0001, Walter Stechele |
Towards a Framework and a Design Methodology for Autonomic SoC. |
ICAC |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Abner Corrêa Barros, Pericles Lima, Juliana Xavier, Manoel Eusébio de Lima |
Teaching SoC Design in a Project-Oriented Course Based on Robotics. |
MSE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Donald Hung |
Teaching SoC-Oriented Computer Design Course. |
MSE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Jari Nurmi, Jan Madsen, Erwin Ofner, Jouni Isoaho, Hannu Tenhunen |
The SoC-Mobinet Model in System-on-Chip Education. |
MSE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Andrea Lodi 0002, Luca Ciccarelli, Claudio Mucci, Roberto Giansante, Andrea Cappelli, Mario Toma |
An Embedded Reconfigurable Datapath for SoC. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Chun Luo, Jun Yang 0006, Gugang Gao, Longxing Shi |
Domain fault model and coverage metric for SoC verification. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund |
A flexible ADC approach for mixed-signal SoC platforms. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Kuen-Jong Lee, Chia-Yi Chu, Yu-Ting Hong |
An embedded processor based SOC test platform. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Angela Hodge-Miller, Robert W. Newcomb |
System-on-a-chip (SoC) model of a micropump. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Kentaroh Katoh, Abderrahim Doumar, Hideo Ito |
Design of On-Line Testing for SoC with IEEE P1500 Compliant Cores Using Reconfigurable Hardware and Scan Shift. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
22 | R. Castagnetti, R. Venkatraman, Brandon Bartz, Carl Monzel, T. Briscoe, Andres Teene, S. Ramesh 0004 |
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
Displaying result #601 - #700 of 46122 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ 12][ 13][ 14][ 15][ 16][ >>] |
|