Search results for "manycore"

Hits ?▲	Authors	Title	Venue	Year	Link
16	Heiko Koziolek, Steffen Becker 0001, Jens Happe, Petr Tuma 0001, Thijmen de Gooijer	Towards software performance engineering for multicore and manycore systems.	SIGMETRICS Perform. Evaluation Rev.	2013	DBLP DOI BibTeX RDF
16	Khaled Hamidouche, Fernando Machado Mendonca, Joel Falcou, Alba Cristina Magalhaes Alves de Melo, Daniel Etiemble	Parallel Smith-Waterman Comparison on Multicore and Manycore Computing Platforms with BSP++.	Int. J. Parallel Program.	2013	DBLP DOI BibTeX RDF
16	Omer Erdil Albayrak, Ismail Akturk, Ozcan Ozturk 0001	Improving application behavior on heterogeneous manycore systems through kernel mapping.	Parallel Comput.	2013	DBLP DOI BibTeX RDF
16	Sheng Li 0007, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi	The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing.	ACM Trans. Archit. Code Optim.	2013	DBLP DOI BibTeX RDF
16	Dongki Kim, Sungjoo Yoo, Sunggu Lee	A network congestion-aware memory subsystem for manycore.	ACM Trans. Embed. Comput. Syst.	2013	DBLP DOI BibTeX RDF
16	Bartosz Wojciechowski, Krzysztof S. Berezowski, Piotr Patronik, Janusz Biernat	Fast and accurate thermal modeling and simulation of manycore processors and workloads.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
16	Stefan Wallentowitz, Philipp Wagner 0001, Michael Tempelmeier, Thomas Wild, Andreas Herkersdorf	Open Tiled Manycore System-on-Chip	CoRR	2013	DBLP BibTeX RDF
16	Marco Ceriani, Simone Secchi, Antonino Tumeo, Oreste Villa, Gianluca Palermo	Exploring manycore multinode systems for irregular applications with FPGA prototyping.	Hot Chips Symposium	2013	DBLP DOI BibTeX RDF
16	Celine Azar, Stéphane Chevobbe, Yves Lhuillier, Jean-Philippe Diguet	SNet, a flexible, scalable network paradigm for manycore architectures.	NOCS	2013	DBLP DOI BibTeX RDF
16	Anshuman Gupta, Jack Sampson, Michael Bedford Taylor	TimeCube: A manycore embedded processor with interference-agnostic progress tracking.	ICSAMOS	2013	DBLP DOI BibTeX RDF
16	Eric Guthmuller, Ivan Miro Panades, Alain Greiner	Architectural exploration of a fine-grained 3D cache for high performance in a manycore context.	VLSI-SoC	2013	DBLP DOI BibTeX RDF
16	James Barker, Josh Bowden	Manycore Parallelism through OpenMP - High-Performance Scientific Computing with Xeon Phi.	IWOMP	2013	DBLP DOI BibTeX RDF
16	Chaeseok Im, Minkyu Jeong, Jaedon Lee, Seungwon Lee	A dynamically reconfigurable operating system for manycore systems.	SAC	2013	DBLP DOI BibTeX RDF
16	Masoud Daneshtalab, Masoumeh Ebrahimi, Juha Plosila, Hannu Tenhunen	CARS: congestion-aware request scheduler for network interfaces in NoC-based manycore systems.	DATE	2013	DBLP DOI BibTeX RDF
16	N. Anurag Murty, Vijay Natarajan, Sathish S. Vadhiyar	Efficient homology computations on multicore and manycore systems.	HiPC	2013	DBLP DOI BibTeX RDF
16	Yukoh Matsumoto, Hiroyuki Uchida, Michiya Hagimoto, Yasumori Hibi, Sunao Torii, Masamichi Izumida	Manycore processor for video mining applications.	ASP-DAC	2013	DBLP DOI BibTeX RDF
16	Masaaki Kondo, Son Truong Nguyen, Tomoya Hirao, Takeshi Soga, Hiroshi Sasaki 0001, Koji Inoue	SMYLEref: A reference architecture for manycore-processor SoCs.	ASP-DAC	2013	DBLP DOI BibTeX RDF
16	Koji Inoue	SMYLE Project: Toward high-performance, low-power computing on manycore-processor SoCs.	ASP-DAC	2013	DBLP DOI BibTeX RDF
16	Mohammad H. Foroozannejad, Brent Bohnenstiehl, Soheil Ghiasi	BAMSE: A balanced mapping space exploration algorithm for GALS-based manycore platforms.	ASP-DAC	2013	DBLP DOI BibTeX RDF
16	Xiaoxin Tang, Steven Mills, David M. Eyers, Kai-Cheung Leung, Zhiyi Huang 0001, Minyi Guo	Performance Bottlenecks in Manycore Systems: A Case Study on Large Scale Feature Matching within Image Collections.	HPCC/EUC	2013	DBLP DOI BibTeX RDF
16	Zheng Li 0006, Shuhui Li 0004, Xiayu Hua, Hao Wu 0021, Shangping Ren	Run-Time Reconfiguration to Tolerate Core Failures for Real-Time Embedded Applications on NoC Manycore Platforms.	HPCC/EUC	2013	DBLP DOI BibTeX RDF
16	Emilio Francesquini, Alfredo Goldman, Jean-François Méhaut	Improving the performance of actor model runtime environments on multicore and manycore platforms.	AGERE!@SPLASH	2013	DBLP DOI BibTeX RDF
16	Jung Ho Ahn, Sheng Li 0007, Seongil O, Norman P. Jouppi	McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling.	ISPASS	2013	DBLP DOI BibTeX RDF
16	Luiz De Rose, Jan Treibig, William Jalby, Alba Cristina Magalhaes Alves de Melo, David Abramson 0001, Alastair F. Donaldson, Tomàs Margalef	Topic 11: Multicore and Manycore Programming - (Introduction).	Euro-Par	2013	DBLP DOI BibTeX RDF
16	Safae Dahmani, Loïc Cudennec, Guy Gogniat	Introducing a Data Sliding Mechanism for Cooperative Caching in Manycore Architectures.	IPDPS Workshops	2013	DBLP DOI BibTeX RDF
16	Marco Ceriani, Gianluca Palermo, Simone Secchi, Antonino Tumeo, Oreste Villa	Exploring Manycore Multinode Systems for Irregular Applications with FPGA Prototyping.	FCCM	2013	DBLP DOI BibTeX RDF
16	Ashkan Tousimojarad, Wim Vanderbauwhede	An Efficient Thread Mapping Strategy for Multiprogramming on Manycore Processors.	PARCO	2013	DBLP DOI BibTeX RDF
16	Kazuhisa Ishizaka, Takamichi Miyamoto, S. Akimoto, A. Iketani, T. Hosomi, Junji Sakai	Power efficient realtime super resolution by virtual pipeline technique on a server with manycore coprocessors.	COOL Chips	2013	DBLP DOI BibTeX RDF
16	Pascal Aubry, Pierre-Edouard Beaucamps, Frédéric Blanc 0001, Bruno Bodin, Sergiu Carpov, Loïc Cudennec, Vincent David, Philippe Dore, Paul Dubrulle, Benoît Dupont de Dinechin, François Galea, Thierry Goubier, Michel Harrand, Samuel Jones, Jean-Denis Lesage, Stéphane Louise, Nicolas Morey Chaisemartin, Thanh-Hai Nguyen, Xavier Raynaud, Renaud Sirdey	Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor.	ICCS	2013	DBLP DOI BibTeX RDF
16	Alexandre Aminot, Alexandre Guerre, Julien Peeters, Yves Lhuillier	PACHA: Low Cost Bare Metal Development for Shared Memory Manycore Accelerators.	ICCS	2013	DBLP DOI BibTeX RDF
16	Gregorio Bernabé, Javier Cuenca 0001, Domingo Giménez	Optimization Techniques for 3D-FWT on Systems with Manycore GPUs and Multicore CPUs.	ICCS	2013	DBLP DOI BibTeX RDF
16	Benoît Dupont de Dinechin, Pierre Guironnet de Massas, Guillaume Lager, Clément Léger, Benjamin Orgogozo, Jérôme Reybert, Thierry Strudel	A Distributed Run-Time Environment for the Kalray MPPA®-256 Integrated Manycore Processor.	ICCS	2013	DBLP DOI BibTeX RDF
16	Chanhee Lee, Sungchan Kim, Soonhoi Ha	Efficient run-time resource management of a manycore accelerator for stream-based applications.	ESTIMedia	2013	DBLP DOI BibTeX RDF
16	José Ignacio Aliaga, Hartwig Anzt, Maribel Castillo, Juan Carlos Fernández 0002, Germán León, Joaquín Pérez, Enrique S. Quintana-Ortí	Performance and Energy Analysis of the Iterative Solution of Sparse Linear Systems on Multicore and Manycore Architectures.	PPAM (1)	2013	DBLP DOI BibTeX RDF
16	Omar Hammami, Khawla Hamwi	MHYNESYS II: Multi-stage hybrid Network on chip synthesis for Next Generation 3D IC Manycore.	ISCAS	2013	DBLP DOI BibTeX RDF
16	Daniel G. Waddington, Juan A. Colmenares, Jilong Kuang, Fengguang Song	KV-Cache: A Scalable High-Performance Web-Object Cache for Manycore.	UCC	2013	DBLP DOI BibTeX RDF
16	Gregorio Bernabé, Javier Cuenca 0001, Domingo Giménez	Optimizing a 3D-FWT Code in a Heterogeneous Cluster of Multicore CPUs and Manycore GPUs.	SBAC-PAD	2013	DBLP DOI BibTeX RDF
16	Georgios Georgakarakos, Masoud Daneshtalab, Juha Plosila	Efficient application mapping in resource limited homogeneous NoC-based manycore systems.	HPCS	2013	DBLP DOI BibTeX RDF
16	Jonathan Passerat-Palmbach, Romain Reuillon, Claude Mazel, David R. C. Hill	Prototyping parallel simulations on manycore architectures using Scala: A case study.	HPCS	2013	DBLP DOI BibTeX RDF
16	Shinichi Yamagiwa, Ryo Jozaki, Shixun Zhang, Ryo Zaizen, Dewen Xu	Exploiting Execution Order and Parallelism from Processing Flow Applying Pipeline-Based Programming Method on Manycore Accelerators.	ICPP	2013	DBLP DOI BibTeX RDF
16	Zain-ul-Abdin, Anders Ahlander, Bertil Svensson	Energy-Efficient Synthetic-Aperture Radar Processing on a Manycore Architecture.	ICPP	2013	DBLP DOI BibTeX RDF
16	Márcio Castro 0001, Emilio Francesquini, Thomas Messi Nguélé, Jean-François Méhaut	Analysis of computing and energy performance of multicore, NUMA, and manycore platforms for an irregular application.	IA3@SC	2013	DBLP DOI BibTeX RDF
16	Benoît Dupont de Dinechin, Renaud Ayrignac, Pierre-Edouard Beaucamps, Patrice Couvert, Benoit Ganne, Pierre Guironnet de Massas, François Jacquet, Samuel Jones, Nicolas Morey Chaisemartin, Frédéric Riss, Thierry Strudel	A clustered manycore processor architecture for embedded and accelerated applications.	HPEC	2013	DBLP DOI BibTeX RDF
16	Shuo Li 0002, Jamshaid Sarwar Malik, Shaoteng Liu, Ahmed Hemani	A code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA.	MES	2013	DBLP DOI BibTeX RDF
16	Ben Kelly, William B. Gardner, Shorin Kyo	AutoPilot: message passing parallel programming for a cache incoherent embedded manycore processor.	MES	2013	DBLP DOI BibTeX RDF
16	Akram Ben Ahmed, Takayuki Ochi, Shohei Miura, Ben Abdallah Abderazek	Run-Time Monitoring Mechanism for Efficient Design of Application-Specific NoC Architectures in Multi/Manycore Era.	CISIS	2013	DBLP DOI BibTeX RDF
16	Daniel Johnson	Multithreaded architectures for manycore throughput processors		2013	RDF
16	Myong Hyon Cho	On-chip networks for manycore architecture.		2013	RDF
16	Athanasios Konstantinidis 0001	Source-to-source compilation of loop programs for manycore processors.		2013	RDF
16	Nathanaël Prémillieu	Améliorer la performance séquentielle à l'ère des processeurs massivement multicœurs. (Increase Sequential Performance in the Manycore Era).		2013	RDF
16	Quanyou Feng, Huanzhong Li, Wenhua Dou	A Hybrid Photonic Burst-Switched Interconnection Network for Large-Scale Manycore System.	IEICE Trans. Inf. Syst.	2012	DBLP DOI BibTeX RDF
16	Arne Kutzner, Pok-Son Kim, Won-Kwang Park	Asymptotically Optimal Merging on ManyCore GPUs.	IEICE Trans. Inf. Syst.	2012	DBLP DOI BibTeX RDF
16	Mahantesh Halappanavar, John Feo, Oreste Villa, Antonino Tumeo, Alex Pothen	Approximate weighted matching on emerging manycore and multithreaded architectures.	Int. J. High Perform. Comput. Appl.	2012	DBLP DOI BibTeX RDF
16	Xi E. Chen, Tor M. Aamodt	Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors.	IEEE Trans. Computers	2012	DBLP DOI BibTeX RDF
16	Marco D. Mazzeo	The Spy Element Method - A universal approach to complex computing on manycore processors.	J. Comput. Sci.	2012	DBLP DOI BibTeX RDF
16	Christos Ttofis, Theocharis Theocharides, Maria K. Michael	FPGA-Based Laboratory Assignments for NoC-Based Manycore Systems.	IEEE Trans. Educ.	2012	DBLP DOI BibTeX RDF
16	H. Carter Edwards, Daniel Sunderland, Vicki Porter, Chris Amsler, Sam Mish	Manycore performance-portability: Kokkos multidimensional array library.	Sci. Program.	2012	DBLP DOI BibTeX RDF
16	Francisco J. Ballesteros, Noah Evans, Charles Forsyth, Gorka Guardiola, Jim McKie, Ron Minnich, Enrique Soriano-Salvador	NIX: A Case for a Manycore System for Cloud Computing.	Bell Labs Tech. J.	2012	DBLP DOI BibTeX RDF
16	Michael Garland, Vinod Grover, Kevin Skadron	Scalable Manycore Computing with CUDA.	Fundamentals of Multicore Software Development	2012	DBLP DOI BibTeX RDF
16	Hiroshi Sasaki 0001, Teruo Tanimoto, Koji Inoue, Hiroshi Nakamura	Scalability-based manycore partitioning.	PACT	2012	DBLP DOI BibTeX RDF
16	Andrew P. Black, Theo D'Hondt, Doug Kimelman, Martin C. Rinard, David M. Ungar (eds.)	Proceedings of the 2012 ACM workshop on Relaxing synchronization for multicore and manycore scalability, RACES@SPLASH 2012, Tucson, Arizona, USA, October 21, 2012.	RACES@SPLASH	2012	DBLP DOI BibTeX RDF
16	Andrew P. Black, Theo D'Hondt, Doug Kimelman, Martin C. Rinard, David M. Ungar	Workshop on relaxing synchronization for multicore and manycore scalability (RACES 2012).	SPLASH	2012	DBLP DOI BibTeX RDF
16	Chaeseok Im, Minkyu Jeong, Jae Don Lee, Seungwon Lee, Shihwa Lee	A real-time operating system for manycore systems.	SAC	2012	DBLP DOI BibTeX RDF
16	Christoph W. Kessler, Usman Dastgeer, Samuel Thibault, Raymond Namyst, Andrew Richards, Uwe Dolinsky, Siegfried Benkner, Jesper Larsson Träff, Sabri Pllana	Programmability and performance portability aspects of heterogeneous multi-/manycore systems.	DATE	2012	DBLP DOI BibTeX RDF
16		IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2012, Fukushima, Japan, September 20-22, 2012	MCSoC	2012	DBLP BibTeX RDF
16	Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf	Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation.	ARCS Workshops	2012	DBLP BibTeX RDF
16	Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner 0001, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe	Invasive manycore architectures.	ASP-DAC	2012	DBLP DOI BibTeX RDF
16	Stefan Wallentowitz, Andreas Lankes, Aurang Zaib, Thomas Wild, Andreas Herkersdorf	A framework for Open Tiled Manycore System-On-Chip.	FPL	2012	DBLP DOI BibTeX RDF
16	Ananya Muddukrishna, Artur Podobas, Mats Brorsson, Vladimir Vlassov	Task Scheduling on Manycore Processors with Home Caches.	Euro-Par Workshops	2012	DBLP DOI BibTeX RDF
16	Eduard Ayguadé, Dionisios N. Pnevmatikatos, Rudolf Eigenmann, Mikel Luján, Sabri Pllana	Topic 11: Multicore and Manycore Programming.	Euro-Par	2012	DBLP DOI BibTeX RDF
16	Hanjoon Kim, Gwangsun Kim, John Kim	Scalable on-chip network in power constrained manycore processors.	IGCC	2012	DBLP DOI BibTeX RDF
16	Ajay Joshi, Chao Chen 0003, Zafar Takhirov, Bobak Nazer	A multi-layer approach to green computing: Designing energy-efficient digital circuits and manycore architectures.	IGCC	2012	DBLP DOI BibTeX RDF
16	Lawrence Cayton	Accelerating Nearest Neighbor Search on Manycore Systems.	IPDPS	2012	DBLP DOI BibTeX RDF
16	Zain-ul-Abdin, Essayas Gebrewahid, Bertil Svensson	Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture.	IPDPS Workshops	2012	DBLP DOI BibTeX RDF
16	George Kurian, Chen Sun 0003, Chia-Hsin Owen Chen, Jason E. Miller, Jürgen Michel, Lan Wei, Dimitri A. Antoniadis, Li-Shiuan Peh, Lionel C. Kimerling, Vladimir Stojanovic, Anant Agarwal	Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads.	IPDPS	2012	DBLP DOI BibTeX RDF
16	Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitrios Tsaliagkos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos	Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures.	FCCM	2012	DBLP DOI BibTeX RDF
16	Sen Ma, Miaoqing Huang, Eugene Cartwright, David Andrews 0001	Scalable Memory Hierarchies for Embedded Manycore Systems.	ARC	2012	DBLP DOI BibTeX RDF
16	Georgia Giannopoulou, Kai Lampka, Nikolay Stoimenov, Lothar Thiele	Timed model checking with abstractions: towards worst-case response time analysis in resource-sharing manycore systems.	EMSOFT	2012	DBLP DOI BibTeX RDF
16	Miao Luo, Dhabaleswar K. Panda 0001, Khaled Z. Ibrahim, Costin Iancu	Congestion avoidance on manycore high performance computing systems.	ICS	2012	DBLP DOI BibTeX RDF
16	Lorenzo Verdoscia, Roberto Vaccaro	D3AS project: a different approach to the manycore challenges.	Conf. Computing Frontiers	2012	DBLP DOI BibTeX RDF
16	Yueming Yang, Zewen Shi, Jianming Yu, Liulin Zhong, Xiaoyang Zeng, Zhiyi Yu	Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability.	ISCAS	2012	DBLP DOI BibTeX RDF
16	Alessandro Morari, Antonino Tumeo, Oreste Villa, Simone Secchi, Mateo Valero	Efficient Sorting on the Tilera Manycore Architecture.	SBAC-PAD	2012	DBLP DOI BibTeX RDF
16	William J. Song, Sudhakar Yalamanchili, Arun F. Rodrigues, Saibal Mukhopadhyay	Instruction-based energy estimation methodology for asymmetric manycore processor simulations.	SimuTools	2012	DBLP DOI BibTeX RDF
16	Rajesh Kumar Pal, Kolin Paul, Sanjiva Prasad	ReKonf: A Reconfigurable Adaptive ManyCore Architecture.	ISPA	2012	DBLP DOI BibTeX RDF
16	Jonathan Passerat-Palmbach, David R. C. Hill	How to correctly deal with pseudorandom numbers in manycore environments: Application to GPU programming with Shoverand.	HPCS	2012	DBLP DOI BibTeX RDF
16	Bernhard Fechner	Challenges for the manycore era: From dawn to dusk(?).	HPCS	2012	DBLP DOI BibTeX RDF
16	Dinesh Agarwal, Sami Wilf, Abinashi Dhungel, Sushil K. Prasad	Acceleration of Bilateral Filtering Algorithm for Manycore and Multicore Architectures.	ICPP	2012	DBLP DOI BibTeX RDF
16	Samuel Williams 0001, Dhiraj D. Kalamkar, Amik Singh, Anand M. Deshpande, Brian van Straalen, Mikhail Smelyanskiy, Ann S. Almgren, Pradeep Dubey, John Shalf, Leonid Oliker	Optimization of geometric multigrid for emerging multi- and manycore processors.	SC	2012	DBLP DOI BibTeX RDF
16	Jussara Marandola, Stéphane Louise, Loïc Cudennec, Jean-Thomas Acquaviva, David A. Bader	Enhancing Cache Coherent Architectures with access patterns for embedded manycore systems.	ISSoC	2012	DBLP DOI BibTeX RDF
16	Ajay Joshi	Tutorial T8A: Designing Silicon-Photonic Communication Networks for Manycore Systems.	VLSI Design	2012	DBLP DOI BibTeX RDF
16	Fabrice Lemonnier, Philippe Millet	FlexTiles: self adaptive heterogeneous manycore based on flexible tiles (FP7 project).	INA-OCMC@HiPEAC	2012	DBLP DOI BibTeX RDF
16	Christian Fabre, Iuliana Bacivarov, Eth Zürich, Ananda Basu, Martino Ruggiero, David Atienza, Eric Flamand	PRO3D: programming for future 3D manycore architectures.	INA-OCMC@HiPEAC	2012	DBLP DOI BibTeX RDF
16	H. Carter Edwards, Daniel Sunderland	Kokkos Array performance-portable manycore programming model.	PMAM	2012	DBLP DOI BibTeX RDF
16	Tuan Tu Tran	Bioinformatics Sequence Comparisons on Manycore Processors. (Comparaisons de séquences biologiques sur architecture massivement multi-cœurs).		2012	RDF
16	Hans-Juergen Boehm	Position paper: nondeterminism is unavoidable, but data races are pure evil.	RACES@SPLASH	2012	DBLP DOI BibTeX RDF
16	Max OrHai, Andrew P. Black	Approximate parallel sorting on a spatial computer.	RACES@SPLASH	2012	DBLP DOI BibTeX RDF
16	Philip W. Howard, Jonathan Walpole	A case for relativistic programming.	RACES@SPLASH	2012	DBLP DOI BibTeX RDF
16	Sasa Misailovic, Stelios Sidiroglou, Martin C. Rinard	Dancing with uncertainty.	RACES@SPLASH	2012	DBLP DOI BibTeX RDF
16	David M. Ungar, Doug Kimelman, Sam S. Adams, Mark N. Wegman	Does better throughput require worse latency?	RACES@SPLASH	2012	DBLP DOI BibTeX RDF
16	Harold W. Cain, Mikko H. Lipasti	Edge chasing delayed consistency: pushing the limits of weak memory models.	RACES@SPLASH	2012	DBLP DOI BibTeX RDF