Search results for "pipeline"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
14	Basant K. Mohanty, Pramod Kumar Meher	Throughput-scalable hybrid-pipeline architecture for multilevel lifting 2-D DWT of JPEG 2000 coder.	ASAP	2008	DBLP DOI BibTeX RDF
14	Emmanuel Touloupis, James A. Flint, Vassilios A. Chouliaras, David D. Ward	Study of the Effects of SEU-Induced Faults on a Pipeline Protected Microprocessor.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	fault modeling and simulation, fault tolerance, fault injection, soft error, SEU, microprocessor test
14	Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer	FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
14	Xiaogang Dong, Peter Majewicz, Gordon McNutt, Charles A. Bouman, Jan P. Allebach, Ilya Pollak	A Document Page Classification Algorithm in Copy Pipeline.	ICIP (3)	2007	DBLP DOI BibTeX RDF
14	Suhyun Kim, Soo-Mook Moon	Rotating Register Allocation for Enhanced Pipeline Scheduling.	PACT	2007	DBLP DOI BibTeX RDF
14	Michael Hinz, Stefan Pietschmann, Matthias Umbach, Klaus Meißner	Adaptation and Distribution of Pipeline-Based Context-Aware Web Architectures.	WICSA	2007	DBLP DOI BibTeX RDF
14	Tomas Ágoston, Csaba Csuprai, Juraj Onderik, Roman Durikovic	Design of Modular Rendering Pipeline.	CIT	2007	DBLP DOI BibTeX RDF
14	Melissa Cefkin, Jakita Owensby Thomas, Jeanette Blomberg	The implications of enterprise-wide pipeline management tools for organizational relations and exchanges.	GROUP	2007	DBLP DOI BibTeX RDF	enterprise-wide technologies, organizational relations, sales operations, ethnography, business processes, work practices, information exchange
14	Dang Ba Khac Trieu, Tsutomu Maruyama	A Pipeline Implementation of a Watershed Algorithm on FPGA.	FPL	2007	DBLP DOI BibTeX RDF
14	Edgar C. Portante, Brian A. Craig, Stephen M. Folga	NGFAST: a simulation model for rapid assessment of impacts of natural gas pipeline breaks and flow reductions at U.S. state borders and import points.	WSC	2007	DBLP DOI BibTeX RDF
14	Chen Yu 0005, Dan C. Marinescu, John P. Morrison, Brian C. Clayton, David A. Power	An Automated Data Processing Pipeline for Virus Structure Determination at High Resolution.	IPDPS	2007	DBLP DOI BibTeX RDF
14	Janusz A. Starzyk, Mingwei Ding, Yinyin Liu	Hybrid Pipeline Structure for Self-Organizing Learning Array.	ISNN (2)	2007	DBLP DOI BibTeX RDF
14	Andrea Fusiello, Luca Irsara	An Uncalibrated View-Synthesis Pipeline.	ICIAP	2007	DBLP DOI BibTeX RDF
14	Francesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti	A distortion model for pipeline Analog-to-Digital converters.	ISCAS	2007	DBLP DOI BibTeX RDF
14	Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda	Improved Background Algorithms for Pipeline ADC Full Calibration.	ISCAS	2007	DBLP DOI BibTeX RDF
14	Behnam Sedighi, Mehrdad Sharif Bakhtiar	An 8-bit 300MS/s Switched-Current Pipeline ADC in 0.18µm CMOS.	ISCAS	2007	DBLP DOI BibTeX RDF
14	Gholamreza Nikandish, Behnam Sedighi, Mehrdad Sharif Bakhtiar	Performance Comparison of Switched-Capacitor and Switched-Current Pipeline ADCs.	ISCAS	2007	DBLP DOI BibTeX RDF
14	Behnam Sedighi, Mehrdad Sharif Bakhtiar	An 8-bit Switched-Resistor Pipeline ADC.	ISCAS	2007	DBLP DOI BibTeX RDF
14	John A. McNeill, Sanjeev Goluguri, Abhilash Nair	"Split-ADC" Digital Background Correction of Open-Loop Residue Amplifier Nonlinearity Errors in a 14b Pipeline ADC.	ISCAS	2007	DBLP DOI BibTeX RDF
14	Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi	An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding.	IOLTS	2007	DBLP DOI BibTeX RDF
14	Reen-Cheng Wang, Su-Ling Wu, Ruay-Shiung Chang	Enhancing Data Replication with Greedy Pipeline-Based Aggressive Copy Protocol in Data Grids.	ISPA	2007	DBLP DOI BibTeX RDF
14	Mitsunori Kubo, Baoliu Ye, Arata Shinozaki, Minyi Guo	UMP-PerComp: A Ubiquitous Multiprocessor Network-Based Pipeline Processing Framework for Pervasive Computing Environments.	AINA	2007	DBLP DOI BibTeX RDF
14	Joachim Georgii, Rüdiger Westermann	A Generic and Scalable Pipeline for GPU Tetrahedral Grid Rendering.	IEEE Trans. Vis. Comput. Graph.	2006	DBLP DOI BibTeX RDF	programmable graphics hardware, unstructured grids, Direct volume rendering
14	Patric Ljung, Calle Winskog, Anders Persson, Claes Lundström, Anders Ynnerman	Full Body Virtual Autopsies using a State-of-the-art Volume Rendering Pipeline.	IEEE Trans. Vis. Comput. Graph.	2006	DBLP DOI BibTeX RDF	autopsies, volume rendering, Forensics, medical visualization, large scale data
14	M. Ali Akcayol 0001	Application of Fuzzy Logic Controlled Cathodic Protection on Iraq-Turkey Crude Oil Pipeline.	Appl. Intell.	2006	DBLP DOI BibTeX RDF	cathodic protection, fuzzy control, microcontroller
14	Vahid Majidzadeh, Omid Shoaei	Arbitrary design of high order noise transfer function for a novel class of reduced-sample-rate sigma-delta-pipeline ADCs.	DATE	2006	DBLP DOI BibTeX RDF
14	Patrick May, Hans-Christian Ehrlich, Thomas Steinke 0001	ZIB Structure Prediction Pipeline: Composing a Complex Biological Workflow Through Web Services.	Euro-Par	2006	DBLP DOI BibTeX RDF
14	Mark A. Franklin, Eric J. Tyson, James H. Buckley, Patrick Crowley, John Maschmeyer	Auto-pipe and the X language: a pipeline design tool and description language.	IPDPS	2006	DBLP DOI BibTeX RDF
14	Dong-Ik Ko, Shuvra S. Bhattacharyya	The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	design space exploration, multiprocessor scheduling, system-level models
14	Gerhard Lienhart, Guillermo Marcus Martinez, Andreas Kugel, Reinhard Männer	Rapid Design of Special-Purpose Pipeline Processors with FPGAs and its Application to Computational Fluid Dynamics.	FCCM	2006	DBLP DOI BibTeX RDF
14	Jian Feng 0001, Huaguang Zhang	Algorithm of Pipeline Leak Detection Based on Discrete Incremental Clustering Method.	ICIC (2)	2006	DBLP DOI BibTeX RDF
14	Alexander A. Petrovsky, Sergei L. Shkredov	Automatic Generation of Split-Radix 2-4 Parallel-Pipeline FFT Processors: Hardware Reconfiguration and Core Optimizations.	PARELEC	2006	DBLP DOI BibTeX RDF
14	Weihua Zhang, Tao Bao, Binyu Zang, Chuanqi Zhu	Data Pipeline Optimization for Shared Memory Multiple-SIMD Architecture.	LCPC	2006	DBLP DOI BibTeX RDF
14	Luca Picolli, Franco Maloberti, Andrea Rossini, Fausto Borghetti, Piero Malcovati, Andrea Baschirotto	A 10-bit pipeline A/D converter without timing signals.	ISCAS	2006	DBLP DOI BibTeX RDF
14	Hamid Charkhkar, Alireza Asadi, Reza Lotfi	A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter.	ISCAS	2006	DBLP DOI BibTeX RDF
14	Kuan Zhou, Yifei Luo, Sizhong Chen, Allen Drake, John F. McDonald 0001, Tong Zhang 0002	Triple-rail MOS current mode logic for high-speed self-timed pipeline applications.	ISCAS	2006	DBLP DOI BibTeX RDF
14	Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda	Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs.	ISCAS	2006	DBLP DOI BibTeX RDF
14	Olujide A. Adeniran, Andreas Demosthenous	A 19.5mW 1.5V 10-bit pipeline ADC for DVB-H systems in 0.35µm CMOS.	ISCAS	2006	DBLP DOI BibTeX RDF
14	Chris Thorne	Error Minimising Pipeline for Hi-Fidelity, Scalable Geospatial Simulation.	CW	2006	DBLP DOI BibTeX RDF
14	Michael I. Gordon, William Thies, Saman P. Amarasinghe	Exploiting coarse-grained task, data, and pipeline parallelism in stream programs.	ASPLOS	2006	DBLP DOI BibTeX RDF	Raw, coarse-grained dataflow, streams, multicore, software pipelining, StreamIt
14	Kyung-Hoon Lee, Young-Jae Cho, Hee-Cheol Choi, Yong-Hyun Park, Doo-Hwan Sa, Young-Lok Kim, Seung-Hoon Lee	A 14b 100MS/s 3.4mm2 145mW 0.18um CMOS Pipeline A/D Converter.	APCCAS	2006	DBLP DOI BibTeX RDF
14	Gholamreza Nikandish, Behnam Sedighi, Mehrdad Sharif Bakhtiar	INL Prediction Method in Pipeline ADCs.	APCCAS	2006	DBLP DOI BibTeX RDF
14	Juan R. Cebral, Marcelo Adrián Castro, Sunil Appanaboyina, Christopher M. Putman, Daniel Millan, Alejandro F. Frangi	Efficient pipeline for image-based patient-specific analysis of cerebral aneurysm hemodynamics: technique and sensitivity.	IEEE Trans. Medical Imaging	2005	DBLP DOI BibTeX RDF
14	Shanshan Li 0001, Xiangke Liao, Yusong Tan, Jin-Yuan Liu	Dynamic Thread Management in Kernel Pipeline Web Server.	NPC	2005	DBLP DOI BibTeX RDF
14	Babak Salamat, Amirali Baniasadi	Area-Aware Pipeline Gating for Embedded Processors.	PATMOS	2005	DBLP DOI BibTeX RDF
14	Ludovic Barrandon, Samuel Crand, Dominique Houzet	Systematic Figure of Merit Computation for the Design of Pipeline ADC.	DATE	2005	DBLP DOI BibTeX RDF
14	Xiao Bing Huang, Jian Tang 0001	SPL: An Structured Pipeline Method for Frequent Remote Service Interactions in Bioinformatics Workflows.	ICWS	2005	DBLP DOI BibTeX RDF
14	Swapna S. Gokhale, Sherif M. Yacoub	Performability Analysis of a Pipeline Software Architecture.	COMPSAC (1)	2005	DBLP DOI BibTeX RDF
14	Eddy Caron, Frederic Desprez, Frédéric Suter	Out-of-Core and Pipeline Techniques for Wavefront Algorithms.	IPDPS	2005	DBLP DOI BibTeX RDF
14	Iain Bate, Ralf Dieter Reutemann	Efficient Integration of Bimodal Branch Prediction and Pipeline Analysis.	RTCSA	2005	DBLP DOI BibTeX RDF
14	Bruno Vaz, João Goes, R. Piloto, J. Neto, Rui Monteiro, Nuno Paulino 0002	A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
14	Byung Geun Lee, Shouli Yan	A new ratio-independent A/D conversion technique for high-resolution pipeline A/D converters.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
14	Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda	Full calibration digital techniques for pipeline ADCs.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
14	Jesús Ruiz-Amaya, José M. de la Rosa 0001, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez	Behavioral modeling simulation and high-level synthesis of pipeline A/D converters.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
14	Morteza Gholipour, Hamid Shojaee, Ali Afzali-Kusha, Ahmad Khademzadeh, Mehrdad Nourani	An efficient model for performance analysis of asynchronous pipeline design methods.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
14	Dongmahn Seo, Joahyoung Lee, Dongkook Kim, Yoon Kim, Inbum Jung	An Effective Failure Recovery Mechanism with Pipeline Computing in Clustered-Based VOD Servers.	PCM (2)	2005	DBLP DOI BibTeX RDF
14	Artur Alves Pessoa	Planning the Transportation of Multiple Commodities in Bidirectional Pipeline Networks.	ISAAC	2004	DBLP DOI BibTeX RDF
14	S. Sukhsawas, Khaled Benkrid	A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs.	ISVLSI	2004	DBLP DOI BibTeX RDF
14	Terje N. Andersen, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Bjørnar Hernes, Øystein Moldsvor	A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS.	DATE	2004	DBLP DOI BibTeX RDF
14	Alexander A. Petrovsky, Sergei L. Shkredov	Multi-Pipeline Implementations of Real-Time Vector DFT.	DSD	2004	DBLP DOI BibTeX RDF
14	Peter G. Sassone, D. Scott Wills	Dynamic Strands: Collapsing Speculative Dependence Chains for Reducing Pipeline Communication.	MICRO	2004	DBLP DOI BibTeX RDF
14	Carlos J. Tavares, C. Bungardean, G. M. Matos, José T. de Sousa	Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor.	FPL	2004	DBLP DOI BibTeX RDF
14	Hongfeng Yu 0001, Kwan-Liu Ma, Joel Welling	A Parallel Visualization Pipeline for Terascale Earthquake Simulations.	SC	2004	DBLP DOI BibTeX RDF	massively parallel supercomputing, MPI, High-performance computing, volume rendering, scientific visualization, parallel I/O, parallel rendering, vector field visualization, time-varying data
14	Maurício Breternitz Jr., Herbert H. J. Hum, Sanjeev Kumar	Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU.	IEEE PACT	2003	DBLP DOI BibTeX RDF
14	Achim Rettberg, Mauro Cesar Zanella, Thomas Lehmann 0001, Ulrich Dierkes, Carsten Rustemeier	Control Development for Mechatronic Systems with a Fully Reconfigurable Pipeline Architecture.	SBCCI	2003	DBLP DOI BibTeX RDF
14	Achim Rettberg, Mauro Cesar Zanella, Thomas Lehmann 0001, Christophe Bobda	A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
14	Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger	Microprocessor pipeline energy analysis.	ISLPED	2003	DBLP DOI BibTeX RDF	alpha 21264, over-provisioning, power, energy, speculation
14	Väinö Hakkarainen, Lauri Sumanen, Mikko Aho, Mikko Waltari, Kari Halonen	A self-calibration technique for time-interleaved pipeline ADCs.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
14	Jianjun Guo, Waisiu Law, Charles T. Peach, Ward J. Helms, David J. Allstot	A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
14	Shen-Chuan Tai, Chuen-Ching Wang, Jui-Lin Wang	Circuit-Sharing Design between FFT and IMDCT with Pipeline Structure for DAB Receiver .	AINA	2003	DBLP DOI BibTeX RDF
14	Chandrama Shaw, Debashis Chatterji, Pradipta Maji, Subhayan Sen, B. N. Roy, Parimal Pal Chaudhuri	A Pipeline Architecture for Encompression (Encryption + Compression) Technology.	VLSI Design	2003	DBLP DOI BibTeX RDF
14	Michael D. Powell, T. N. Vijaykumar	Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage.	ISCA	2003	DBLP DOI BibTeX RDF
14	Francisco Almeida, Daniel González, Luz Marina Moreno, Casiano Rodríguez	An Analytical Model for Pipeline Algorithms on Heterogeneous Clusters.	PVM/MPI	2002	DBLP DOI BibTeX RDF
14	Marcos Ferretti, Peter A. Beerel	Single-Track Asynchronous Pipeline Templates Using 1-of-N Encoding.	DATE	2002	DBLP DOI BibTeX RDF
14	Lauri Sumanen, Mikko Waltari, Väinö Hakkarainen, Kari Halonen	CMOS dynamic comparators for pipeline A/D converters.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
14	Pedro Amaral, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção	An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
14	Ruy Luiz Milidiú, Artur Alves Pessoa, Eduardo Sany Laber	Complexity of Makespan Minimization for Pipeline Transportation of Petroleum Products.	APPROX	2002	DBLP DOI BibTeX RDF
14	Ruy Luiz Milidiú, Artur Alves Pessoa, Eduardo Sany Laber	Pipeline Transportation of Petroleum Products with No Due Dates.	LATIN	2002	DBLP DOI BibTeX RDF
14	Atit Tamtrakarn, N. Wongkomet	A 2.5-V 10-bit 40-MS/S double sampling pipeline A/D converter.	APCCAS (2)	2002	DBLP DOI BibTeX RDF
14	Markus Weinhardt, Wayne Luk	Pipeline vectorization.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
14	Kazutoshi Kobayashi, Makoto Eguchi, Takuya Iwahashi, Takehide Shibayama, Xiang Li, Kousuke Takai, Hidetoshi Onodera	A vector-pipeline DSP for low-rate videophones.	ASP-DAC	2001	DBLP DOI BibTeX RDF
14	Toshinori Sato, Itsujiro Arita	Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse.	Euro-Par	2001	DBLP DOI BibTeX RDF
14	Oscar Garnica, Juan Lanchares, Román Hermida	Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation.	ACSD	2001	DBLP DOI BibTeX RDF
14	John B. Hughes, Martin Mee, William Donaldson	A low voltage 8-bit, 40 MS/s switched-current pipeline analog-to-digital converter.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
14	Lauri Sumanen, Kari Halonen	A single-amplifier 6-bit CMOS pipeline A/D converter for WCDMA receivers.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
14	R. Iris Bahar, Srilatha Manne	Power and energy reduction via pipeline balancing.	ISCA	2001	DBLP DOI BibTeX RDF
14	Herman Schmit, Srihari Cadambi, Matthew Moe, Seth Copen Goldstein	Pipeline Reconfigurable FPGAs.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
14	Eduardo J. Peralías, Antonio J. Acosta 0001, Adoración Rueda, José L. Huertas	A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters.	DATE	2000	DBLP DOI BibTeX RDF
14	Daniel González, Francisco Almeida, Luz Marina Moreno, Casiano Rodríguez	Optimal Mapping of Pipeline Algorithms (Research Note).	Euro-Par	2000	DBLP DOI BibTeX RDF
14	Francisco Ibarra Picó, Sergio Cuenca-Asensi	An Associative Neural Network and Its Special Purpose Pipeline Architecture in Image Analysis.	IWANN (2)	1999	DBLP DOI BibTeX RDF	Topics Computer vision, real-time quality control, neural nets, texture recognition
14	Bill Coates 0001, Jo C. Ebergen, Jon K. Lexau, Scott Fairbanks, Ian W. Jones, Alex Ridgway, David Money Harris, Ivan E. Sutherland	A Counterflow Pipeline Experiment.	ASYNC	1999	DBLP DOI BibTeX RDF
14	Markus Weinhardt, Wayne Luk	Pipeline Vectorization for Reconfigurable Systems.	FCCM	1999	DBLP DOI BibTeX RDF	hardware pipelines, FPGAs, reconfigurable computing, vectorization, loop transformations
14	Alexander B. Godlevsky, Martin Gazák, Ladislav Hluchý	Parallelizing of Seqential Programs on the Basis of Pipeline and Speculative Features of the Operators.	PaCT	1999	DBLP DOI BibTeX RDF
14	Suhyun Kim, Soo-Mook Moon, Jinpyo Park, Han-Saem Yun	Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling.	LCPC	1999	DBLP DOI BibTeX RDF
14	S. Summerfield, Zhongfeng Wang, Keshab K. Parhi	Area-power-time efficient pipeline-interleaved architectures for wave digital filters.	ISCAS (3)	1999	DBLP DOI BibTeX RDF
14	Oliver Hauck, M. Garg, Sorin A. Huss	Efficient and Safe Asynchronous Wave-Pipeline Architectures for Datapath and Control Unit Applications.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
14	Bruce R. Childers, Jack W. Davidson	A Design Environment for Counterflow Pipeline Synthesis.	LCTES	1998	DBLP DOI BibTeX RDF
14	Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas	Managing Pipeline-Reconfigurable FPGAs.	FPGA	1998	DBLP DOI BibTeX RDF
14	Matthew Moe, Herman Schmit, Seth Copen Goldstein	Characterization and Parameterization of a Pipeline Reconfigurable FPGA.	FCCM	1998	DBLP DOI BibTeX RDF
14	Kazimierz Wiatr	Pipeline Architecture of Specialized Reconfigurable Processors in FPGA Structures for Real-Time Image Pre-Processing.	EUROMICRO	1998	DBLP DOI BibTeX RDF	Image processors, FPGAs, real-time systems, reconfigurable systems