Search results for "thread"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
18	Stephen W. Keckler, William J. Dally, Daniel Maskit, Nicholas P. Carter, Andrew Chang 0001, Whay Sing Lee	Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor.	ISCA	1998	DBLP DOI BibTeX RDF
18	Manuel M. T. Chakravarty	Lazy Thread and Task Creation in Parallel Graph-Reduction.	Implementation of Functional Languages	1997	DBLP DOI BibTeX RDF
18	Yuan-Pin Yu	Object Oriented Teleconsultations in Global Pacs Using Multi-Thread Java.	HICSS (4)	1997	DBLP DOI BibTeX RDF
18	Bodhisattwa Mukherjee, Karsten Schwan	Implementation of Scalable Blocking Locks Using an Adaptive Thread Scheduler.	IPPS	1996	DBLP DOI BibTeX RDF
18	Phillip M. Dickens, Matthew Haines, Piyush Mehrotra, David M. Nicol	Towards a Thread-Based Parallel Direct Execution Simulator.	HICSS (1)	1996	DBLP DOI BibTeX RDF
18	Wim Van de Velde, Johan Opsommer, Erik H. D'Hollander	Performance Modeling of Microkernel Thread Schedulers for Shared Memory Multiprocessors.	PARLE	1993	DBLP DOI BibTeX RDF
18	John C. Mazziotta, H. K. Huang	THREAD (three-dimensional reconstruction and display) with biomedical applications in neuron ultrastructure and computerized tomography.	AFIPS National Computer Conference	1976	DBLP DOI BibTeX RDF
17	Jean-Phillipe Martin, Michael Hicks 0001, Manuel Costa, Periklis Akritidis, Miguel Castro 0001	Dynamically checking ownership policies in concurrent c/c++ programs.	POPL	2010	DBLP DOI BibTeX RDF	security, testing, concurrency, debugging, tools, dynamic analysis
17	Peter W. O'Hearn, Noam Rinetzky, Martin T. Vechev, Eran Yahav, Greta Yorsh	Verifying linearizability with hindsight.	PODC	2010	DBLP DOI BibTeX RDF	hindsight, linearizability, wait-freedom, optimistic concurrency
17	Jaeheon Yi, Cormac Flanagan	Effects for cooperable and serializable threads.	TLDI	2010	DBLP DOI BibTeX RDF	atomicity, yield, race conditions, effect system
17	Jih-Ching Chiu, Yu-Liang Chou, Ding-Siang Su	A hyperscalar multi-core architecture.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	cmps, dynamic multi-core chips, reconfigurable multi-core architectures, chip multiprocessors
17	Yasuko Watanabe, John D. Davis, David A. Wood 0001	WiDGET: Wisconsin decoupled grid execution tiles.	ISCA	2010	DBLP DOI BibTeX RDF	instruction steering, power proportional computing, performance, hardware, power efficiency
17	Stijn Eyerman, Lieven Eeckhout	Probabilistic job symbiosis modeling for SMT processor scheduling.	ASPLOS	2010	DBLP DOI BibTeX RDF	simultaneous multi-threading (smt), symbiotic job scheduling, performance modeling
17	Dmitry G. Korzun, Andrei V. Gurtov	A local equilibrium model for P2P resource ranking.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
17	Bill Lin 0001, Jun (Jim) Xu, Nan Hua, Hao Wang 0006, Haiquan (Chuck) Zhao	A randomized interleaved DRAM architecture for the maintenance of exact statistics counters.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
17	Sipat Triukose, Zhihua Wen, Michael Rabinovich	Content delivery networks: how big is big enough?	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
17	Alma Riska, Erik Riedel	Evaluation of disk-level workloads at different time scales.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
17	Adrian Nistor, Darko Marinov, Josep Torrellas	Light64: lightweight hardware support for data race detection during systematic testing of parallel programs.	MICRO	2009	DBLP DOI BibTeX RDF	execution history hash, data race, systematic testing
17	Philippe Stellwag, Alexander Ditter, Wolfgang Schröder-Preikschat	A wait-free queue for multiple enqueuers and multiple dequeuers using local preferences and pragmatic extensions.	SIES	2009	DBLP DOI BibTeX RDF
17	Magnus Jahre, Lasse Natvig	A light-weight fairness mechanism for chip multiprocessor memory systems.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	dynamic miss handling architecture, miss status holding register, fairness, chip multiprocessor, interference, mechanism
17	Chen Liu 0001, Jean-Luc Gaudiot	The Impact of Resource Sharing Control on the Design of Multicore Processors.	ICA3PP	2009	DBLP DOI BibTeX RDF
17	K. Rustan M. Leino, Peter Müller 0001, Jan Smans	Verification of Concurrent Programs with Chalice.	FOSAD	2009	DBLP DOI BibTeX RDF
17	Luke J. Gosink, Kesheng Wu, E. Wes Bethel, John D. Owens, Kenneth I. Joy	Data Parallel Bin-Based Indexing for Answering Queries on Multi-core Architectures.	SSDBM	2009	DBLP DOI BibTeX RDF
17	Yuxiong He, Wen-Jing Hsu, Charles E. Leiserson	Provably Efficient Online Nonclairvoyant Adaptive Scheduling.	IEEE Trans. Parallel Distributed Syst.	2008	DBLP DOI BibTeX RDF
17	Mladen Berekovic, Tim Niggemeier	A Distributed, Simultaneously Multi-Threaded (SMT) Processor with Clustered Scheduling Windows for Scalable DSP Performance.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	clustering, distributed computing, DSP, MPEG-4, multi-threading, processor architecture, SMT
17	Marcus Völp, Claude-Joachim Hamann, Hermann Härtig	Avoiding timing channels in fixed-priority schedulers.	AsiaCCS	2008	DBLP DOI BibTeX RDF	security, real-time, information flow, fixed-priority scheduling, noninterference
17	Rahul Kumar, Amith R. Mamidala, Matthew J. Koop, Gopalakrishnan Santhanaraman, Dhabaleswar K. Panda 0001	Lock-Free Asynchronous Rendezvous Design for MPI Point-to-Point Communication.	PVM/MPI	2008	DBLP DOI BibTeX RDF
17	Yung-Pin Cheng, Han-Shu Chen	SoftMon: programmable software monitoring with minimum overhead by helper-threading.	SAC	2008	DBLP DOI BibTeX RDF	multi-core CPU, monitoring, SMP, dynamic program analysis, helper threading
17	Samantika Subramaniam, Milos Prvulovic, Gabriel H. Loh	PEEP: Exploiting predictability of memory dependences in SMT processors.	HPCA	2008	DBLP DOI BibTeX RDF
17	Hongtao Zhong, Mojtaba Mehrara, Steven A. Lieberman, Scott A. Mahlke	Uncovering hidden loop level parallelism in sequential applications.	HPCA	2008	DBLP DOI BibTeX RDF
17	Kyle B. Wheeler, Richard C. Murphy, Douglas Thain	Qthreads: An API for programming with millions of lightweight threads.	IPDPS	2008	DBLP DOI BibTeX RDF
17	Nikos Anastopoulos, Nectarios Koziris	Facilitating efficient synchronization of asymmetric threads on hyper-threaded processors.	IPDPS	2008	DBLP DOI BibTeX RDF
17	Madan Musuvathi	Systematic concurrency testing using CHESS.	PADTAD	2008	DBLP DOI BibTeX RDF	testing, concurrency, race conditions
17	Héctor A. Moreno, Roque J. Saltarén, Manuel Ferre, Eugenio Yime, Rafael Aracil, Isela Carrera	Multibody Dynamics Model of a Human Hand for Haptics Interaction.	EuroHaptics	2008	DBLP DOI BibTeX RDF	haptics and parallel computing, Multibody dynamics
17	Guilherme Ottoni, David I. August	Communication optimizations for global multi-threaded instruction scheduling.	ASPLOS	2008	DBLP DOI BibTeX RDF	graph min-cut, communication, synchronization, data-flow analysis, multi-threading, instruction scheduling
17	Bumyong Choi, Leo Porter 0001, Dean M. Tullsen	Accurate branch prediction for short threads.	ASPLOS	2008	DBLP DOI BibTeX RDF	chip multiprocessors, branch prediction
17	Sherif Fadel Fahmy, Binoy Ravindran, E. Douglas Jensen	Fast Scheduling of Distributable Real-Time Threads with Assured End-to-End Timeliness.	Ada-Europe	2008	DBLP DOI BibTeX RDF
17	Zhiyi Huang 0001, Andrew Trotman, Jiaqi Zhang, Xiangfei Jia, Mariusz Nowostawski, Nathan Rountree, Paul Werstein	Virtual Aggregated Processor in Multi-core Computers.	PDCAT	2008	DBLP DOI BibTeX RDF
17	Aysu Betin-Can, Tevfik Bultan, Mikael Lindvall, Benjamin Lux, Stefan Topp	Eliminating synchronization faults in air traffic control software via design for verification with concurrency controllers.	Autom. Softw. Eng.	2007	DBLP DOI BibTeX RDF	Model checking, Synchronization, Design patterns, Interfaces, Concurrent programming
17	Michael Gschwind	The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor.	Int. J. Parallel Program.	2007	DBLP DOI BibTeX RDF	compute-transfer parallelism, multi-level application parallelism, Chip multiprocessor, Cell Broadband Engine, heterogeneous chip multiprocessor
17	Alan Morris, Allen D. Malony, Sameer Shende	Supporting Nested OpenMP Parallelism in the TAU Performance System.	Int. J. Parallel Program.	2007	DBLP DOI BibTeX RDF	TAU, OpenMP, Nested parallelism
17	Alexandra Fedorova, Margo I. Seltzer, Michael D. Smith 0001	Improving Performance Isolation on Chip Multiprocessors via an Operating System Scheduler.	PACT	2007	DBLP DOI BibTeX RDF
17	Michael Cammert, Christoph Heinz, Jürgen Krämer, Bernhard Seeger, Sonny Vaupel, Udo Wolske	Flexible Multi-Threaded Scheduling for Continuous Queries over Data Streams.	ICDE Workshops	2007	DBLP DOI BibTeX RDF
17	Matthew J. Bridges, Neil Vachharajani, Yun Zhang 0005, Thomas B. Jablin, David I. August	Revisiting the Sequential Programming Model for Multi-Core.	MICRO	2007	DBLP DOI BibTeX RDF
17	Erik K. Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David Andrews 0001	Supporting High Level Language Semantics Within Hardware Resident Threads.	FPL	2007	DBLP DOI BibTeX RDF
17	Hyoseung Kim 0001, Hojung Cha	Multithreading Optimization Techniques for Sensor Network Operating Systems.	EWSN	2007	DBLP DOI BibTeX RDF	sensor network operating system, multithreading optimization technique
17	Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao	Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture.	IPDPS	2007	DBLP DOI BibTeX RDF
17	Arrvindh Shriraman, Michael F. Spear, Hemayet Hossain, Virendra J. Marathe, Sandhya Dwarkadas, Michael L. Scott	An integrated hardware-software approach to flexible transactional memory.	ISCA	2007	DBLP DOI BibTeX RDF	RSTM, multiprocessors, transactional memory, cache coherence
17	Kyungwoo Lee, Xing Fang, Samuel P. Midkiff	Practical escape analyses: how good are they?	VEE	2007	DBLP DOI BibTeX RDF	analysis precision, Java, dynamic compilation, escape analysis
17	Xuemei Zhao, Karl Sammut, Fangpo He	Performance Evaluation of a Novel CMP Cache Structure for Hybrid Workloads.	PDCAT	2007	DBLP DOI BibTeX RDF
17	Jung Ho Ahn, William J. Dally	Data parallel address architecture.	IEEE Comput. Archit. Lett.	2006	DBLP DOI BibTeX RDF
17	Costas Kyriacou, Paraskevas Evripidou, Pedro Trancoso	Data-Driven Multithreading Using Conventional Microprocessors.	IEEE Trans. Parallel Distributed Syst.	2006	DBLP DOI BibTeX RDF	nonblocking threads, multiprocessors, high performance computing, multithreading, network of workstations, Dataflow, cache prefetching
17	Ilya Ganusov, Martin Burtscher	Future execution: A prefetching mechanism that uses multiple cores to speed up single threads.	ACM Trans. Archit. Code Optim.	2006	DBLP DOI BibTeX RDF	Future execution, chip multiprocessors, prefetching, memory wall
17	Sumeet Kumar, Aneesh Aggarwal	Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors.	HPCA	2006	DBLP DOI BibTeX RDF
17	Juan del Cuvillo, Weirong Zhu, Ziang Hu, Guang R. Gao	Toward a Software Infrastructure for the Cyclops-64 Cellular Architecture.	HPCS	2006	DBLP DOI BibTeX RDF
17	Wenlong Li, Eric Q. Li, Ran Meng, Tao Wang 0003, Carole Dulong	Performance analysis of Java concurrent programming: a case study of video mining system.	IPDPS	2006	DBLP DOI BibTeX RDF
17	Lukasz Ziarek, Philip Schatz, Suresh Jagannathan	Stabilizers: a modular checkpointing abstraction for concurrent functional programs.	ICFP	2006	DBLP DOI BibTeX RDF	transactions, checkpointing, concurrent programming, exception handling, error recovery, concurrent ML
17	Dan Wallin, Henrik Löf, Erik Hagersten, Sverker Holmgren	Multigrid and Gauss-Seidel smoothers revisited: parallelization on chip multiprocessors.	ICS	2006	DBLP DOI BibTeX RDF	Gauss-Seidel, temporal blocking, CMP, OpenMP, relaxation, orderings, multigrid, Poisson equation, cache blocking
17	Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-Heng Kang, Tien-Fu Chen, Jiun-In Guo	Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications.	ICME	2006	DBLP DOI BibTeX RDF
17	Michael Gschwind	Chip multiprocessing and the cell broadband engine.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	compute-transfer parallelism (CTP), cell broadband engine, memory-level parallelism (MLP), chip multiprocessing, heterogeneous chip multiprocessor
17	Pavlos Petoumenos, Georgios Keramidas, Håkan Zeffer, Stefanos Kaxiras, Erik Hagersten	Modeling Cache Sharing on Chip Multiprocessor Architectures.	IISWC	2006	DBLP DOI BibTeX RDF
17	Joseph J. Sharkey, Dmitry Ponomarev 0001	Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch.	ICPP	2006	DBLP DOI BibTeX RDF
17	Swapna S. Gokhale, Paul J. Vandal, Jijun Lu	Performance and Reliability Analysis ofWeb Server Software Architectures.	PRDC	2006	DBLP DOI BibTeX RDF
17	Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi	Computation spreading: employing hardware migration to specialize CMP cores on-the-fly.	ASPLOS	2006	DBLP DOI BibTeX RDF	dynamic specialization, cache locality
17	Xiangrong Zhou, Peter Petrov	Rapid and low-cost context-switch through embedded processor customization for real-time and control applications.	DAC	2006	DBLP DOI BibTeX RDF
17	Yuxiong He, Wen-Jing Hsu, Charles E. Leiserson	Provably Efficient Two-Level Adaptive Scheduling.	JSSPP	2006	DBLP DOI BibTeX RDF
17	Julia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi	Hardware-modulated parallelism in chip multiprocessors.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF
17	Resit Sendag, Ying Chen, David J. Lilja	The Impact of Incorrectly Speculated Memory Operations in a Multithreaded Architecture.	IEEE Trans. Parallel Distributed Syst.	2005	DBLP DOI BibTeX RDF	mispredicted loads, wrong execution, wrong execution cache, prefetching, Speculation, multithreaded architecture
17	Martin Gasbichler, Michael Sperber	Integrating User-Level Threads with Processes in Scsh.	High. Order Symb. Comput.	2005	DBLP DOI BibTeX RDF	Unix, Scheme, threads, continuations
17	Ilya Ganusov, Martin Burtscher	Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors.	IEEE PACT	2005	DBLP DOI BibTeX RDF
17	M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang 0001, David H. Albonesi	Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance.	IEEE PACT	2005	DBLP DOI BibTeX RDF
17	Taku Ohsawa, Masamichi Takagi, Shoji Kawahara, Satoshi Matsushita	Pinot: Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities.	MICRO	2005	DBLP DOI BibTeX RDF
17	Uwe Brinkschulte, Mathias Pacher	Implementing Control Algorithms Within a Multithreaded Java Microcontroller.	ARCS	2005	DBLP DOI BibTeX RDF	Komodo microcontroller, multithreaded Java microcontroller, GP scheduling, IPC rate, PID controller
17	Michael F. Ringenburg, Dan Grossman	AtomCaml: first-class atomicity via rollback.	ICFP	2005	DBLP DOI BibTeX RDF	transactions, concurrent programming, atomicity, objective caml
17	Yang Chang, Andy J. Wellings	Integrating Hybrid Garbage Collection with Dual Priority Scheduling.	RTCSA	2005	DBLP DOI BibTeX RDF
17	Rajkishore Barik	Efficient Computation of May-Happen-in-Parallel Information for Concurrent Java Programs.	LCPC	2005	DBLP DOI BibTeX RDF
17	Marco Bernardo 0001, Edoardo Bontà	Preserving Architectural Properties in Multithreaded Code Generation.	COORDINATION	2005	DBLP DOI BibTeX RDF
17	Uwe Brinkschulte, Mathias Pacher	Improving the Real-time Behaviour of a Multithreaded Java Microcontroller by Control Theory and Model Based Latency Prediction.	WORDS	2005	DBLP DOI BibTeX RDF
17	Pen-Chung Yew	Using Speculative Multithreading for General-Purpose Applications.	ISPA	2005	DBLP DOI BibTeX RDF
17	Keith L. Clark, Peter J. Robinson 0001, Silvana Zappacosta-Amboldi	Multi-threaded Communicating Agents in Qu-Prolog (Tutorial Paper).	CLIMA	2005	DBLP DOI BibTeX RDF
17	Ohad Shacham, Mooly Sagiv, Assaf Schuster	Scaling model checking of dataraces using dynamic information.	PPoPP	2005	DBLP DOI BibTeX RDF	datarace, lockset, model checking, multithreading, data race detection
17	Dongkeun Kim, Donald Yeung	A study of source-level compiler algorithms for automatic construction of pre-execution code.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	pre-execution, prefetch conversion, speculative loop parallelization, multithreading, program slicing, Data prefetching, memory-level parallelism
17	Andy J. Wellings, Gregory Bollella, Peter C. Dibble, David Holmes	Cost Enforcement and Deadline Monitoring in the Real-Time Specification for Java.	ISORC	2004	DBLP DOI BibTeX RDF
17	Yue Yang, Ganesh Gopalakrishnan, Gary Lindstrom	Memory-Model-Sensitive Data Race Analysis.	ICFEM	2004	DBLP DOI BibTeX RDF
17	Weihang Jiang, Jiuxing Liu, Hyun-Wook Jin, Dhabaleswar K. Panda 0001, Darius Buntinas, Rajeev Thakur, William D. Gropp	Efficient Implementation of MPI-2 Passive One-Sided Communication on InfiniBand Clusters.	PVM/MPI	2004	DBLP DOI BibTeX RDF
17	Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry	Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads.	CGO	2004	DBLP DOI BibTeX RDF
17	Erik Norden	Keynote: Multithreading for Low-Cost, Low-Power Applications.	ARCS	2004	DBLP DOI BibTeX RDF
17	Michael Van Biesbrouck, Timothy Sherwood, Brad Calder	A co-phase matrix to guide simultaneous multithreading simulation.	ISPASS	2004	DBLP DOI BibTeX RDF
17	Won Woo Ro, Jean-Luc Gaudiot	SPEAR: A Hybrid Model for Speculative Pre-Execution.	IPDPS	2004	DBLP DOI BibTeX RDF
17	Dongsoo Kang, Jean-Luc Gaudiot	Speculation Control for Simultaneous Multithreading.	IPDPS	2004	DBLP DOI BibTeX RDF
17	Wlodzimierz M. Zuberek	Enhanced Interleaved Multithreaded Multiprocessors and Their Performance Analysis.	ACSD	2004	DBLP DOI BibTeX RDF	Interleaved multithreaded architectures, performance analysis, timed Petri nets, distributed-memory multiprocessors, event-driven simulation
17	Xiaotong Zhuang, Santosh Pande	Balancing register allocation across threads for a multithreaded network processor.	PLDI	2004	DBLP DOI BibTeX RDF	register allocation, network processor, multithreaded processor
17	Ruchira Sasanka, Sarita V. Adve, Yen-Kuang Chen, Eric Debes	The energy efficiency of CMP vs. SMT for multimedia workloads.	ICS	2004	DBLP DOI BibTeX RDF	multimedia, energy efficiency, CMP, SMT
17	Tzung-Rei Yang, Jong-Jiann Shieh	Dynamic Fetch Engine for Simultaneous Multithreaded Processors.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
17	Michel Dubois 0001	Fighting the memory wall with assisted execution.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	prefetching, cache memories, superscalar processors, simultaneous multithreading, latency tolerance
17	Fernanda B. Viégas, Marc A. Smith	Newsgroup Crowds and AuthorLines: Visualizing the Activity of Individuals in Conversational Cyberspaces.	HICSS	2004	DBLP DOI BibTeX RDF
17	Wlodzimierz M. Zuberek	Modeling and Analysis of Dual Block Multithreading.	FORTE Workshops	2004	DBLP DOI BibTeX RDF	instruction issuing, event–driven simulation, performance analysis, timed Petri nets, pipelined processors, Block multithreading
17	Adam Welc, Antony L. Hosking, Suresh Jagannathan	Preemption-Based Avoidance of Priority Inversion for Java.	ICPP	2004	DBLP DOI BibTeX RDF
17	Julien Lenoir, Philippe Meseure, Laurent Grisoni, Christophe Chaillou	A Suture Model for Surgical Simulation.	ISMS	2004	DBLP DOI BibTeX RDF
17	Jasvir Nagra, Clark D. Thomborson	Threading Software Watermarks.	Information Hiding	2004	DBLP DOI BibTeX RDF