Search results for "ASP-DAC"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Md. Nazmul Islam, Sandip Kundu	PMU-Trojan: On exploiting power management side channel for information leakage.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Yuanqi Shen, Amin Rezaei 0001, Hai Zhou 0001	A comparative investigation of approximate attacks on logic encryptions.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Minsoo Rhu	Accelerator-centric deep learning systems for enhanced scalability, energy-efficiency, and programmability.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Ozgur Sinanoglu	Concerted wire lifting: Enabling secure and cost-effective split manufacturing.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Omayma Matoussi, Frédéric Pétrot	A mapping approach between IR and binary CFGs dealing with aggressive compiler optimizations for performance estimation.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Jeff Dyck	Machine learning for engineering.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Pei-Yu Lee, Iris Hui-Ru Jiang, Tung-Chieh Chen	FastPass: Fast timing path search for generalized timing exception handling.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Sheng Xu, Ying Wang 0001, Yinhe Han 0001, Xiaowei Li 0001	PIMCH: Cooperative memory prefetching in processing-in-memory architecture.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Daniel Tille, Benedikt Gottinger, Ulrike Pfannkuchen, Helmut Graeb, Ulf Schlichtmann	On enabling diagnosis for 1-Pin Test fails in an industrial flow.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Biao Hu 0001, Kai Huang 0001	Scheduling and shaping of complex task activations for mixed-criticality systems.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Qingqing Ma, Chongyan Gu, Neil Hanley, Chenghua Wang, Weiqiang Liu 0001, Máire O'Neill	A machine learning attack resistant multi-PUF design on FPGA.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Huimin Liu, Xiongfei Qu, Lingling Cao, Ruifeng Liu, Yuanzhi Zhang, Meijuan Zhang, Xiaoqiang Li, Wenshen Wang, Chao Lu 0005	A 5.8 GHz DSRC digitally controlled CMOS RF-SoC transceiver for China ETC.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Huizhang Luo, Liang Shi, Qiao Li 0001, Chun Jason Xue, Edwin Hsing-Mean Sha	Energy, latency, and lifetime improvements in MLC NVM with enhanced WOM code.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Chien-Yu Lin, Bo-Cheng Lai	Supporting compressed-sparse activations and weights on SIMD-like accelerator for sparse convolutional neural networks.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Chak-Wa Pui, Peishan Tu, Haocheng Li, Gengjie Chen, Evangeline F. Y. Young	A two-step search engine for large scale boolean matching under NP3 equivalence.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Junmin Jiang, Yan Lu 0002, Xun Liu, Wing-Hung Ki, Philip K. T. Mok, Seng-Pan U, Rui Paulo Martins	A dual-output SC converter with dynamic power allocation for multicore application processors.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Yutaka Masuda, Masanori Hashimoto	MTTF-aware design methodology of error prediction based adaptively voltage-scaled circuits.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Handi Yu, Xin Li 0001	Intelligent corner synthesis via cycle-consistent generative adversarial networks for efficient validation of autonomous driving systems.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Jinjun Xiong	Tutorial-1: Machine learning and deep learning.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, Laxmi Narayan Bhuyan	CAMO: A novel cache management organization for GPGPUs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Dae-Woong Park, Dzuhri Radityo Utomo, Jong-Phil Hong, Sang-Gug Lee 0001	A 230-260GHz wideband amplifier in 65nm CMOS based on dual-peak Gmax-core.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Nour Sayed, Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori	Process variation and temperature aware adaptive scrubbing for retention failures in STT-MRAM.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Seyeon Yoo, Seojin Choi, Juyeop Kim, Heein Yoon, Yongsun Lee, Jaehyouk Choi	Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Kai Neubauer, Christian Haubelt, Philipp Wanko, Torsten Schaub	Utilizing quad-trees for efficient design space exploration with partial assignment evaluation.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Hyunwoo Son, Hwasuk Cho, Jahyun Koo 0001, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim	A low-power wide dynamic-range current readout circuit for biosensors.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Zhiheng Wang 0002, Soheil Mohajer, Kia Bazargan	Low latency parallel implementation of traditionally-called stochastic circuits using deterministic shuffling networks.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Mohammad Saber Golanbari, Anteneh Gebregiorgis, Elyas Moradi, Saman Kiamehr, Mehdi Baradaran Tahoori	Balancing resiliency and energy efficiency of functional units in ultra-low power systems.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Hongbin Zhang, Chao Zhang, Qingda Hu, Chengmo Yang, Jiwu Shu	Performance analysis on structure of racetrack memory.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Che-Lun Hsu, Shaofeng Guo, Yibo Lin, Xiaoqing Xu, Meng Li 0004, Runsheng Wang, Ru Huang, David Z. Pan	Layout-dependent aging mitigation for critical path timing.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Xueyan Wang, Qiang Zhou 0001, Yici Cai, Gang Qu 0001	A conflict-free approach for parallelizing SAT-based de-camouflaging attacks.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Letian Huang, Shuyu Chen, Qiong Wu, Masoumeh Ebrahimi, Junshi Wang, Shuyan Jiang, Qiang Li 0021	A lifetime-aware mapping algorithm to extend MTTF of Networks-on-Chip.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Tin-Yin Lai, Martin D. F. Wong	A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Sergii Osmolovskyi, Johann Knechtel, Igor L. Markov, Jens Lienig	Optimal die placement for interposer-based 3D ICs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Min Soo Kim 0003, Alberto A. Del Barrio, Román Hermida, Nader Bagherzadeh	Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Keith A. Campbell, Chen-Hsuan Lin, Deming Chen	Low-cost hardware architectures for mersenne modulo functional units.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Siyu Liao, Liutong Zhou, Xuan Di, Bo Yuan 0001, Jinjun Xiong	Large-scale short-term urban taxi demand forecasting using deep learning.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim	A 16.6-pJ/b 150-Mb/s body-channel communication transceiver with decision feedback equalization improving >200x area efficiency.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Youngsoo Shin (eds.)	23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018	ASP-DAC	2018	DBLP BibTeX RDF
1	Sangwoo Lee, Woojin Jo, Seung-Woo Song, Youngcheol Chae	A 300-pW audio ΑΣ modulator with 100.5-dB DR using dynamic bias inverter.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Motomi Ishizuka, Kohei Yamada, Hiroki Ishikuro	Design of resource sharing reconfigurable ΔΣ SAR-ADC.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Anand Ramachandran 0001, Huiren Li, Eric W. Klee, Steven S. Lumetta, Deming Chen	Deep Learning for Better Variant Calling for Cancer Diagnosis and Treatment.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Farhana Parveen, Zhezhi He, Shaahin Angizi, Deliang Fan	HielM: Highly flexible in-memory computing using STT MRAM.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Florencia Irena, Daniel Murphy, Sri Parameswaran	CryptoBlaze: A partially homomorphic processor with multiple instructions and non-deterministic encryption support.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Hyeji Kim, Jinyeon Lim, Yeongmin Lee, Woojin Yun, Young-Gyu Kim, Wonseok Choi 0013, Asim Khan, Muhammad Umar Karim Khan, Said Homidov, Hyun Sang Park, Chong-Min Kyung	Real-time depth map processor for offset aperture based single camera system.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Guan-Ruei Lu, Bhargab B. Bhattacharya, Tsung-Yi Ho, Hung-Ming Chen	Multi-level droplet routing in active-matrix based digital-microfluidic biochips.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Arun Chandrasekharan, Stephan Eggersglüß, Daniel Große, Rolf Drechsler	Approximation-aware testing for approximate circuits.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Daifeng Guo, Hongbo Zhang 0001, Martin D. F. Wong	On coloring rectangular and diagonal grid graphs for multiple patterning lithography.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Ruizhou Ding, Zeye Liu 0001, R. D. (Shawn) Blanton, Diana Marculescu	Quantized deep neural networks for energy efficient hardware-based inference.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Jian-Hao Huang, Ren-Shuo Liu	DI-SSD: Desymmetrized interconnection architecture and dynamic timing calibration for solid-state drives.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Chieh-Fu Chang, Che-Wei Chang, Yuan-Hao Chang 0001, Ming-Chang Yang	Rethinking self-balancing binary search tree over phase change memory with write asymmetry.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Yi Cai 0003, Tianqi Tang 0001, Lixue Xia, Ming Cheng, Zhenhua Zhu, Yu Wang 0002, Huazhong Yang	Training low bitwidth convolutional neural network on RRAM.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Norman Chang, Ajay Baranwal, Hao Zhuang, Ming-Chih Shih, Rahul Rajan, Yaowei Jia, Hui-Lun Liao, Ying-Shiun Li, Ting Ku, Rex Lin	Machine learning based generic violation waiver system with application on electromigration sign-off.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Se-un Shin, Sang-Hui Park, Gyu-Hyeong Cho	A reconfigurable SIMO system with 10-output dual-bus DC-DC converter using the load balancing function in group allocator for diversified load condition.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Yeonho Lee 0002, Yoonjae Choi, Chulwoo Kim	12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interface.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Jung-Woo Chang, Suk-Ju Kang	Optimizing FPGA-based convolutional neural networks accelerator for image super-resolution.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Behnam Khodabandeloo, Ahmad Khonsari, Alireza Majidi, Mohammad Hassan Hajiesmaili	Task assignment and scheduling in MPSoC under process variation: A stochastic approach.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Han Zhou 0002, Yijing Sun, Zeyu Sun 0001, Hengyang Zhao, Sheldon X.-D. Tan	Electromigration-lifetime constrained power grid optimization considering multi-segment interconnect wires.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Kyeongrok Jo, Seyong Ahn, Taewhan Kim, Kyu-Myung Choi	Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Tao Liu 0023, Lei Jiang 0001, Yier Jin, Gang Quan, Wujie Wen	PT-spike: A precise-time-dependent single spike neuromorphic architecture with efficient supervised learning.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Qi Liu 0017, Tao Liu 0023, Zihao Liu, Yanzhi Wang, Yier Jin, Wujie Wen	Security analysis and enhancement of model compressed deep learning systems under adversarial attacks.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Junwon Jeong, Seokhyeon Jeong, Chulwoo Kim, Dennis Sylvester, David T. Blaauw	A 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Zeyu Sun 0001, Sheriff Sadiqbatcha, Hengyang Zhao, Sheldon X.-D. Tan	Accelerating electromigration aging for fast failure detection for nanometer ICs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Zheng Zhao 0003, Zheng Wang 0036, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan	Logic synthesis for energy-efficient photonic integrated circuits.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Bin Lin, Fei Xie	SCBench: A benchmark design suite for SystemC verification and validation.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Bing Li 0017, Wei Wen, Jiachen Mao, Sicheng Li, Yiran Chen 0001, Hai Helen Li	Running sparse and low-precision neural network: When algorithm meets hardware.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Hyunseok Hwang, Hyeyeon Lee, Youngcheol Chae	A 6.9mW 120fps 28×50 capacitive touch sensor for 1mm-φ stylus using current-driven ΔΣ ADCs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Manish Pandey	Machine learning and systems for building the next generation of EDA tools.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Xiaotao Jia, Jianlei Yang 0001, Zhaohao Wang, Yiran Chen 0001, Hai Helen Li, Weisheng Zhao	Spintronics based stochastic computing for efficient Bayesian inference system.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Wooseok Lee, Reena Panda, Dam Sunwoo, José A. Joao, Andreas Gerstlauer, Lizy K. John	BUQS: Battery- and user-aware QoS scaling for interactive mobile devices.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Dustin Peterson, Yannick Boekle, Oliver Bringmann 0001	Detecting non-functional circuit activity in SoC designs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Chiraag Juvekar, Anantha P. Chandrakasan, Joyce Kwong, Hyung-Min Lee	A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Junghyup Lee, Arup K. George, Minkyu Je	An ultra-low-noise differential relaxation oscillator based on a swing-boosting scheme.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Tao-Chun Yu, Shao-Yun Fang	Flip-chip routing with IO planning considering practical pad assignment constraints.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Chenguang Wang 0003, Yici Cai, Qiang Zhou 0001, Haoyi Wang	ASAX: Automatic security assertion extraction for detecting Hardware Trojans.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Andreas Grimmer, Berislav Klepic, Tsung-Yi Ho, Robert Wille	Sound valve-control for programmable microfluidic devices.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar 0001	Lifetime-aware design methodology for dynamic partially reconfigurable systems.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Anoop Koyily, Satya Venkata Sandeep Avvaru, Chen Zhou, Chris H. Kim, Keshab K. Parhi	Effect of aging on linear and nonlinear MUX PUFs by statistical modeling.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Mohsen Imani, Max Masich, Daniel Peroni, Pushen Wang, Tajana Rosing	CANNA: Neural network acceleration using configurable approximation on GPGPU.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Shumpei Morita, Song Bian 0001, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato	Efficient worst-case timing analysis of critical-path delay under workload-dependent aging degradation.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Kuan-Te Wu, Jin-Fu Li 0001, Chih-Yen Lo, Jenn-Shiang Lai, Ding-Ming Kwai, Yung-Fa Chou	A channel-sharable built-in self-test scheme for multi-channel DRAMs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Giulia Meuli, Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli	A best-fit mapping algorithm to facilitate ESOP-decomposition in Clifford+T quantum network synthesis.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Eric Schneider, Michael A. Kochte, Hans-Joachim Wunderlich	Multi-level timing simulation on GPUs.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Minseob Shim, Seokhyeon Jeong, Paul D. Myers, Suyoung Bang, Junhua Shen, Chulwoo Kim, Dennis Sylvester, David T. Blaauw, Wanyeong Jung	Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Jaehwan Jung, In-Cheol Park, Youngjoo Lee	A 2.4pJ/bit, 6.37Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Injun Choi, Ji-Hoon Kim	A 2.22 Gbps high-throughput NB-LDPC decoder in 65nm CMOS with aggressive overlap scheduling.	ASP-DAC	2018	DBLP DOI BibTeX RDF
1	Soumya Banerjee 0004, Wenjing Rao	A local reconfiguration based scalable fault tolerant many-processor array.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Minkyu Kim 0001, Abinash Mohanty, Deepak Kadetotad, Naveen Suda, Luning Wei, Pooja Saseendran, Xiaofei He 0001, Yu Cao 0001, Jae-sun Seo	A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Juan Escobedo, Mingjie Lin	Tessellating memory space for parallel access.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Shiqi Lian, Ying Wang 0001, Yinhe Han 0001, Xiaowei Li 0001	BoDNoC: Providing bandwidth-on-demand interconnection for multi-granularity memory systems.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Napoleon Torres-Martinez	ASP-DAC 2017 keynote speech II: Emerging medical technologies for interfacing the brain: From deep brain stimulation to brain computer interfaces.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Satyajit Das, Kevin J. M. Martin, Philippe Coussy, Davide Rossi, Luca Benini	Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Ching-Wen Lin, Chung-Ho Chen	Processor shield for L1 data cache software-based on-line self-testing.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Steve Trimberger	ASP-DAC 2017 keynote speech III: All-programmable FPGAs: More powerful devices require more powerful tools.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Jiabei Ge, Changhao Yan, Hai Zhou 0001, Dian Zhou, Xuan Zeng 0001	An efficient algorithm for stencil planning and optimization in E-beam lithography.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Sebastian Huhn 0001, Stefan Frehse, Robert Wille, Rolf Drechsler	Enhancing robustness of sequential circuits using application-specific knowledge and formal methods.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Michele Lora, Enrico Fraccaroli, Franco Fummi	Virtual prototyping of smart systems through automatic abstraction and mixed-signal scheduling.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Jai-Ming Lin, Bo-Heng Yu, Li-Yen Chang	Regularity-aware routability-driven placement prototyping algorithm for hierarchical mixed-size circuits.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Daniel P. Seemuth, Azadeh Davoodi, Katherine Morrow	Flexible interconnect in 2.5D ICs to minimize the interposer's metal layers.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Chung-Yao Hung, Peng-Yi Chou, Wai-Kei Mak	Optimizing DSA-MP decomposition and redundant via insertion with dummy vias.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Farimah Farahmandi, Yuanwen Huang, Prabhat Mishra 0001	Trojan localization using symbolic algebra.	ASP-DAC	2017	DBLP DOI BibTeX RDF

Publications at "ASP-DAC"( http://dblp.L3S.de/Venues/ASP-DAC )