Search results for "ISQED"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Deivid Antunes Tesch, Everton Luís Berz, Fabiano Hessel	RFID indoor localization based on Doppler effect.	ISQED	2015	DBLP DOI BibTeX RDF
1	Tun Li, Jian Hu, Yang Guo 0003, Sikun Li, QingPing Tan	Equivalence checking of scheduling in high-level synthesis.	ISQED	2015	DBLP DOI BibTeX RDF
1	Zijian Hou, Xin Chen, Weifeng He	Improved pipeline data flow for DySER-based platform.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jihai Duan, Qiangyu Hao, Yu Zheng, Baolin Wei, Weilin Xu, Shichao Xu	Design of an incoherent IR-UWB receiver front-end in 180-nm CMOS technology.	ISQED	2015	DBLP DOI BibTeX RDF
1	Maya H. Safieddine, Rouwaida Kanj, Fadi A. Zaraket, Ali S. Elzein, Mohamad Jaber 0001	Separation of concerns for hardware components of embedded systems in BIP.	ISQED	2015	DBLP DOI BibTeX RDF
1	Panagiotis Sismanoglou, Vlasis Pitsios, Dimitris Nikolos	Preemptive built-in self-test for in-field structural testing.	ISQED	2015	DBLP DOI BibTeX RDF
1	Wenjie Huang, Lei Wang 0003	Adaptive tracking channel control for GNSS receivers under renewable energy.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hao Wen 0002, Wei Zhang 0002	Exploring shared memory and cache to improve GPU performance and energy efficiency.	ISQED	2015	DBLP DOI BibTeX RDF
1	Arvind Kumar Sharma, Yogendra Sharma, Sudeb Dasgupta, Bulusu Anand	Efficient static D-latch standard cell characterization using a novel setup time model.	ISQED	2015	DBLP DOI BibTeX RDF
1	Norihiro Kamae, Islam A. K. M. Mahfuzul, Akira Tsuchiya, Tohru Ishihara, Hidetoshi Onodera	Energy reduction by built-in body biasing with single supply voltage operation.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jarbas Silveira, Mathieu Bodin, Joao Marcelo Ferreira, Alan Cadore Pinheiro, Thais Webber, César A. M. Marcon	A fault prediction module for a fault tolerant NoC operation.	ISQED	2015	DBLP DOI BibTeX RDF
1	Xing Huang, Wenzhong Guo, Guolong Chen	Fast obstacle-avoiding octilinear steiner minimal tree construction algorithm for VLSI design.	ISQED	2015	DBLP DOI BibTeX RDF
1	Mohammad Saeed Abrishami, Alireza Shafaei, Yanzhi Wang, Massoud Pedram	Optimal choice of FinFET devices for energy minimization in deeply-scaled technologies.	ISQED	2015	DBLP DOI BibTeX RDF
1	Abdalrahman M. Arafeh, Sadiq M. Sait	Cells reconfiguration around defects in CMOS/nanofabric circuits using simulated evolution heuristic.	ISQED	2015	DBLP DOI BibTeX RDF
1	Masayuki Watanabe, Nanako Niioka, Tetsuya Kobayashi, Rosely Karel, Masa-Aki Fukase, Masashi Imai, Atsushi Kurokawa	An effective model for evaluating vertical propagation delay in TSV-based 3-D ICs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jun Yong Shin, Fadi J. Kurdahi, Nikil D. Dutt	Thermal sensor allocation for SoCs based on temperature gradients.	ISQED	2015	DBLP DOI BibTeX RDF
1	Tae-Jin Chung, Kwang Sub Yoon	A CMOS hysteretic DC-DC buck converter with a low output ripple voltage.	ISQED	2015	DBLP DOI BibTeX RDF
1	James Boley, Benton H. Calhoun	Stack based sense amplifier designs for reducing input-referred offset.	ISQED	2015	DBLP DOI BibTeX RDF
1	Yakup Murat Mert, Osman Seckin Simsek	Employing dynamic body-bias for short circuit power reduction in SRAMs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Zheng Wang 0020, Liu Yang, Anupam Chattopadhyay	Architectural reliability estimation using design diversity.	ISQED	2015	DBLP DOI BibTeX RDF
1	Menglong Guan, Lei Wang 0003	Temperature aware refresh for DRAM performance improvement in 3D ICs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa ElNainay	Novel SAT-based invariant-directed low-power synthesis.	ISQED	2015	DBLP DOI BibTeX RDF
1	Saraju P. Mohanty, Elias Kougianos, Venkata P. Yanambaka	Ultra-fast variability-aware optimization of mixed-signal designs using bootstrapped kriging.	ISQED	2015	DBLP DOI BibTeX RDF
1	Paul Leons, Aryan Yaghoubian, Glenn E. R. Cowan, Jelena Trajkovic, Yvon Nazon, Samar Abdi	On improving the range of inductive proximity sensors for avionic applications.	ISQED	2015	DBLP DOI BibTeX RDF
1	Teng Xu 0001, Miodrag Potkonjak	Digital PUF using intentional faults.	ISQED	2015	DBLP DOI BibTeX RDF
1	Meeta Srivastav, Leyla Nazhandali	Study of the impact of aging on many-core energy-efficient DSP systems.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hailang Wang, Emre Salman	Enhancing system-wide power integrity in 3D ICs with power gating.	ISQED	2015	DBLP DOI BibTeX RDF
1	Yu Cai 0001, Ken Mai, Onur Mutlu	Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks.	ISQED	2015	DBLP DOI BibTeX RDF
1	Karthi Duraisamy, Ryan Gary Kim, Partha Pratim Pande	Enhancing performance of wireless NoCs with distributed MAC protocols.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jianmo Ni, Nan Wang 0003, Takeshi Yoshimura	Tabu search based multiple voltage scheduling under both timing and resource constraints.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jui-Hung Hung, Yu-Cheng Lin, Wei-Kai Cheng, Tsai-Ming Hsieh	A logic difference generator with spare cells consideration for ECO synthesis.	ISQED	2015	DBLP DOI BibTeX RDF
1	Farah B. Yahya, Mohammad M. Mansour, James W. Tschanz, Muhammad M. Khellah	Designing low-VTh STT-RAM for write energy reduction in scaled technologies.	ISQED	2015	DBLP DOI BibTeX RDF
1	Zhaohui Cyril Yuan, Rong Zhu, Yiqin Cao, Guifen Jiang	Adaptive mode assignment in performance-critical cyber-physical systems.	ISQED	2015	DBLP DOI BibTeX RDF
1	Florin Balasa, Noha Abuaesh, Ilie I. Luican, Hongwei David Zhu	Scratch-pad memory banking by dynamic programming for embedded data-intensive applications.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jomu George Mani Paret, Otmane Aït Mohamed	Optimum domain partitioning to increase functional verification coverage.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hailang Wang, Emre Salman	Resource allocation methodology for through silicon vias and sleep transistors in 3D ICs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Cheng-Wei Lin, Swaroop Ghosh	Novel self-calibrating recycling sensor using Schmitt-Trigger and voltage boosting for fine-grained detection.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jae-Won Jang, Swaroop Ghosh	Design and analysis of novel SRAM PUFs with embedded latch for robustness.	ISQED	2015	DBLP DOI BibTeX RDF
1	Chun-An Huang, Li-Chuang, Kim Hsu, Steel Chung, Tim Chan	A novel physical failure analysis of MEMS motion sensor for interface inspection.	ISQED	2015	DBLP DOI BibTeX RDF
1	Xinsheng Wang, Wenpan Liu, Mingyan Yu	A distinctive O(mn) time algorithm for optimal buffer insertions.	ISQED	2015	DBLP DOI BibTeX RDF
1	Marcelo Mandelli, Luciano Ost, Gilles Sassatelli, Fernando Gehm Moraes	Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability.	ISQED	2015	DBLP DOI BibTeX RDF
1	Seok Min Jung, Janet Meiling Roveda	A radiation-hardened-by-design phase-locked loop using feedback voltage controlled oscillator.	ISQED	2015	DBLP DOI BibTeX RDF
1	Luke Pierce, Spyros Tragoudas	Unreachable code identification for improved line coverage.	ISQED	2015	DBLP DOI BibTeX RDF
1	Luv Tomar, Saurabh Gupta, Raghuvir Tomar, Prakash Bhartia	Design and analysis of low pass microstrip filters using MATLAB.	ISQED	2015	DBLP DOI BibTeX RDF
1		Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015	ISQED	2015	DBLP BibTeX RDF
1	Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li 0001, Sri Parameswaran	Side channel attacks in embedded systems: A tale of hostilities and deterrence.	ISQED	2015	DBLP DOI BibTeX RDF
1	Md Tanvir Arafin, Carson Dunbar, Gang Qu 0001, Nathan R. McDonald, L. Yan	A survey on memristor modeling and security applications.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hyunyul Lim, Wooheon Kang, Sungyoul Seo, Yong Lee 0002, Sungho Kang 0001	Low power scan bypass technique with test data reduction.	ISQED	2015	DBLP DOI BibTeX RDF
1	Samaneh Ghandali, Bijan Alizadeh, Zainalabedin Navabi	Low power scheduling in high-level synthesis using dual-Vth library.	ISQED	2015	DBLP DOI BibTeX RDF
1	Lihua Liang, Yuanxiang Zhang, Richard Rao	Impact of geometry parameter on electromigration reliability in FCBGA package.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hyungjung Seo, Jeongwoo Heo, Taewhan Kim	Clock skew optimization for maximizing time margin by utilizing flexible flip-flop timing.	ISQED	2015	DBLP DOI BibTeX RDF
1	Ming Fan 0001, Qiushi Han, Shuo Liu 0001, Gang Quan	On-line reliability-aware dynamic power management for real-time systems.	ISQED	2015	DBLP DOI BibTeX RDF
1	Matheus T. Moreira, Dylan Hand, Peter A. Beerel, Ney Laert Vilar Calazans	TDTB error detecting latches: Timing violation sensitivity analysis and optimization.	ISQED	2015	DBLP DOI BibTeX RDF
1	Tianqi Wang, Liyi Xiao, Mingxue Huo, Chunhua Qi, Shanshan Liu 0001	Novel technique for P-hit single-event transient mitigation using enhance dummy transistor.	ISQED	2015	DBLP DOI BibTeX RDF
1	SheXiao Xuan, Y. Yang	Temperature-aware thread assignment of many-core processor.	ISQED	2015	DBLP DOI BibTeX RDF
1	Chun-Kai Chang, Chung-Hsin Su, Yung-Hua Kao, Ming-Hung Yu, Thilo Sauter, Paul C.-P. Chao 0001	A new single inductor bipolar multiple output (SIBMO) boost converter using pulse frequency modulation (PFM) control for OLED drivers and optical transducers.	ISQED	2015	DBLP DOI BibTeX RDF
1	Nijad Anabtawi, Rony Ferzli	A simplified single-inductor dual-output DC-DC buck converter architecture with a fully digital Σ-Δ based controller.	ISQED	2015	DBLP DOI BibTeX RDF
1	Yao Chen, Andrew B. Kahng, Bao Liu 0001, Wenjun Wang	Crosstalk-aware signal probability-based dynamic statistical timing analysis.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hsin-Ju Chang, Yen-Lung Chen, Conan Yeh, Chien-Nan Jimmy Liu	Layout-aware analog synthesis environment with yield consideration.	ISQED	2015	DBLP DOI BibTeX RDF
1	Taizhi Liu, Chang-Chih Chen, Linda S. Milor	Accurate standard cell characterization and statistical timing analysis using multivariate adaptive regression splines.	ISQED	2015	DBLP DOI BibTeX RDF
1	Srivatsan Chellappa, Chandarasekaran Ramamurthy, Vinay Vashishtha, Lawrence T. Clark	Advanced encryption system with dynamic pipeline reconfiguration for minimum energy operation.	ISQED	2015	DBLP DOI BibTeX RDF
1	Daniel P. Seemuth, Azadeh Davoodi, Katherine Morrow	Automatic die placement and flexible I/O assignment in 2.5D IC design.	ISQED	2015	DBLP DOI BibTeX RDF
1	Liyi Xiao, Jiaqiang Li, Jie Li 0030, Jing Guo 0004	Hardened design based on advanced orthogonal Latin code against two adjacent multiple bit upsets (MBUs) in memories.	ISQED	2015	DBLP DOI BibTeX RDF
1	Pankaj Kumar Pal, Brajesh Kumar Kaushik, B. Anand, S. Dasgupta	A comparative analysis of symmetric and asymmetric dual-k spacer FinFETs from device and circuit perspectives.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jaya Dofe, Connor Reed, Ning Zhang, Qiaoyan Yu	Fault-tolerant methods for a new lightweight cipher SIMON.	ISQED	2015	DBLP DOI BibTeX RDF
1	Roohollah Yarmand, Behzad Ebrahimi, Hassan Afzali-Kusha, Ali Afzali-Kusha, Massoud Pedram	High-performance and high-yield 5 nm underlapped FinFET SRAM design using P-type access transistors.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera	An energy-efficient on-chip memory structure for variability-aware near-threshold operation.	ISQED	2015	DBLP DOI BibTeX RDF
1	Seungwon Kim, Seokhyung Kang, Ki Jin Han, Youngmin Kim	Novel adaptive power gating strategy of TSV-based multi-layer 3D IC.	ISQED	2015	DBLP DOI BibTeX RDF
1	Shuo Wang, Yue Gao, Melvin A. Breuer	GlYFF: A framework for global yield and floorplan aware design optimization.	ISQED	2015	DBLP DOI BibTeX RDF
1	Hend Affes, Amal Chaker, Michel Auguin	Application and OS unconscious power manager for SoC systems.	ISQED	2015	DBLP DOI BibTeX RDF
1	Chieh-Yang Chen, Wen-Tsung Huang, Yiming Li 0005	Electrical characteristic and power consumption fluctuations of trapezoidal bulk FinFET devices and circuits induced by random line edge roughness.	ISQED	2015	DBLP DOI BibTeX RDF
1	Sungyoul Seo, Yong Lee 0002, Joohwan Lee, Sungho Kang 0001	A scan shifting method based on clock gating of multiple groups for low power scan testing.	ISQED	2015	DBLP DOI BibTeX RDF
1	Sylvain Clerc, Fady Abouzeid, Darayus Adil Patel, Jean-Marc Daveau, Cyril Bottoni, Lorenzo Ciampolini, Fabien Giner, David Meyer, Robin Wilson, Philippe Roche, Sylvie Naudet, Arnaud Virazel, Alberto Bosio, Patrick Girard 0001	Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology.	ISQED	2015	DBLP DOI BibTeX RDF
1	Fen Ge, Jia Zhan, Yuan Xie 0001, Vijaykrishnan Narayanan	Exploring memory controller configurations for many-core systems with 3D stacked DRAMs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Kentaroh Katoh, Kazuteru Namba	A low area calibration technique of TDC using variable clock generator for accurate on-line delay measurement.	ISQED	2015	DBLP DOI BibTeX RDF
1	Samir Zampiva, Carlos Moratelli, Fabiano Hessel	A hypervisor approach with real-time support to the MIPS M5150 processor.	ISQED	2015	DBLP DOI BibTeX RDF
1	Karthik Yogendra, Mei-Chin Chen, Xuanyao Fong, Kaushik Roy 0001	Domain wall motion-based low power hybrid spin-CMOS 5-bit Flash Analog Data Converter.	ISQED	2015	DBLP DOI BibTeX RDF
1	Nourhan M. Bahgat, DiaaEldin S. Khalil, Salwa H. El-Ramly	Energy efficient design of DVB-T2 constellation demapper.	ISQED	2015	DBLP DOI BibTeX RDF
1	Chiung-Chih Ho, Hsin-Pei Tsai, Liang-Chi Lai, Rung-Bin Lin	A router for via configurable structured ASIC with standard cells and relocatable IPs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Surajit Kumar Roy, Kaustav Roy, Chandan Giri, Hafizur Rahaman 0001	Recovery of faulty TSVs in 3D ICs.	ISQED	2015	DBLP DOI BibTeX RDF
1	Gary Brist, John Park	A novel approach to IC, package and board co-optimization.	ISQED	2015	DBLP DOI BibTeX RDF
1	Brandon Rumberg, David W. Graham	A low-power field-programmable analog array for wireless sensing.	ISQED	2015	DBLP DOI BibTeX RDF
1	Prateek Pendyala, Vijaya Sankara Rao Pasupureddi	RT-MIL-STD-1553+: Remote terminal controller for MIL-STD-1553B at 100-Mb/s data rate.	ISQED	2015	DBLP DOI BibTeX RDF
1	Jon Nafziger, Dan Burggraf	Method for efficient flash bit cell current compression in deeply erased bits.	ISQED	2015	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Vipul Kumar Mishra	Integrated particle swarm optimization (i-PSO): An adaptive design space exploration framework for power-performance tradeoff in architectural synthesis.	ISQED	2014	DBLP DOI BibTeX RDF
1	Daniela De Venuto, Peter Ledochowitsch, Michel Maharabitz, Jan M. Rabaey	Impedance modeling of the intracortical microelectrode for a reliable design of a brain activity recording system.	ISQED	2014	DBLP DOI BibTeX RDF
1	Konstantis Daloukas, Nestor E. Evmorfopoulos, Panagiota E. Tsompanopoulou, George I. Stamoulis	A 3-D Fast Transform-based preconditioner for large-scale power grid analysis on massively parallel architectures.	ISQED	2014	DBLP DOI BibTeX RDF
1	Dinesh Ganta, Leyla Nazhandali	Circuit-level approach to improve the temperature reliability of Bi-stable PUFs.	ISQED	2014	DBLP DOI BibTeX RDF
1	Samaneh Ghandali, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi	RTL datapath optimization using system-level transformations.	ISQED	2014	DBLP DOI BibTeX RDF
1	Le Zhang, Vivek Sarin	An enlarged-partition based preconditioned iterative solver for parallel power grid simulation.	ISQED	2014	DBLP DOI BibTeX RDF
1	Yucai Wang, Vamsy P. Chodavarapu	Design of a CMOS readout circuit for wide-temperature range capacitive MEMS sensors.	ISQED	2014	DBLP DOI BibTeX RDF
1	Chao Sun 0001, Ayumi Soga, Takahiro Onagi, Koh Johguchi, Ken Takeuchi	A workload-aware-design of 3D-NAND flash memory for enterprise SSDs.	ISQED	2014	DBLP DOI BibTeX RDF
1	Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill 0001, Rajit Manohar	ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes.	ISQED	2014	DBLP DOI BibTeX RDF
1	Hoda Pahlevanzadeh, Qiaoyan Yu	Systematic analyses for latching probability of single-event transients.	ISQED	2014	DBLP DOI BibTeX RDF
1	Zissis Poulos, Yu-Shen Yang, Andreas G. Veneris, Bao Le	Simulation and satisfiability guided counter-example triage for RTL design debugging.	ISQED	2014	DBLP DOI BibTeX RDF
1	Thilo Sauter, Thomas Glatzl, Franz Kohl, Harald Steiner, Almir Talic	Thermal flow sensors based on printed circuit board technology.	ISQED	2014	DBLP DOI BibTeX RDF
1	Saad Bin Nasir, Youngtak Lee, Arijit Raychowdhury	Modeling and analysis of system stability in a distributed power delivery network with embedded digital linear regulators.	ISQED	2014	DBLP DOI BibTeX RDF
1	Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada	Low-power programmable-logic cell arrays using nonvolatile complementary atom switch.	ISQED	2014	DBLP DOI BibTeX RDF
1	Guilherme M. Castilhos, Eduardo Wächter, Guilherme A. Madalozzo, Augusto Erichsen, Thiago Monteiro, Fernando Moraes 0001	A framework for MPSoC generation and distributed applications evaluation.	ISQED	2014	DBLP DOI BibTeX RDF
1	Majid Jalalifar, Gyung-Su Byun	An energy-efficient mobile PAM memory interface for future 3D stacked mobile DRAMs.	ISQED	2014	DBLP DOI BibTeX RDF

Publications at "ISQED"( http://dblp.L3S.de/Venues/ISQED )