Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | Song Fang, Quanyan Zhu |
Channel Leakage and Fundamental Limits of Privacy Leakage for Streaming Data. |
CoRR |
2020 |
DBLP BibTeX RDF |
|
18 | Juliane Krämer, Patrick Struck |
Leakage-Resilient Authenticated Encryption from Leakage-Resilient Pseudorandom Functions. |
IACR Cryptol. ePrint Arch. |
2020 |
DBLP BibTeX RDF |
|
18 | Juliane Krämer, Patrick Struck |
Leakage-Resilient Authenticated Encryption from Leakage-Resilient Pseudorandom Functions. |
COSADE |
2020 |
DBLP DOI BibTeX RDF |
|
18 | Marco Romanelli 0002 |
Machine learning methods for privacy protection : leakage measurement and mechanisms design. (Méthodes d'apprentissage machine pour la protection de la vie privée : mesure de leakage et design des mécanismes). |
|
2020 |
RDF |
|
18 | Chengyu Hu, Rupeng Yang, Pengtao Liu, Tong Li 0011, Fanyu Kong |
A countermeasure against cryptographic key leakage in cloud: public-key encryption with continuous leakage and tampering resilience. |
J. Supercomput. |
2019 |
DBLP DOI BibTeX RDF |
|
18 | Alexandre Duc, Stefan Dziembowski, Sebastian Faust |
Unifying Leakage Models: From Probing Attacks to Noisy Leakage. |
J. Cryptol. |
2019 |
DBLP DOI BibTeX RDF |
|
18 | Yuya Nishio, Atsuki Kobayashi, Kiichi Niitsu |
Design and Calibration of a Small-Footprint, Low-Frequency, and Low-Power Gate Leakage Timer Using Differential Leakage Technique. |
IEICE Trans. Electron. |
2019 |
DBLP DOI BibTeX RDF |
|
18 | Yanwei Zhou, Bo Yang 0003, Yi Mu 0001 |
Continuous leakage-resilient identity-based encryption with leakage amplification. |
Des. Codes Cryptogr. |
2019 |
DBLP DOI BibTeX RDF |
|
18 | Ryo Nishimaki, Takashi Yamakawa |
Leakage-resilient Identity-based Encryption in Bounded Retrieval Model with Nearly Optimal Leakage-Ratio. |
IACR Cryptol. ePrint Arch. |
2019 |
DBLP BibTeX RDF |
|
18 | Min-Ji Seo, Myung-Ho Kim |
A System for Improving Data Leakage Detection based on Association Relationship between Data Leakage Patterns. |
J. Inf. Process. Syst. |
2019 |
DBLP BibTeX RDF |
|
18 | Ryo Nishimaki, Takashi Yamakawa |
Leakage-Resilient Identity-Based Encryption in Bounded Retrieval Model with Nearly Optimal Leakage-Ratio. |
Public Key Cryptography (1) |
2019 |
DBLP DOI BibTeX RDF |
|
18 | Jui-Di Wu, Yuh-Min Tseng, Sen-Shan Huang |
Efficient Leakage-Resilient Authenticated Key Agreement Protocol in the Continual Leakage eCK Model. |
IEEE Access |
2018 |
DBLP DOI BibTeX RDF |
|
18 | Mingwu Zhang, Wentao Leng, Yong Ding 0005, Chunming Tang 0003 |
Tolerating Sensitive-Leakage With Larger Plaintext-Space and Higher Leakage-Rate in Privacy-Aware Internet-of-Things. |
IEEE Access |
2018 |
DBLP DOI BibTeX RDF |
|
18 | Chun Guo 0002, Olivier Pereira, Thomas Peters, François-Xavier Standaert |
Leakage-Resilient Authenticated Encryption with Misuse in the Leveled Leakage Setting: Definitions, Separation Results, and Constructions. |
IACR Cryptol. ePrint Arch. |
2018 |
DBLP BibTeX RDF |
|
18 | Jui-Di Wu, Yuh-Min Tseng, Sen-Shan Huang |
Leakage-Resilient Certificateless Signature Under Continual Leakage Model. |
Inf. Technol. Control. |
2018 |
DBLP DOI BibTeX RDF |
|
18 | Antonio Faonio, Jesper Buus Nielsen, Daniele Venturi 0001 |
Fully leakage-resilient signatures revisited: Graceful degradation, noisy leakage, and construction in the bounded-retrieval model. |
Theor. Comput. Sci. |
2017 |
DBLP DOI BibTeX RDF |
|
18 | Yuya Nishio, Atsuki Kobayashi, Kiichi Niitsu |
A 28μm2, 0.11Hz, 4.5pW gate leakage timer using differential leakage technique in 55nm DDC CMOS for small-footprint, low-frequency and low-power timing generation. |
ICECS |
2017 |
DBLP DOI BibTeX RDF |
|
18 | Behnam Samadpoor Rikan, Hamed Abbasizadeh, Thi Kim Nga Truong, Sung Jin Kim, Kang-Yoon Lee |
A low leakage retention LDO and leakage-based BGR with 120nA quiescent current. |
ISOCC |
2017 |
DBLP DOI BibTeX RDF |
|
18 | Suvradip Chakraborty, Janaka Alawatugoda 0001, C. Pandu Rangan |
Leakage-Resilient Non-interactive Key Exchange in the Continuous-Memory Leakage Setting. |
ProvSec |
2017 |
DBLP DOI BibTeX RDF |
|
18 | Ouwen Shi, Shantanu Dutt |
Co-Exploration of Unit-Time Leakage Power and Latency Spaces for Leakage Energy Minimization in High-Level Synthesis. |
J. Low Power Electron. |
2016 |
DBLP DOI BibTeX RDF |
|
18 | François Durvaux, François-Xavier Standaert |
From Improved Leakage Detection to the Detection of Points of Interests in Leakage Traces. |
EUROCRYPT (1) |
2016 |
DBLP DOI BibTeX RDF |
|
18 | Chengyu Hu, Zuoxia Yu, Rupeng Yang, Qiuliang Xu, Yongbin Zhou, Qixia Yuan |
Weak leakage resilient extractable hash proof system and construction for weak leakage resilient CCA-secure public-key encryption. |
Int. J. Embed. Syst. |
2015 |
DBLP DOI BibTeX RDF |
|
18 | Benjamin Fuller 0001, Ariel Hamlin |
Unifying Leakage Classes: Simulatable Leakage and Pseudoentropy. |
IACR Cryptol. ePrint Arch. |
2015 |
DBLP BibTeX RDF |
|
18 | François Durvaux, François-Xavier Standaert |
From Improved Leakage Detection to the Detection of Points of Interests in Leakage Traces. |
IACR Cryptol. ePrint Arch. |
2015 |
DBLP BibTeX RDF |
|
18 | Benjamin Fuller 0001, Ariel Hamlin |
Unifying Leakage Classes: Simulatable Leakage and Pseudoentropy. |
ICITS |
2015 |
DBLP DOI BibTeX RDF |
|
18 | Danyang Chen, Yongbin Zhou, Yang Han, Rui Xue, Qing He |
On hardening leakage resilience of random extractors for instantiations of leakage-resilient cryptographic primitives. |
Inf. Sci. |
2014 |
DBLP DOI BibTeX RDF |
|
18 | Alexandre Duc, Stefan Dziembowski, Sebastian Faust |
Unifying Leakage Models: from Probing Attacks to Noisy Leakage. |
IACR Cryptol. ePrint Arch. |
2014 |
DBLP BibTeX RDF |
|
18 | Alexandre Duc, Stefan Dziembowski, Sebastian Faust |
Unifying Leakage Models: From Probing Attacks to Noisy Leakage. |
EUROCRYPT |
2014 |
DBLP DOI BibTeX RDF |
|
18 | William E. Cobb, Rusty O. Baldwin, Eric D. Laspe |
Leakage Mapping: A Systematic Methodology for Assessing the Side-Channel Information Leakage of Cryptographic Implementations. |
ACM Trans. Inf. Syst. Secur. |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Jae Hoon Kim, Young Hwan Kim |
Efficient statistical leakage analysis using deterministic cell leakage models. |
Microelectron. J. |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Duong Hieu Phan, Viet Cuong Trinh |
Key-Leakage Resilient Revoke Scheme Resisting Pirates 2.0 in Bounded Leakage Model. |
AFRICACRYPT |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Joep A. de Groot, Boris Skoric, Niels de Vreede, Jean-Paul M. G. Linnartz |
Information Leakage of Continuous-Source Zero Secrecy Leakage Helper Data Schemes. |
IACR Cryptol. ePrint Arch. |
2012 |
DBLP BibTeX RDF |
|
18 | Danyang Chen, Yongbin Zhou, Yang Han, Rui Xue, Qing He |
On Hardening Leakage Resilience of Random Extractors for Instantiations of Leakage Resilient Cryptographic Primitives. |
IACR Cryptol. ePrint Arch. |
2012 |
DBLP BibTeX RDF |
|
18 | Jae Hoon Kim, Young Hwan Kim |
Statistical leakage analysis using the deterministic modeling of cell leakage current. |
ICECS |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Zhe Zhang, Michael A. Turi, José G. Delgado-Frias |
SRAM leakage in CMOS, FinFET and CNTFET technologies: leakage in 8t and 6t sram cells. |
ACM Great Lakes Symposium on VLSI |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Amin Yazdanpanah Goharrizi, Nariman Sepehri |
A Wavelet-Based Approach for External Leakage Detection and Isolation From Internal Leakage in Valve-Controlled Hydraulic Actuators. |
IEEE Trans. Ind. Electron. |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Maziar Goudarzi, Tohru Ishihara, Hamid Noori |
Software-Level Instruction-Cache Leakage Reduction Using Value-Dependence of SRAM Leakage in Nanometer Technologies. |
Trans. High Perform. Embed. Archit. Compil. |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Weiqiang Zhang, Li Su, Yu Zhang, Linfeng Li, Jianping Hu |
Low-Leakage Flip-Flops Based on Dual-Threshold and Multiple Leakage Reduction Techniques. |
J. Circuits Syst. Comput. |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Yu Chen 0003, Song Luo, Zhong Chen 0001 |
A New Leakage-Resilient IBE Scheme in the Relative Leakage Model. (PDF / PS) |
DBSec |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Rajamani Sethuram, Karim Arabi, Mohamed H. Abu-Rahma |
Leakage power profiling and leakage power reduction using DFT hardware. |
VTS |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Wook Kim, Kyung Tae Do, Young Hwan Kim |
Statistical Leakage Estimation Based on Sequential Addition of Cell Leakage Currents. |
IEEE Trans. Very Large Scale Integr. Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Sedat Soydan |
Analyzing the DPA Leakage of the Masked S-box via Digital Simulation and Reducing the Leakage by Inserting Delay Cells. |
SECURWARE |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Kawori Takakubo, Toru Eto, Hajime Takakubo |
Analysis and Modeling of Leakage Current for Four-Terminal MOSFET in Off-State and Low Leakage Switches. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2009 |
DBLP DOI BibTeX RDF |
|
18 | Alexandre Valentian, Edith Beigné |
Automatic Gate Biasing of an SCCMOS Power Switch Achieving Maximum Leakage Reduction and Lowering Leakage Current Variability. |
IEEE J. Solid State Circuits |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Tom Coan, Fatih Hamzaoglu, Walid M. Hafez, Chia-Hong Jan, Pramod Kolar, Sarvesh H. Kulkarni, Jie-Feng Lin, Yong-Gee Ng, Ian Post, Liqiong Wei, Ying Zhang, Kevin Zhang 0001, Mark Bohr |
A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications. |
IEEE J. Solid State Circuits |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Chi-Ying Tsui, Robert Yi-Ching Au, Ricky Yiu-kee Choi |
Minimizing the dynamic and sub-threshold leakage power consumption using least leakage vector-assisted technology mapping. |
Integr. |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Masako Fujii, Hiroaki Suzuki, Hiromi Notani, Hiroshi Makino, Hirofumi Shinohara |
On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effect. |
ESSCIRC |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Tom Coan, Fatih Hamzaoglu, Walid M. Hafez, Chia-Hong Jan, Pramod Kolar, Sarvesh H. Kulkarni, Jie-Feng Lin, Yong-Gee Ng, Ian Post, Liqiong Wei, Yih Zhang, Kevin Zhang 0001, Mark Bohr |
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications. |
ISSCC |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Masanao Yamaoka, Yoshihiro Shinozaki, Noriaki Maeda, Yasuhisa Shimazaki, Kei Kato, Shigeru Shimada, Kazumasa Yanagisawa, Kenichi Osada |
A 300-MHz 25-μA/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor. |
IEEE J. Solid State Circuits |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Emrah Acar, Anirudh Devgan, Sani R. Nassif |
Leakage and Leakage Sensitivity Computation for Combinational Circuits. |
J. Low Power Electron. |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Jin-Hyeok Choi, Yingxue Xu, Takayasu Sakurai |
Statistical leakage current reduction in high-leakage environments using locality of block activation in time domain. |
IEEE J. Solid State Circuits |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Hafijur Rahman, Chaitali Chakrabarti |
A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage. |
ISCAS (2) |
2004 |
DBLP BibTeX RDF |
|
18 | Amit Agarwal 0001, Kaushik Roy 0001, Ram K. Krishnamurthy |
A leakage-tolerant low-leakage register file with conditional sleep transistor. |
SoCC |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Kauschick Roy, Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand |
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits. |
Proc. IEEE |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Howard Falk |
Prolog to: Leakage current mechanisms and leakage reduction techniques in deep-submicrometer cmos circuits. |
Proc. IEEE |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Jin-Hyeok Choi, Takayasu Sakurai |
Statistical leakage current reduction by self-timed cut-off scheme for high leakage environments. |
CICC |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Adam C. Cabe, Zhenyu Qi, Mircea R. Stan |
Stacking SRAM banks for ultra low power standby mode operation. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
stacked SRAM, low-power memory |
18 | Georgios Keramidas, Polychronis Xekalakis, Stefanos Kaxiras |
Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches. |
Trans. High Perform. Embed. Archit. Compil. |
2009 |
DBLP DOI BibTeX RDF |
|
18 | Shuo Wang, Jianwei Dai, El-Sayed A. M. Hasaneen, Lei Wang 0003, Faquir C. Jain |
Utilizing quantum dot transistors with programmable threshold voltages for low-power mobile computing. |
ACM J. Emerg. Technol. Comput. Syst. |
2009 |
DBLP DOI BibTeX RDF |
threshold voltage and quantum dot transistor, Low power |
18 | Stephen P. Kornachuk, Michael C. Smayling |
New strategies for gridded physical design for 32nm technologies and beyond. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
28nm, 32nm, 45nm, litho, rdr, placement, layout, physical design, manufacturability, lithography, standard cell, vlsi, drc, dfm |
18 | Louis Salvail, Christian Schaffner, Miroslava Sotáková |
On the Power of Two-Party Quantum Cryptography. |
ASIACRYPT |
2009 |
DBLP DOI BibTeX RDF |
two-party primitives, quantum protocols, oblivious transfer, quantum information theory |
18 | Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye |
Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
body bias clustering, performance compensation, layout, manufacturing variability, subthreshold circuits |
18 | Colin J. Ihrig, Gerold Joseph Dhanabalan, Alex K. Jones |
A low-power CMOS thyristor based delay element with programmability extensions. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
delay element, thyristor, low power |
18 | Javid Jaffari, Mohab Anis |
Variability-Aware Bulk-MOS Device Design. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Hiroki Matsutani, Michihiro Koibuchi, Daihan Wang, Hideharu Amano |
Adding Slow-Silent Virtual Channels for Low-Power On-Chip Networks. |
NOCS |
2008 |
DBLP DOI BibTeX RDF |
low power, Network-on-Chip, virtual channels, NoC, DVFS, power gating |
18 | XiaoChuan He, Yan Jia 0001 |
Procrastination Scheduling for Fixed-Priority Tasks with Preemption Thresholds. |
NPC |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Mudhakar Srivatsa, Shane Balfe, Kenneth G. Paterson, Pankaj Rohatgi |
Trust management for secure information flows. |
CCS |
2008 |
DBLP DOI BibTeX RDF |
ID-PKC, trust, information flow, risk |
18 | Lawrence Leinweber, Swarup Bhunia |
Fine-Grained Supply Gating Through Hypergraph Partitioning and Shannon Decomposition for Active Power Reduction. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Rajesh Garg, Gagandeep Mallarapu, Sunil P. Khatri |
A Single-supply True Voltage Level Shifter. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Aswin Sreedhar, Alodeep Sanyal, Sandip Kundu |
On Modeling and Testing of Lithography Related Open Faults in Nano-CMOS Circuits. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Sudip Roy 0001, Ajit Pal |
Why to Use Dual-Vt, If Single-Vt Serves the Purpose Better under Process Parameter Variations? |
DSD |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Shinnosuke Yagi, Yuji Waizumi, Hiroshi Tsunoda, Abbas Jamalipour, Nei Kato, Yoshiaki Nemoto |
Network Application Identification Using Transition Pattern of Payload Length. |
WCNC |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hwang |
"Green" micro-architecture and circuit co-design for ternary content addressable memory. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Sherif A. Tawfik, Volkan Kursun |
Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Rehman Ashraf, Malgorzata Chrzanowska-Jeske, Siva G. Narendra |
Carbon nanotube circuit design choices in the presence of metallic tubes. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
18 | SeongHan Shin, Kazukuni Kobara, Hideki Imai |
A security framework for personal networks. |
COMSWARE |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
Power Reduction of Functional Units Considering Temperature and Process Variations. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail |
Thermal Management of On-Chip Caches Through Power Density Minimization. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Kunhyuk Kang, Haldun Kufluoglu, Kaushik Roy 0001, Muhammad Ashraful Alam |
Impact of Negative-Bias Temperature Instability in Nanoscale SRAM Array: Modeling and Analysis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Yu Wang 0002, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie 0001 |
Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Radu Teodorescu, Jun Nakano, Abhishek Tiwari 0002, Josep Torrellas |
Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing. |
MICRO |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Santosh Talli, Ram Srinivasan, Jeanine E. Cook |
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization. |
IPCCC |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Jung Hwan Choi, Jayathi Murthy, Kaushik Roy 0001 |
The effect of process variation on device temperature in FinFET circuits. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Amir Moradi 0001, Mahmoud Salmasizadeh, Mohammad T. Manzuri Shalmani |
Power Analysis Attacks on MDPL and DRSL Implementations. |
ICISC |
2007 |
DBLP DOI BibTeX RDF |
DRSL, MDPL, Side-Channel Attacks, DPA, flip-flop |
18 | Jungseob Lee, Azadeh Davoodi |
Comparison of Dual-Vt Configurations of SRAM Cell Considering Process-Induced Vt Variations. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Guochen Hua, Meng Wang 0005, Zili Shao, Hui Liu 0006, Chun Xue |
Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System. |
EUC |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Hailin Jiang, Malgorzata Marek-Sadowska |
Power-Gating Aware Floorplanning. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Deblina Sarkar, Samiran Ganguly, Deepanjan Datta, A. Ananda Prasad Sarab, Sudeb Dasgupta |
Modeling of Leakages in Nano-Scale DG MOSFET to Implement Low Power SRAM: A Device/Circuit Co-Design. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Hamed F. Dadgour, Kaustav Banerjee |
Design and Analysis of Hybrid NEMS-CMOS Circuits for Ultra Low-Power Applications. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Ritu Singhal, Asha Balijepalli, Anupama R. Subramaniam, Frank Liu 0001, Sani R. Nassif, Yu Cao 0001 |
Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin |
Compiler-directed thermal management for VLIW functional units. |
LCTES |
2006 |
DBLP DOI BibTeX RDF |
VLIW, thermal, IPC |
18 | Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang |
Switching-activity driven gate sizing and Vth assignment for low power design. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Azadeh Davoodi, Ankur Srivastava 0001 |
Probabilistic evaluation of solutions in variability-driven optimization. |
ISPD |
2006 |
DBLP DOI BibTeX RDF |
probabilistic optimization |
18 | Da-Wei Wang 0004, Churn-Jung Liau, Yi-Ting Chiang, Tsan-sheng Hsu |
Information Theoretical Analysis of Two-Party Secret Computation. (PDF / PS) |
DBSec |
2006 |
DBLP DOI BibTeX RDF |
Privacy Analysis, Scalar Product, Private Computation |
18 | Hui Wu 0001, Sridevan Parameswaran |
Minimising the Energy Consumption of Real-Time Tasks with Precedence Constraints on a Single Processor. |
EUC |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Kanak Agarwal, Kevin J. Nowka, Harmander Deogun, Dennis Sylvester |
Power Gating with Multiple Sleep Modes. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
18 | K. Narasimhulu, V. Ramgopal Rao |
Embedded Tutorial: Analog Circuit Performance Issues with Aggressively Scaled Gate Oxide CMOS Technologies. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Y. Abulafia, Avner Kornfeld |
Estimation of FMAX and ISB in microprocessors. |
IEEE Trans. Very Large Scale Integr. Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Rajeev R. Rao, David T. Blaauw, Dennis Sylvester, Anirudh Devgan |
Modeling and Analysis of Parametric Yield under Power and Performance Constraints. |
IEEE Des. Test Comput. |
2005 |
DBLP DOI BibTeX RDF |
G.4.g Reliability and robustness, B.7 Integrated Circuits, Fault-Tolerance |
18 | Yingmin Li, David M. Brooks, Zhigang Hu, Kevin Skadron |
Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. |
HPCA |
2005 |
DBLP DOI BibTeX RDF |
|