Search results for "memories"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
12	Per Bjesse	Word-Level Sequential Memory Abstraction for Model Checking.	FMCAD	2008	DBLP DOI BibTeX RDF
12	Praveen Raghavan, Andy Lambrechts, Javed Absar, Murali Jayapala, Francky Catthoor, Diederik Verkest	Coffee: COmpiler Framework for Energy-Aware Exploration.	HiPEAC	2008	DBLP DOI BibTeX RDF
12	Pascal Felber, Christof Fetzer, Torvald Riegel	Dynamic performance tuning of word-based software transactional memory.	PPoPP	2008	DBLP DOI BibTeX RDF	dynamic tuning, transactional memory
12	Guangyu Chen, Feihui Li, Seung Woo Son 0001, Mahmut T. Kandemir	Application mapping for chip multiprocessors.	DAC	2008	DBLP DOI BibTeX RDF	NoC (Network on Chip), compilers, power optimization, chip multiprocessing, application mapping
12	Lisa Higham, LillAnne Jackson, Jalal Kawash	Specifying memory consistency of write buffer multiprocessors.	ACM Trans. Comput. Syst.	2007	DBLP DOI BibTeX RDF	Memory consistency framework, partial store order, relaxed memory order, sparc multiprocessors, total store order, write-buffer architectures, coherence, sequential consistency, alpha
12	Luigi Dilillo, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian	Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	Resistive-open defects, Pre-charge circuits, Memory testing, Dynamic faults
12	Rei-Fu Huang, Jin-Fu Li 0001, Jen-Chieh Yeh, Cheng-Wen Wu	Raisin: Redundancy Analysis Algorithm Simulation.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	repair rate, BIRA, Raisin, yield, BISR, redundancy analysis, algorithm simulation
12	Danna Voth, Sara Reese Hedberg	In the News.	IEEE Intell. Syst.	2007	DBLP DOI BibTeX RDF	life annotation, MyLifeBits, LifeBrowser, machine learning, pattern recognition, artificial intelligence, healthcare
12	Kevin Marquet, Gilles Grimaud	A DSL approach for object memory management of small devices.	PPPJ	2007	DBLP DOI BibTeX RDF
12	Nagender Bandi, Ahmed Metwally 0001, Divyakant Agrawal, Amr El Abbadi	TCAM-conscious Algorithms for Data Streams.	ICDE	2007	DBLP DOI BibTeX RDF
12	Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon	Technological hybridization for efficient runtime reconfigurable FPGAs.	ISVLSI	2007	DBLP DOI BibTeX RDF
12	Sujan Pandey, Christian Genz, Rolf Drechsler	Co-synthesis of custom on-chip bus and memory for MPSoC architectures.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
12	Bita Gorjiara, Daniel Gajski	FPGA-friendly code compression for horizontal microcoded custom IPs.	FPGA	2007	DBLP DOI BibTeX RDF	dictionary-based compression, microcoded architectures, no-instruction-set computer, FPGA, memory optimization
12	Brad Matthews, Itamar Elhanany, Vahid Tabatabaee	Accelerated Packet Placement Architecture for Parallel Shared Memory Routers.	Networking	2007	DBLP DOI BibTeX RDF
12	Mihir R. Choudhury, Kyle Ringgenberg, Scott Rixner, Kartik Mohanram	Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory.	DATE	2007	DBLP DOI BibTeX RDF
12	Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Falsafi, James C. Hoe	Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding.	MICRO	2007	DBLP DOI BibTeX RDF
12	Kristopher D. Peterson, Justin L. Tripp	Effective Automatic Memory Allocation Algorithm Based on Schedule Length in Cycles in a Novel C to FPGA Compiler.	FPL	2007	DBLP DOI BibTeX RDF
12	Zhong Zhang 0005, Takuma Akiduki, Tetsuo Miyake, Takashi Imamura	Multi-Valued Cellular Neural Networks and Its Application for Associative Memory.	ISNN (2)	2007	DBLP DOI BibTeX RDF
12	Siddharth Choudhuri, Tony Givargis	Performance improvement of block based NAND flash translation layer.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	block mapping, storage, NAND flash
12	Elisa Rubegni, Sandro Gerardi, Maurizio Caporali	Mobile applications for helping users to keep track of their travel experience.	ECCE	2007	DBLP DOI BibTeX RDF	interaction design, tangible user interface, mobile technology
12	Dong Wang, Xiaowen Chen, Shuming Chen, Xing Fang, Shuwei Sun	FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
12	Ivan Villaverde, Manuel Graña, J. L. Jimenez-Bascones	Lattice Independence and Vision Based Mobile Robot Navigation.	KES (2)	2007	DBLP DOI BibTeX RDF	Lattice, Machine Vision, Robot Navigation, Morphological Neural Networks
12	Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan	Multiple Upsets Tolerance in SRAM Memory.	ISCAS	2007	DBLP DOI BibTeX RDF
12	Giovanni Beltrame, Cristiana Bolchini, Luca Fossati, Antonio Miele, Donatella Sciuto	A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip.	DFT	2007	DBLP DOI BibTeX RDF
12	Avijit Dutta, Nur A. Touba	Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code.	VTS	2007	DBLP DOI BibTeX RDF
12	Yuri Nishikawa, Michihiro Koibuchi, Masato Yoshimi, Kenichi Miura, Hideharu Amano	Performance Improvement Methodology for ClearSpeed's CSX600.	ICPP	2007	DBLP DOI BibTeX RDF
12	Gergely Papp	Place-Field and Memory Formation in the Hippocampus.	Summer School on Neural Networks	2007	DBLP DOI BibTeX RDF	dentate gyrus, mossy fibers, competitive learning, Hippocampus
12	Shyue-Kung Lu, Chih-Hsien Hsu	Fault tolerance techniques for high capacity RAM.	IEEE Trans. Reliab.	2006	DBLP DOI BibTeX RDF
12	Hyoung-Il Lee, Seung-Woo Seo	Matching output queueing with a multiple input/output-queued switch.	IEEE/ACM Trans. Netw.	2006	DBLP DOI BibTeX RDF	combined input/output-queued (CIOQ) switch, multiple input/output-queued (MIOQ) switch, output queueing emulation, parallel switching architecture
12	Jarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov	Min-cut floorplacement.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
12	Manish Verma, Lars Wehmeyer, Peter Marwedel	Cache-Aware Scratchpad-Allocation Algorithms for Energy-Constrained Embedded Systems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
12	Natasa Miskov-Zivanov, Diana Marculescu	Circuit Reliability Analysis Using Symbolic Techniques.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
12	Markus Seuring	Combining Scan Test and Built-in Self Test.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	MBIST, BIST, scan test, production test, stress test
12	D.-L. Lee	Improvements of Complex-Valued Hopfield Associative Memory by Using Generalized Projection Rules.	IEEE Trans. Neural Networks	2006	DBLP DOI BibTeX RDF
12	Daniele Casali, Giovanni Costantini, Renzo Perfetti, Elisa Ricci 0001	Associative Memory Design Using Support Vector Machines.	IEEE Trans. Neural Networks	2006	DBLP DOI BibTeX RDF
12	Hartwig Jeschke	Design Space Expoloration Chip Size Estimation for SOC Design Space Exploration.	ICSAMOS	2006	DBLP DOI BibTeX RDF
12	Ali R. Iranpour, Krzysztof Kuchcinski	Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors.	SAMOS	2006	DBLP DOI BibTeX RDF
12	Gaurav Mathur, Peter Desnoyers, Deepak Ganesan, Prashant J. Shenoy	Capsule: an energy-optimized object storage system for memory-constrained sensor devices.	SenSys	2006	DBLP DOI BibTeX RDF	sensor network, embedded systems, energy efficiency, file system, objects, flash memory, storage system
12	Isabelle Puaut	WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems.	ECRTS	2006	DBLP DOI BibTeX RDF
12	Guangyu Chen, Feihui Li, Ozcan Ozturk 0001, Guilin Chen, Mahmut T. Kandemir, Ibrahim Kolcu	Leakage-Aware SPM Management.	ISVLSI	2006	DBLP DOI BibTeX RDF
12	Guilin Chen, Ozcan Ozturk 0001, Mahmut T. Kandemir, Mustafa Karaköy	Dynamic scratch-pad memory management for irregular array access patterns.	DATE	2006	DBLP DOI BibTeX RDF
12	Masahide Miyazaki, Tomokazu Yoneda, Hideo Fujiwara	A memory grouping method for sharing memory BIST logic.	ASP-DAC	2006	DBLP DOI BibTeX RDF
12	Hans Georg Schaathun, Gérard D. Cohen	Nested Codes for Constrained Memory and for Dirty Paper.	AAECC	2006	DBLP DOI BibTeX RDF	dirty paper, constrained memory, nested codes, covering codes
12	Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton	Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays.	FPL	2006	DBLP DOI BibTeX RDF
12	Tom Van Court, Martin C. Herbordt	Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique.	FPL	2006	DBLP DOI BibTeX RDF
12	Chih-Yuan Lu	Non-volatile Semiconductor Memory Technology in Nanotech Era.	MTDT	2006	DBLP DOI BibTeX RDF
12	Mohamed Azimane	High-Quality Memory Test.	MTDT	2006	DBLP DOI BibTeX RDF
12	Antonis Papanikolaou, T. Grabner, Miguel Miranda, Philippe Roussel, Francky Catthoor	Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	system exploration, process variability, parametric yield
12	Michael DeLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo, Ian Eslick, Raphael Rubin, Tomás E. Uribe, Thomas F. Knight Jr., André DeHon	GraphStep: A System Architecture for Sparse-Graph Algorithms.	FCCM	2006	DBLP DOI BibTeX RDF
12	Joanna Berzowska, Marcelo Coelho	SMOKS: the memory suits.	CHI Extended Abstracts	2006	DBLP DOI BibTeX RDF	physical touch, reactive garments, wearable computing, electronic textiles
12	Ahmed Abdelkhalek 0002, Tarek S. Abdelrahman	Locality management using multiple SPMs on the Multi-Level Computing Architecture.	ESTIMedia	2006	DBLP DOI BibTeX RDF
12	Panagiotis D. Vouzis, Mark G. Arnold	A parallel search algorithm for CLNS addition optimization.	ISCAS	2006	DBLP DOI BibTeX RDF
12	Rochit Rajsuman	Towards The Methodology of On-line Diagnosis.	IOLTS	2006	DBLP DOI BibTeX RDF
12	Yuejian Wu, André Ivanov	Low Power SoC Memory BIST.	DFT	2006	DBLP DOI BibTeX RDF
12	Makoto Sugihara, Tohru Ishihara, Masanori Muroyama, Koji Hashimoto	A Simulation-Based Soft Error Estimation Methodology for Computer Systems.	ISQED	2006	DBLP DOI BibTeX RDF	Reliability, Estimation, Soft Error, Computer Systems, Instruction-Set Simulation
12	Ozcan Ozturk 0001, Mahmut T. Kandemir, Ibrahim Kolcu	Shared Scratch-Pad Memory Space Management.	ISQED	2006	DBLP DOI BibTeX RDF
12	Riad Ben Mouhoub, Omar Hammami	System-Level Design Methodology with Direct Execution For Multiprocessors on SoPC.	ISQED	2006	DBLP DOI BibTeX RDF
12	Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson	Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration.	ISQED	2006	DBLP DOI BibTeX RDF
12	Jason Fleischer	Neural Correlates of Anticipation in Cerebellum, Basal Ganglia, and Hippocampus.	SAB ABiALS	2006	DBLP DOI BibTeX RDF
12	José Antonio Ruz Hernández, Edgar N. Sánchez, Dionisio A. Suarez	Designing an Associative Memory via Optimal Training for Fault Diagnosis.	IJCNN	2006	DBLP DOI BibTeX RDF
12	Yu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu	A Built-In Self-Repair Scheme for NOR-Type Flash Memory.	VTS	2006	DBLP DOI BibTeX RDF
12	Ivan Villaverde, Manuel Graña, Alicia D'Anjou	Morphological Neural Networks and Vision Based Mobile Robot Navigation.	ICANN (1)	2006	DBLP DOI BibTeX RDF
12	Wonjae Lee, Seongjoo Lee, Jaeseok Kim	An Efficient Demosaiced Image Enhancement Method for a Low Cost Single-Chip CMOS Image Sensor.	PSIVT	2006	DBLP DOI BibTeX RDF	Single-chip CMOS image sensor, image signal processor, image enhancement, demosaicing
12	Jason E. Miller, Anant Agarwal	Software-based instruction caching for embedded processors.	ASPLOS	2006	DBLP DOI BibTeX RDF	instruction cache, chaining, software caching
12	Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto	Memory-Efficient Accelerating Schedule for LDPC Decoder.	APCCAS	2006	DBLP DOI BibTeX RDF
12	Sarabjot S. Anand, Bamshad Mobasher	Contextual Recommendation.	WebMine	2006	DBLP DOI BibTeX RDF
12	Ismail Kadayif, Mahmut T. Kandemir	Data space-oriented tiling for enhancing locality.	ACM Trans. Embed. Comput. Syst.	2005	DBLP DOI BibTeX RDF	Software compilation, array-intensive applications, iteration space tiling, data locality, scratch pad memory
12	Dai Kobayashi, Akitsugu Watanabe, Ryo Taguchi, Toshihiro Uehara, Haruo Yokota	An Efficient Access Forwarding Method Based On Caches On Storage Nodes.	ICDE Workshops	2005	DBLP DOI BibTeX RDF
12	Antonio Martí Campoy, Isabelle Puaut, Angel Perles Ivars, José V. Busquets-Mataix	Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison.	ECRTS	2005	DBLP DOI BibTeX RDF
12	Ozcan Ozturk 0001, Mahmut T. Kandemir, Mary Jane Irwin	BB-GC: Basic-Block Level Garbage Collection.	DATE	2005	DBLP DOI BibTeX RDF
12	Malay K. Ganai, Aarti Gupta, Pranav Ashar	Verification of Embedded Memory Systems using Efficient Memory Modeling.	DATE	2005	DBLP DOI BibTeX RDF
12	Claus-Peter Wirth	History and Future of Implicit and Inductionless Induction: Beware the Old Jade and the Zombie!	Mechanizing Mathematical Reasoning	2005	DBLP DOI BibTeX RDF
12	Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz	Circuit Independent Weighted Pseudo-Random BIST Pattern Generator.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
12	Petra Gemeinboeck, Mary Agnes Krell	Art exhibition: impossible geographies 01.	ACM Multimedia	2005	DBLP DOI BibTeX RDF	performativity, memory, presence, narrative, mirror
12	Yanbin Luo, Kannappan Palaniappan, Yongming Li 0001	New Algorithms of Neural Fuzzy Relation Systems with Min-implication Composition.	ICNC (3)	2005	DBLP DOI BibTeX RDF
12	Oswaldo Castillo Navetty, Nada Matta	A Knowledge Acquisition System for the French Textile and Apparel Institute.	KES (1)	2005	DBLP DOI BibTeX RDF
12	Guangyu Chen, Mahmut T. Kandemir	Dataflow analysis for energy-efficient scratch-pad memory management.	ISLPED	2005	DBLP DOI BibTeX RDF	scratch pad memory (SPM), compiler, data flow analysis
12	Vamsi Vankamamidi, Marco Ottavi, Fabrizio Lombardi	Tile-based design of a serial memory in QCA.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	quantum computing, memory architecture, emerging technologies, QCA
12	Wei Zhang 0002	Computing Cache Vulnerability to Transient Errors and Its Implication.	DFT	2005	DBLP DOI BibTeX RDF
12	Mohamed Azimane, Ananta K. Majhi, Guido Gronthoud, Maurice Lousberg	A New Algorithm for Dynamic Faults Detection in RAMs.	VTS	2005	DBLP DOI BibTeX RDF
12	Yong Ho Song, Eul-Gyu Im	Secure Contents Distribution Using Flash Memory Technology.	ISI	2005	DBLP DOI BibTeX RDF
12	Pat Langley	An Adaptive Architecture for Physical Agents.	Web Intelligence	2005	DBLP DOI BibTeX RDF
12	Julian Szymanski, Tomasz Sarnatowicz, Wlodzislaw Duch	Semantic Memory for Avatars in Cyberspace.	CW	2005	DBLP DOI BibTeX RDF
12	Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir	Energy management schemes for memory-resident database systems.	CIKM	2004	DBLP DOI BibTeX RDF	hardware energy scheme, multiquery optimization, query-directed energy management, database, energy, power consumption, DRAM
12	Andrea Lodi 0002, Roberto Giansante, Carlo Chiesa, Luca Ciccarelli, Mario Toma, Fabio Campi	Routing architecture for multi-context FPGAs.	FPGA	2004	DBLP DOI BibTeX RDF
12	Jiang Xu 0001, Wayne H. Wolf, Jörg Henkel, Srimat T. Chakradhar, Tiehan Lv	A Case Study in Networks-on-Chip Design for Embedded Video.	DATE	2004	DBLP DOI BibTeX RDF
12	Kimish Patel, Enrico Macii, Massimo Poncino	Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC.	DATE	2004	DBLP DOI BibTeX RDF
12	Hamid R. Zarandi, Seyed Ghassem Miremadi	A Highly Fault Detectable Cache Architecture for Dependable Computing.	SAFECOMP	2004	DBLP DOI BibTeX RDF
12	Lukai Cai, Haobo Yu, Daniel Gajski	A novel memory size model for variable-mapping in system level design.	ASP-DAC	2004	DBLP DOI BibTeX RDF
12	Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, Urs Helmig	Fast, predictable and low energy memory references through architecture-aware compilation.	ASP-DAC	2004	DBLP DOI BibTeX RDF
12	Said Hamdioui, John Delos Reyes, Zaid Al-Ars	Evaluation of Intra-Word Faults in Word-Oriented RAMs.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
12	Luigi Dilillo, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri, Magali Bastian Hage-Hassan	Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
12	Yon Dourisboure	Compact Routing Schemes for Bounded Tree-Length Graphs and for k-Chordal Graphs.	DISC	2004	DBLP DOI BibTeX RDF	tree-length, chordality, compact routing, tree-decomposition
12	Shyue-Kung Lu, Shih-Chang Huang	Built-in Self-Test and Repair (BISTR) Techniques for Embedded RAMs.	MTDT	2004	DBLP DOI BibTeX RDF
12	N. Derhacobian, Valery A. Vardanian, Yervant Zorian	Embedded Memory Reliability: The SER Challenge.	MTDT	2004	DBLP DOI BibTeX RDF
12	Rita Zappa, Carolina Selva, Danilo Rimondi, Cosimo Torelli, M. Crestan, Giovanni Mastrodomenico, Lara Albani	Micro Programmable Built-In Self Repair for SRAMs.	MTDT	2004	DBLP DOI BibTeX RDF
12	Chi-kin Chow, Hung-Tat Tsui	Sequential RBF function estimator: memory regression network.	SMC (5)	2004	DBLP DOI BibTeX RDF
12	Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov	Unification of partitioning, placement and floorplanning.	ICCAD	2004	DBLP DOI BibTeX RDF
12	Marios N. Avraamides, Jonathan W. Kelly	Imagined Perspective-Changing Within and Across Novel Environments.	Spatial Cognition	2004	DBLP DOI BibTeX RDF
12	Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir	Reducing energy consumption of queries in memory-resident database systems.	CASES	2004	DBLP DOI BibTeX RDF	hardware schemes, query-directed energy management, database, mapping, query optimization, energy, power consumption, layouts, DRAM